--- /dev/null
+
+include $(top_srcdir)/Makefile.tool-tests.am
+
+dist_noinst_SCRIPTS = filter_stderr
+
+EXTRA_DIST = \
+ context_float.stdout.exp context_float.stderr.exp context_float.vgtest \
+ context_integer.stdout.exp context_integer.stderr.exp context_integer.vgtest \
+ scalar.stderr.exp scalar.vgtest
+
+check_PROGRAMS = \
+ context_float \
+ context_integer \
+ scalar
+
+AM_CFLAGS += @FLAG_M64@
+AM_CXXFLAGS += @FLAG_M64@
+AM_CCASFLAGS += @FLAG_M64@
--- /dev/null
+/* Test if values in floating-point registers are correctly propagated into and
+ out of a signal handler and also check that the same applies for
+ uninitialised values and their origins.
+
+ Register usage in the test:
+ before signal -> in signal handler -> after return
+ f0 -- 0,def -> unchanged -> 0,def
+ f1 -- 0,undef -> unchanged -> 0,undef
+ f2 -- 0,def -> set to 0,undef -> 0,undef
+ f3 -- 0,undef -> set to 0,def -> 0,def
+ f4 -- 1,def -> increment by 1,def -> 2,def
+ f5 -- 1,undef -> increment by 1,def -> 2,undef
+ f6 -- 1,def -> increment by 1,undef -> 2,undef
+ f7 -- 1,undef -> increment by 1,undef -> 2,undef
+ f8 -- DBL_MAX,def -> unchanged -> DBL_MAX,def
+ f9 -- DBL_MAX,undef -> unchanged -> DBL_MAX,undef
+ f10 -- DBL_MAX,def -> set to 0,undef -> 0,undef
+ f11 -- DBL_MAX,undef -> set to 0,def -> 0,def
+ f12 -- 0,def -> set to DBL_MAX,def -> DBL_MAX,def
+ f13 -- 0,undef -> set to DBL_MAX,undef -> DBL_MAX,undef
+ f14 -- 0,def -> decrement by 0,def -> 0,def
+ f15 -- 0,undef -> decrement by 0,def -> 0,undef
+ f16 -- 0,def -> decrement by 0,undef -> 0,undef
+ f17 -- 0,undef -> decrement by 0,undef -> 0,undef
+ f18 -- 0,def -> decrement by 1,def -> -1,def
+ f19 -- 0,undef -> decrement by 1,def -> -1,undef
+ f20 -- 0,def -> decrement by 1,undef -> -1,undef
+ f21 -- 0,undef -> decrement by 1,undef -> -1,undef
+ f22-f30 -- 0,def -> set to 1,undef -> 1,undef
+ f31 -- 1,undef -> set 0,def -> 0,def
+ fcsr:
+ fflags -- 0b10101,def -> set to 0b01010,undef -> 0b01010,undef
+ frm -- 0b001,undef -> set to 0b100,def -> 0b100,def
+ */
+
+#include <assert.h>
+#include <float.h>
+#include <signal.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/syscall.h>
+#include <sys/ucontext.h>
+#include <unistd.h>
+#include <valgrind.h>
+
+typedef union {
+ unsigned long u64;
+ double f64;
+} uf64;
+
+static ucontext_t uc;
+static unsigned long x0, x1;
+static unsigned long dbl_max, dbl_p1, dbl_m1, dbl_p2;
+
+static void sighandler(int sig, siginfo_t* sip, void* arg)
+{
+ ucontext_t* ucp = (ucontext_t*)arg;
+
+ uc = *ucp;
+
+ /* Reset fcsr so its undefinedness doesn't affect the following calculations.
+ */
+ __asm__ __volatile__("fscsr zero");
+
+#define FPREG_MOD(fpreg, op, mod) \
+ do { \
+ uf64 t1, t2; \
+ t1.u64 = fpreg; \
+ t2.u64 = mod; \
+ t1.f64 op t2.f64; \
+ fpreg = t1.u64; \
+ } while (0)
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[2], =, x0);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[3], =, 0);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[4], +=, dbl_p1);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[5], +=, dbl_p1);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[6], +=, dbl_p1 + x1);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[7], +=, dbl_p1 + x1);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[10], =, x0);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[11], =, 0);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[12], =, dbl_max);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[13], =, dbl_max + x0);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[14], -=, 0);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[15], -=, 0);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[16], -=, x0);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[17], -=, x0);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[18], -=, dbl_p1);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[19], -=, dbl_p1);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[20], -=, dbl_p1 + x1);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[21], -=, dbl_p1 + x1);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[22], =, dbl_p1 + x1);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[23], =, dbl_p1 + x1);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[24], =, dbl_p1 + x1);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[25], =, dbl_p1 + x1);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[26], =, dbl_p1 + x1);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[27], =, dbl_p1 + x1);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[28], =, dbl_p1 + x1);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[29], =, dbl_p1 + x1);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[30], =, dbl_p1 + x1);
+ FPREG_MOD(ucp->uc_mcontext.__fpregs.__d.__f[31], =, 0);
+#undef FPREG_MOD
+
+ ucp->uc_mcontext.__fpregs.__d.__fcsr =
+ 0b100 << 5 | ((0b01010 | x0) & 0b11111);
+}
+
+int main(void)
+{
+ /* Uninitialised, but we know px0[0] is 0x0. */
+ unsigned long* px0 = malloc(sizeof(*px0));
+ x0 = px0[0];
+
+ /* Uninitialised, but we know px1[0] is 0x0. */
+ unsigned long* px1 = malloc(sizeof(*px1));
+ x1 = px1[0];
+
+ uf64 tmp;
+ tmp.f64 = DBL_MAX;
+ dbl_max = tmp.u64;
+ tmp.f64 = 1.0;
+ dbl_p1 = tmp.u64;
+ tmp.f64 = -1.0;
+ dbl_m1 = tmp.u64;
+ tmp.f64 = 2.0;
+ dbl_p2 = tmp.u64;
+
+ struct sigaction sa = {};
+ sa.sa_sigaction = sighandler;
+ if (sigaction(SIGUSR1, &sa, NULL)) {
+ perror("sigaction");
+ return 1;
+ }
+
+ unsigned long regs_in[33] = {
+ 0,
+ x0,
+ 0,
+ x0,
+ dbl_p1,
+ dbl_p1 + x1,
+ dbl_p1,
+ dbl_p1 + x1,
+ dbl_max,
+ dbl_max + x0,
+ dbl_max,
+ dbl_max + x0,
+ 0,
+ x0,
+ 0,
+ x0,
+ 0,
+ x0,
+ 0,
+ x0,
+ 0,
+ x0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ dbl_p1 + x1,
+ ((0b001 | x0) & 0b111) << 5 | 0b10101,
+ };
+ unsigned long regs_out[33] = {};
+
+ pid_t pid = getpid();
+ register unsigned long* t0 asm("t0") = regs_in;
+ register unsigned long* t1 asm("t1") = regs_out;
+ register unsigned long a7 asm("a7") = SYS_kill;
+ register unsigned long a0 asm("a0") = pid;
+ register unsigned long a1 asm("a1") = SIGUSR1;
+ __asm__ __volatile__(
+ /* Spill all test registers, keep the 16-byte sp alignment. */
+ "add sp, sp, -272\n\t"
+ "fsd f0, 0(sp)\n\t"
+ "fsd f1, 8(sp)\n\t"
+ "fsd f2, 16(sp)\n\t"
+ "fsd f3, 24(sp)\n\t"
+ "fsd f4, 32(sp)\n\t"
+ "fsd f5, 40(sp)\n\t"
+ "fsd f6, 48(sp)\n\t"
+ "fsd f7, 56(sp)\n\t"
+ "fsd f8, 64(sp)\n\t"
+ "fsd f9, 72(sp)\n\t"
+ "fsd f10, 80(sp)\n\t"
+ "fsd f11, 88(sp)\n\t"
+ "fsd f12, 96(sp)\n\t"
+ "fsd f13, 104(sp)\n\t"
+ "fsd f14, 112(sp)\n\t"
+ "fsd f15, 120(sp)\n\t"
+ "fsd f16, 128(sp)\n\t"
+ "fsd f17, 136(sp)\n\t"
+ "fsd f18, 144(sp)\n\t"
+ "fsd f19, 152(sp)\n\t"
+ "fsd f20, 160(sp)\n\t"
+ "fsd f21, 168(sp)\n\t"
+ "fsd f22, 176(sp)\n\t"
+ "fsd f23, 184(sp)\n\t"
+ "fsd f24, 192(sp)\n\t"
+ "fsd f25, 200(sp)\n\t"
+ "fsd f26, 208(sp)\n\t"
+ "fsd f27, 216(sp)\n\t"
+ "fsd f28, 224(sp)\n\t"
+ "fsd f29, 232(sp)\n\t"
+ "fsd f30, 240(sp)\n\t"
+ "fsd f31, 248(sp)\n\t"
+ "frcsr t2\n\t"
+ "sd t2, 256(sp)\n\t"
+
+ /* Set values in the test registers. */
+ "fld f0, 0(%[in])\n\t"
+ "fld f1, 8(%[in])\n\t"
+ "fld f2, 16(%[in])\n\t"
+ "fld f3, 24(%[in])\n\t"
+ "fld f4, 32(%[in])\n\t"
+ "fld f5, 40(%[in])\n\t"
+ "fld f6, 48(%[in])\n\t"
+ "fld f7, 56(%[in])\n\t"
+ "fld f8, 64(%[in])\n\t"
+ "fld f9, 72(%[in])\n\t"
+ "fld f10, 80(%[in])\n\t"
+ "fld f11, 88(%[in])\n\t"
+ "fld f12, 96(%[in])\n\t"
+ "fld f13, 104(%[in])\n\t"
+ "fld f14, 112(%[in])\n\t"
+ "fld f15, 120(%[in])\n\t"
+ "fld f16, 128(%[in])\n\t"
+ "fld f17, 136(%[in])\n\t"
+ "fld f18, 144(%[in])\n\t"
+ "fld f19, 152(%[in])\n\t"
+ "fld f20, 160(%[in])\n\t"
+ "fld f21, 168(%[in])\n\t"
+ "fld f22, 176(%[in])\n\t"
+ "fld f23, 184(%[in])\n\t"
+ "fld f24, 192(%[in])\n\t"
+ "fld f25, 200(%[in])\n\t"
+ "fld f26, 208(%[in])\n\t"
+ "fld f27, 216(%[in])\n\t"
+ "fld f28, 224(%[in])\n\t"
+ "fld f29, 232(%[in])\n\t"
+ "fld f30, 240(%[in])\n\t"
+ "fld f31, 248(%[in])\n\t"
+ "ld t2, 256(%[in])\n\t"
+ "fscsr t2\n\t"
+
+ /* Trigger the signal handler. */
+ "ecall\n\t"
+
+ /* Store updated values in the test registers. */
+ "fsd f0, 0(%[out])\n\t"
+ "fsd f1, 8(%[out])\n\t"
+ "fsd f2, 16(%[out])\n\t"
+ "fsd f3, 24(%[out])\n\t"
+ "fsd f4, 32(%[out])\n\t"
+ "fsd f5, 40(%[out])\n\t"
+ "fsd f6, 48(%[out])\n\t"
+ "fsd f7, 56(%[out])\n\t"
+ "fsd f8, 64(%[out])\n\t"
+ "fsd f9, 72(%[out])\n\t"
+ "fsd f10, 80(%[out])\n\t"
+ "fsd f11, 88(%[out])\n\t"
+ "fsd f12, 96(%[out])\n\t"
+ "fsd f13, 104(%[out])\n\t"
+ "fsd f14, 112(%[out])\n\t"
+ "fsd f15, 120(%[out])\n\t"
+ "fsd f16, 128(%[out])\n\t"
+ "fsd f17, 136(%[out])\n\t"
+ "fsd f18, 144(%[out])\n\t"
+ "fsd f19, 152(%[out])\n\t"
+ "fsd f20, 160(%[out])\n\t"
+ "fsd f21, 168(%[out])\n\t"
+ "fsd f22, 176(%[out])\n\t"
+ "fsd f23, 184(%[out])\n\t"
+ "fsd f24, 192(%[out])\n\t"
+ "fsd f25, 200(%[out])\n\t"
+ "fsd f26, 208(%[out])\n\t"
+ "fsd f27, 216(%[out])\n\t"
+ "fsd f28, 224(%[out])\n\t"
+ "fsd f29, 232(%[out])\n\t"
+ "fsd f30, 240(%[out])\n\t"
+ "fsd f31, 248(%[out])\n\t"
+ "frcsr t2\n\t"
+ "sd t2, 256(%[out])\n\t"
+
+ /* Restore their original values. */
+ "fld f0, 0(sp)\n\t"
+ "fld f1, 8(sp)\n\t"
+ "fld f2, 16(sp)\n\t"
+ "fld f3, 24(sp)\n\t"
+ "fld f4, 32(sp)\n\t"
+ "fld f5, 40(sp)\n\t"
+ "fld f6, 48(sp)\n\t"
+ "fld f7, 56(sp)\n\t"
+ "fld f8, 64(sp)\n\t"
+ "fld f9, 72(sp)\n\t"
+ "fld f10, 80(sp)\n\t"
+ "fld f11, 88(sp)\n\t"
+ "fld f12, 96(sp)\n\t"
+ "fld f13, 104(sp)\n\t"
+ "fld f14, 112(sp)\n\t"
+ "fld f15, 120(sp)\n\t"
+ "fld f16, 128(sp)\n\t"
+ "fld f17, 136(sp)\n\t"
+ "fld f18, 144(sp)\n\t"
+ "fld f19, 152(sp)\n\t"
+ "fld f20, 160(sp)\n\t"
+ "fld f21, 168(sp)\n\t"
+ "fld f22, 176(sp)\n\t"
+ "fld f23, 184(sp)\n\t"
+ "fld f24, 192(sp)\n\t"
+ "fld f25, 200(sp)\n\t"
+ "fld f26, 208(sp)\n\t"
+ "fld f27, 216(sp)\n\t"
+ "fld f28, 224(sp)\n\t"
+ "fld f29, 232(sp)\n\t"
+ "fld f30, 240(sp)\n\t"
+ "fld f31, 248(sp)\n\t"
+ "ld t2, 256(sp)\n\t"
+ "fscsr t2\n\t"
+ "add sp, sp, 272\n\t"
+ :
+ : [in] "r"(t0), [out] "r"(t1), "r"(a7), "r"(a0), "r"(a1)
+ : "t2", "memory");
+
+ printf("Values before the signal:\n");
+ VALGRIND_DISABLE_ERROR_REPORTING;
+ printf(" f0=%#lx\n", regs_in[0]);
+ printf(" f1=%#lx\n", regs_in[1]);
+ printf(" f2=%#lx\n", regs_in[2]);
+ printf(" f3=%#lx\n", regs_in[3]);
+ printf(" f4=%#lx\n", regs_in[4]);
+ printf(" f5=%#lx\n", regs_in[5]);
+ printf(" f6=%#lx\n", regs_in[6]);
+ printf(" f7=%#lx\n", regs_in[7]);
+ printf(" f8=%#lx\n", regs_in[8]);
+ printf(" f9=%#lx\n", regs_in[9]);
+ printf(" f10=%#lx\n", regs_in[10]);
+ printf(" f11=%#lx\n", regs_in[11]);
+ printf(" f12=%#lx\n", regs_in[12]);
+ printf(" f13=%#lx\n", regs_in[13]);
+ printf(" f14=%#lx\n", regs_in[14]);
+ printf(" f15=%#lx\n", regs_in[15]);
+ printf(" f16=%#lx\n", regs_in[16]);
+ printf(" f17=%#lx\n", regs_in[17]);
+ printf(" f18=%#lx\n", regs_in[18]);
+ printf(" f19=%#lx\n", regs_in[19]);
+ printf(" f20=%#lx\n", regs_in[20]);
+ printf(" f21=%#lx\n", regs_in[21]);
+ printf(" f22=%#lx\n", regs_in[22]);
+ printf(" f23=%#lx\n", regs_in[23]);
+ printf(" f24=%#lx\n", regs_in[24]);
+ printf(" f25=%#lx\n", regs_in[25]);
+ printf(" f26=%#lx\n", regs_in[26]);
+ printf(" f27=%#lx\n", regs_in[27]);
+ printf(" f28=%#lx\n", regs_in[28]);
+ printf(" f29=%#lx\n", regs_in[29]);
+ printf(" f30=%#lx\n", regs_in[30]);
+ printf(" f31=%#lx\n", regs_in[31]);
+ printf(" fcsr=%#lx\n", regs_in[32]);
+ VALGRIND_ENABLE_ERROR_REPORTING;
+ /* Check which registers contain uninitialized values. */
+ assert(regs_in[0] == 0);
+ assert(regs_in[1] == 0);
+ assert(regs_in[2] == 0);
+ assert(regs_in[3] == 0);
+ assert(regs_in[4] == dbl_p1);
+ assert(regs_in[5] == dbl_p1);
+ assert(regs_in[6] == dbl_p1);
+ assert(regs_in[7] == dbl_p1);
+ assert(regs_in[8] == dbl_max);
+ assert(regs_in[9] == dbl_max);
+ assert(regs_in[10] == dbl_max);
+ assert(regs_in[11] == dbl_max);
+ assert(regs_in[12] == 0);
+ assert(regs_in[13] == 0);
+ assert(regs_in[14] == 0);
+ assert(regs_in[15] == 0);
+ assert(regs_in[16] == 0);
+ assert(regs_in[17] == 0);
+ assert(regs_in[18] == 0);
+ assert(regs_in[19] == 0);
+ assert(regs_in[20] == 0);
+ assert(regs_in[21] == 0);
+ assert(regs_in[22] == 0);
+ assert(regs_in[23] == 0);
+ assert(regs_in[24] == 0);
+ assert(regs_in[25] == 0);
+ assert(regs_in[26] == 0);
+ assert(regs_in[27] == 0);
+ assert(regs_in[28] == 0);
+ assert(regs_in[29] == 0);
+ assert(regs_in[30] == 0);
+ assert(regs_in[31] == dbl_p1);
+ assert(((regs_in[32] >> 0) & 0b11111) == 0b10101);
+ assert(((regs_in[32] >> 5) & 0b111) == 0b001);
+
+ printf("Values in the signal handler:\n");
+ VALGRIND_DISABLE_ERROR_REPORTING;
+ printf(" f0=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[0]);
+ printf(" f1=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[1]);
+ printf(" f2=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[2]);
+ printf(" f3=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[3]);
+ printf(" f4=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[4]);
+ printf(" f5=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[5]);
+ printf(" f6=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[6]);
+ printf(" f7=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[7]);
+ printf(" f8=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[8]);
+ printf(" f9=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[9]);
+ printf(" f10=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[10]);
+ printf(" f11=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[11]);
+ printf(" f12=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[12]);
+ printf(" f13=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[13]);
+ printf(" f14=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[14]);
+ printf(" f15=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[15]);
+ printf(" f16=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[16]);
+ printf(" f17=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[17]);
+ printf(" f18=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[18]);
+ printf(" f19=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[19]);
+ printf(" f20=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[20]);
+ printf(" f21=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[21]);
+ printf(" f22=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[22]);
+ printf(" f23=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[23]);
+ printf(" f24=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[24]);
+ printf(" f25=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[25]);
+ printf(" f26=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[26]);
+ printf(" f27=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[27]);
+ printf(" f28=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[28]);
+ printf(" f29=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[29]);
+ printf(" f30=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[30]);
+ printf(" f31=%#llx\n", uc.uc_mcontext.__fpregs.__d.__f[31]);
+ printf(" fcsr=%#x\n", uc.uc_mcontext.__fpregs.__d.__fcsr);
+ VALGRIND_ENABLE_ERROR_REPORTING;
+ assert(uc.uc_mcontext.__fpregs.__d.__f[0] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[1] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[2] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[3] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[4] == dbl_p1);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[5] == dbl_p1);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[6] == dbl_p1);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[7] == dbl_p1);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[8] == dbl_max);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[9] == dbl_max);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[10] == dbl_max);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[11] == dbl_max);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[12] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[13] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[14] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[15] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[16] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[17] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[18] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[19] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[20] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[21] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[22] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[23] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[24] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[25] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[26] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[27] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[28] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[29] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[30] == 0);
+ assert(uc.uc_mcontext.__fpregs.__d.__f[31] == dbl_p1);
+ assert(((uc.uc_mcontext.__fpregs.__d.__fcsr >> 0) & 0b11111) == 0b10101);
+ assert(((uc.uc_mcontext.__fpregs.__d.__fcsr >> 5) & 0b111) == 0b001);
+
+ printf("Values after return from the signal handler:\n");
+ VALGRIND_DISABLE_ERROR_REPORTING;
+ printf(" f0=%#lx\n", regs_out[0]);
+ printf(" f1=%#lx\n", regs_out[1]);
+ printf(" f2=%#lx\n", regs_out[2]);
+ printf(" f3=%#lx\n", regs_out[3]);
+ printf(" f4=%#lx\n", regs_out[4]);
+ printf(" f5=%#lx\n", regs_out[5]);
+ printf(" f6=%#lx\n", regs_out[6]);
+ printf(" f7=%#lx\n", regs_out[7]);
+ printf(" f8=%#lx\n", regs_out[8]);
+ printf(" f9=%#lx\n", regs_out[9]);
+ printf(" f10=%#lx\n", regs_out[10]);
+ printf(" f11=%#lx\n", regs_out[11]);
+ printf(" f12=%#lx\n", regs_out[12]);
+ printf(" f13=%#lx\n", regs_out[13]);
+ printf(" f14=%#lx\n", regs_out[14]);
+ printf(" f15=%#lx\n", regs_out[15]);
+ printf(" f16=%#lx\n", regs_out[16]);
+ printf(" f17=%#lx\n", regs_out[17]);
+ printf(" f18=%#lx\n", regs_out[18]);
+ printf(" f19=%#lx\n", regs_out[19]);
+ printf(" f20=%#lx\n", regs_out[20]);
+ printf(" f21=%#lx\n", regs_out[21]);
+ printf(" f22=%#lx\n", regs_out[22]);
+ printf(" f23=%#lx\n", regs_out[23]);
+ printf(" f24=%#lx\n", regs_out[24]);
+ printf(" f25=%#lx\n", regs_out[25]);
+ printf(" f26=%#lx\n", regs_out[26]);
+ printf(" f27=%#lx\n", regs_out[27]);
+ printf(" f28=%#lx\n", regs_out[28]);
+ printf(" f29=%#lx\n", regs_out[29]);
+ printf(" f30=%#lx\n", regs_out[30]);
+ printf(" f31=%#lx\n", regs_out[31]);
+ printf(" fcsr=%#lx\n", regs_out[32]);
+ VALGRIND_ENABLE_ERROR_REPORTING;
+ assert(regs_out[0] == 0);
+ assert(regs_out[1] == 0);
+ assert(regs_out[2] == 0);
+ assert(regs_out[3] == 0);
+ assert(regs_out[4] == dbl_p2);
+ assert(regs_out[5] == dbl_p2);
+ assert(regs_out[6] == dbl_p2);
+ assert(regs_out[7] == dbl_p2);
+ assert(regs_out[8] == dbl_max);
+ assert(regs_out[9] == dbl_max);
+ assert(regs_out[10] == 0);
+ assert(regs_out[11] == 0);
+ assert(regs_out[12] == dbl_max);
+ assert(regs_out[13] == dbl_max);
+ assert(regs_out[14] == 0);
+ assert(regs_out[15] == 0);
+ assert(regs_out[16] == 0);
+ assert(regs_out[17] == 0);
+ assert(regs_out[18] == dbl_m1);
+ assert(regs_out[19] == dbl_m1);
+ assert(regs_out[20] == dbl_m1);
+ assert(regs_out[21] == dbl_m1);
+ assert(regs_out[22] == dbl_p1);
+ assert(regs_out[23] == dbl_p1);
+ assert(regs_out[24] == dbl_p1);
+ assert(regs_out[25] == dbl_p1);
+ assert(regs_out[26] == dbl_p1);
+ assert(regs_out[27] == dbl_p1);
+ assert(regs_out[28] == dbl_p1);
+ assert(regs_out[29] == dbl_p1);
+ assert(regs_out[30] == dbl_p1);
+ assert(regs_out[31] == 0);
+ assert(((regs_out[32] >> 0) & 0b11111) == 0b01010);
+ assert(((regs_out[32] >> 5) & 0b111) == 0b100);
+
+ free(px0);
+ free(px1);
+
+ return 0;
+}
--- /dev/null
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:368)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:370)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:372)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:374)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:376)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:378)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:380)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:382)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:384)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:386)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:388)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:398)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:400)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:439)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:441)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:443)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:445)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:447)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:449)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:451)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:453)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:455)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:457)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:459)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:469)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:471)
+ Uninitialised value was created
+ at 0x........: main (context_float.c:177)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:510)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:511)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:514)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:515)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:516)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:518)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:519)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:522)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:524)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:525)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:526)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:528)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:529)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:530)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:531)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:532)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:533)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:534)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:535)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:536)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:537)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:538)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:539)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:114)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_float.c:541)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_float.c:110)
+
--- /dev/null
+Values before the signal:
+ f0=0
+ f1=0
+ f2=0
+ f3=0
+ f4=0x3ff0000000000000
+ f5=0x3ff0000000000000
+ f6=0x3ff0000000000000
+ f7=0x3ff0000000000000
+ f8=0x7fefffffffffffff
+ f9=0x7fefffffffffffff
+ f10=0x7fefffffffffffff
+ f11=0x7fefffffffffffff
+ f12=0
+ f13=0
+ f14=0
+ f15=0
+ f16=0
+ f17=0
+ f18=0
+ f19=0
+ f20=0
+ f21=0
+ f22=0
+ f23=0
+ f24=0
+ f25=0
+ f26=0
+ f27=0
+ f28=0
+ f29=0
+ f30=0
+ f31=0x3ff0000000000000
+ fcsr=0x35
+Values in the signal handler:
+ f0=0
+ f1=0
+ f2=0
+ f3=0
+ f4=0x3ff0000000000000
+ f5=0x3ff0000000000000
+ f6=0x3ff0000000000000
+ f7=0x3ff0000000000000
+ f8=0x7fefffffffffffff
+ f9=0x7fefffffffffffff
+ f10=0x7fefffffffffffff
+ f11=0x7fefffffffffffff
+ f12=0
+ f13=0
+ f14=0
+ f15=0
+ f16=0
+ f17=0
+ f18=0
+ f19=0
+ f20=0
+ f21=0
+ f22=0
+ f23=0
+ f24=0
+ f25=0
+ f26=0
+ f27=0
+ f28=0
+ f29=0
+ f30=0
+ f31=0x3ff0000000000000
+ fcsr=0x35
+Values after return from the signal handler:
+ f0=0
+ f1=0
+ f2=0
+ f3=0
+ f4=0x4000000000000000
+ f5=0x4000000000000000
+ f6=0x4000000000000000
+ f7=0x4000000000000000
+ f8=0x7fefffffffffffff
+ f9=0x7fefffffffffffff
+ f10=0
+ f11=0
+ f12=0x7fefffffffffffff
+ f13=0x7fefffffffffffff
+ f14=0
+ f15=0
+ f16=0
+ f17=0
+ f18=0xbff0000000000000
+ f19=0xbff0000000000000
+ f20=0xbff0000000000000
+ f21=0xbff0000000000000
+ f22=0x3ff0000000000000
+ f23=0x3ff0000000000000
+ f24=0x3ff0000000000000
+ f25=0x3ff0000000000000
+ f26=0x3ff0000000000000
+ f27=0x3ff0000000000000
+ f28=0x3ff0000000000000
+ f29=0x3ff0000000000000
+ f30=0x3ff0000000000000
+ f31=0
+ fcsr=0x8a
--- /dev/null
+prog: context_float
+vgopts: -q --track-origins=yes
--- /dev/null
+/* Test if values in integer registers are correctly propagated into and out of
+ a signal handler and also check that the same applies for uninitialised
+ values and their origins.
+
+ Register usage in the test:
+ zero (x0) -- unused
+ ra (x1) -- unused
+ sp (x2) -- unused
+ gp (x3) -- unused
+ tp (x4) -- unused
+
+ t0 (x5) -- holds address of regs_in
+ t1 (x6) -- holds address of regs_out
+ a0 (x10) -- current pid
+ a1 (x11) -- SIGUSR1
+ a7 (x17) -- SYS_kill
+
+ before signal -> in signal handler -> after return
+ t2 (x7) -- 0,def -> unchanged -> 0,def
+ s0 (x8) -- 0,undef -> unchanged -> 0,undef
+ s1 (x9) -- 0,def -> set to 0,undef -> 0,undef
+ a2 (x12) -- 0,undef -> set to 0,def -> 0,def
+ a3 (x13) -- 1,def -> increment by 1,def -> 2,def
+ a4 (x14) -- 1,undef -> increment by 1,def -> 2,undef
+ a5 (x15) -- 1,def -> increment by 1,undef -> 2,undef
+ a6 (x16) -- 1,undef -> increment by 1,undef -> 2,undef
+ s2 (x18) -- ULONG_MAX,def -> unchanged -> ULONG_MAX,def
+ s3 (x19) -- ULONG_MAX,undef -> unchanged -> ULONG_MAX,undef
+ s4 (x20) -- ULONG_MAX,def -> set to 0,undef -> 0,undef
+ s5 (x21) -- ULONG_MAX,undef -> set to 0,def -> 0,def
+ s6 (x22) -- 0,def -> set to ULONG_MAX,def -> ULONG_MAX,def
+ s7 (x23) -- 0,undef -> set to ULONG_MAX,undef -> ULONG_MAX,undef
+ s8 (x24) -- 0,def -> decrement by 0,def -> 0,def
+ s9 (x25) -- 0,undef -> decrement by 0,def -> 0,undef
+ s10 (x26) -- 0,def -> decrement by 0,undef -> 0,undef
+ s11 (x27) -- 0,undef -> decrement by 0,undef -> 0,undef
+ t3 (x28) -- 0,def -> decrement by 1,def -> ULONG_MAX,def
+ t4 (x29) -- 0,undef -> decrement by 1,def -> ULONG_MAX,undef
+ t5 (x30) -- 0,def -> decrement by 1,undef -> ULONG_MAX,undef
+ t6 (x31) -- 0,undef -> decrement by 1,undef -> ULONG_MAX,undef
+ */
+
+#include <assert.h>
+#include <limits.h>
+#include <signal.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/syscall.h>
+#include <sys/ucontext.h>
+#include <unistd.h>
+#include <valgrind.h>
+
+static ucontext_t uc;
+static unsigned long x0, x1;
+
+static void sighandler(int sig, siginfo_t* sip, void* arg)
+{
+ ucontext_t* ucp = (ucontext_t*)arg;
+
+ uc = *ucp;
+
+ ucp->uc_mcontext.__gregs[9] = x0;
+ ucp->uc_mcontext.__gregs[12] = 0;
+ ucp->uc_mcontext.__gregs[13] += 1;
+ ucp->uc_mcontext.__gregs[14] += 1;
+ ucp->uc_mcontext.__gregs[15] += x1;
+ ucp->uc_mcontext.__gregs[16] += x1;
+ ucp->uc_mcontext.__gregs[20] = x0;
+ ucp->uc_mcontext.__gregs[21] = 0;
+ ucp->uc_mcontext.__gregs[22] = ULONG_MAX;
+ ucp->uc_mcontext.__gregs[23] = ULONG_MAX + x0;
+ ucp->uc_mcontext.__gregs[24] -= 0;
+ ucp->uc_mcontext.__gregs[25] -= 0;
+ ucp->uc_mcontext.__gregs[26] -= x0;
+ ucp->uc_mcontext.__gregs[27] -= x0;
+ ucp->uc_mcontext.__gregs[28] -= 1;
+ ucp->uc_mcontext.__gregs[29] -= 1;
+ ucp->uc_mcontext.__gregs[30] -= x1;
+ ucp->uc_mcontext.__gregs[31] -= x1;
+}
+
+int main(void)
+{
+ /* Uninitialised, but we know px0[0] is 0x0. */
+ unsigned long* px0 = malloc(sizeof(*px0));
+ x0 = px0[0];
+
+ /* Uninitialised, but we know px1[0] is 0x0. */
+ unsigned long* px1 = malloc(sizeof(*px1));
+ x1 = px1[0] + 1;
+
+ struct sigaction sa = {};
+ sa.sa_sigaction = sighandler;
+ if (sigaction(SIGUSR1, &sa, NULL)) {
+ perror("sigaction");
+ return 1;
+ }
+
+ unsigned long regs_in[22] = {
+ 0, x0,
+ 0, x0,
+ 1, x1,
+ 1, x1,
+ ULONG_MAX, ULONG_MAX + x0,
+ ULONG_MAX, ULONG_MAX + x0,
+ 0, x0,
+ 0, x0,
+ 0, x0,
+ 0, x0,
+ 0, x0,
+ };
+ unsigned long regs_out[22] = {};
+
+ pid_t pid = getpid();
+ register unsigned long* t0 asm("t0") = regs_in;
+ register unsigned long* t1 asm("t1") = regs_out;
+ register unsigned long a7 asm("a7") = SYS_kill;
+ register unsigned long a0 asm("a0") = pid;
+ register unsigned long a1 asm("a1") = SIGUSR1;
+ __asm__ __volatile__(
+ /* Spill all test registers, keep the 16-byte sp alignment. */
+ "add sp, sp, -176\n\t"
+ "sd t2, 0(sp)\n\t"
+ "sd s0, 8(sp)\n\t"
+ "sd s1, 16(sp)\n\t"
+ "sd a2, 24(sp)\n\t"
+ "sd a3, 32(sp)\n\t"
+ "sd a4, 40(sp)\n\t"
+ "sd a5, 48(sp)\n\t"
+ "sd a6, 56(sp)\n\t"
+ "sd s2, 64(sp)\n\t"
+ "sd s3, 72(sp)\n\t"
+ "sd s4, 80(sp)\n\t"
+ "sd s5, 88(sp)\n\t"
+ "sd s6, 96(sp)\n\t"
+ "sd s7, 104(sp)\n\t"
+ "sd s8, 112(sp)\n\t"
+ "sd s9, 120(sp)\n\t"
+ "sd s10, 128(sp)\n\t"
+ "sd s11, 136(sp)\n\t"
+ "sd t3, 144(sp)\n\t"
+ "sd t4, 152(sp)\n\t"
+ "sd t5, 160(sp)\n\t"
+ "sd t6, 168(sp)\n\t"
+
+ /* Set values in the test registers. */
+ "ld t2, 0(%[in])\n\t"
+ "ld s0, 8(%[in])\n\t"
+ "ld s1, 16(%[in])\n\t"
+ "ld a2, 24(%[in])\n\t"
+ "ld a3, 32(%[in])\n\t"
+ "ld a4, 40(%[in])\n\t"
+ "ld a5, 48(%[in])\n\t"
+ "ld a6, 56(%[in])\n\t"
+ "ld s2, 64(%[in])\n\t"
+ "ld s3, 72(%[in])\n\t"
+ "ld s4, 80(%[in])\n\t"
+ "ld s5, 88(%[in])\n\t"
+ "ld s6, 96(%[in])\n\t"
+ "ld s7, 104(%[in])\n\t"
+ "ld s8, 112(%[in])\n\t"
+ "ld s9, 120(%[in])\n\t"
+ "ld s10, 128(%[in])\n\t"
+ "ld s11, 136(%[in])\n\t"
+ "ld t3, 144(%[in])\n\t"
+ "ld t4, 152(%[in])\n\t"
+ "ld t5, 160(%[in])\n\t"
+ "ld t6, 168(%[in])\n\t"
+
+ /* Trigger the signal handler. */
+ "ecall\n\t"
+
+ /* Store updated values in the test registers. */
+ "sd t2, 0(%[out])\n\t"
+ "sd s0, 8(%[out])\n\t"
+ "sd s1, 16(%[out])\n\t"
+ "sd a2, 24(%[out])\n\t"
+ "sd a3, 32(%[out])\n\t"
+ "sd a4, 40(%[out])\n\t"
+ "sd a5, 48(%[out])\n\t"
+ "sd a6, 56(%[out])\n\t"
+ "sd s2, 64(%[out])\n\t"
+ "sd s3, 72(%[out])\n\t"
+ "sd s4, 80(%[out])\n\t"
+ "sd s5, 88(%[out])\n\t"
+ "sd s6, 96(%[out])\n\t"
+ "sd s7, 104(%[out])\n\t"
+ "sd s8, 112(%[out])\n\t"
+ "sd s9, 120(%[out])\n\t"
+ "sd s10, 128(%[out])\n\t"
+ "sd s11, 136(%[out])\n\t"
+ "sd t3, 144(%[out])\n\t"
+ "sd t4, 152(%[out])\n\t"
+ "sd t5, 160(%[out])\n\t"
+ "sd t6, 168(%[out])\n\t"
+
+ /* Restore their original values. */
+ "ld t2, 0(sp)\n\t"
+ "ld s0, 8(sp)\n\t"
+ "ld s1, 16(sp)\n\t"
+ "ld a2, 24(sp)\n\t"
+ "ld a3, 32(sp)\n\t"
+ "ld a4, 40(sp)\n\t"
+ "ld a5, 48(sp)\n\t"
+ "ld a6, 56(sp)\n\t"
+ "ld s2, 64(sp)\n\t"
+ "ld s3, 72(sp)\n\t"
+ "ld s4, 80(sp)\n\t"
+ "ld s5, 88(sp)\n\t"
+ "ld s6, 96(sp)\n\t"
+ "ld s7, 104(sp)\n\t"
+ "ld s8, 112(sp)\n\t"
+ "ld s9, 120(sp)\n\t"
+ "ld s10, 128(sp)\n\t"
+ "ld s11, 136(sp)\n\t"
+ "ld t3, 144(sp)\n\t"
+ "ld t4, 152(sp)\n\t"
+ "ld t5, 160(sp)\n\t"
+ "ld t6, 168(sp)\n\t"
+ "add sp, sp, 176\n\t"
+ :
+ : [in] "r"(t0), [out] "r"(t1), "r"(a7), "r"(a0), "r"(a1)
+ : "memory");
+
+ printf("Values before the signal:\n");
+ VALGRIND_DISABLE_ERROR_REPORTING;
+ printf(" t2=%#lx\n", regs_in[0]);
+ printf(" s0=%#lx\n", regs_in[1]);
+ printf(" s1=%#lx\n", regs_in[2]);
+ printf(" a2=%#lx\n", regs_in[3]);
+ printf(" a3=%#lx\n", regs_in[4]);
+ printf(" a4=%#lx\n", regs_in[5]);
+ printf(" a5=%#lx\n", regs_in[6]);
+ printf(" a6=%#lx\n", regs_in[7]);
+ printf(" s2=%#lx\n", regs_in[8]);
+ printf(" s3=%#lx\n", regs_in[9]);
+ printf(" s4=%#lx\n", regs_in[10]);
+ printf(" s5=%#lx\n", regs_in[11]);
+ printf(" s6=%#lx\n", regs_in[12]);
+ printf(" s7=%#lx\n", regs_in[13]);
+ printf(" s8=%#lx\n", regs_in[14]);
+ printf(" s9=%#lx\n", regs_in[15]);
+ printf(" s10=%#lx\n", regs_in[16]);
+ printf(" s11=%#lx\n", regs_in[17]);
+ printf(" t3=%#lx\n", regs_in[18]);
+ printf(" t4=%#lx\n", regs_in[19]);
+ printf(" t5=%#lx\n", regs_in[20]);
+ printf(" t6=%#lx\n", regs_in[21]);
+ VALGRIND_ENABLE_ERROR_REPORTING;
+ /* Check which registers contain uninitialized values. */
+ assert(regs_in[0] == 0);
+ assert(regs_in[1] == 0);
+ assert(regs_in[2] == 0);
+ assert(regs_in[3] == 0);
+ assert(regs_in[4] == 1);
+ assert(regs_in[5] == 1);
+ assert(regs_in[6] == 1);
+ assert(regs_in[7] == 1);
+ assert(regs_in[8] == ULONG_MAX);
+ assert(regs_in[9] == ULONG_MAX);
+ assert(regs_in[10] == ULONG_MAX);
+ assert(regs_in[11] == ULONG_MAX);
+ assert(regs_in[12] == 0);
+ assert(regs_in[13] == 0);
+ assert(regs_in[14] == 0);
+ assert(regs_in[15] == 0);
+ assert(regs_in[16] == 0);
+ assert(regs_in[17] == 0);
+ assert(regs_in[18] == 0);
+ assert(regs_in[19] == 0);
+ assert(regs_in[20] == 0);
+ assert(regs_in[21] == 0);
+
+ printf("Values in the signal handler:\n");
+ VALGRIND_DISABLE_ERROR_REPORTING;
+ printf(" t2=%#lx\n", uc.uc_mcontext.__gregs[7]);
+ printf(" s0=%#lx\n", uc.uc_mcontext.__gregs[8]);
+ printf(" s1=%#lx\n", uc.uc_mcontext.__gregs[9]);
+ printf(" a2=%#lx\n", uc.uc_mcontext.__gregs[12]);
+ printf(" a3=%#lx\n", uc.uc_mcontext.__gregs[13]);
+ printf(" a4=%#lx\n", uc.uc_mcontext.__gregs[14]);
+ printf(" a5=%#lx\n", uc.uc_mcontext.__gregs[15]);
+ printf(" a6=%#lx\n", uc.uc_mcontext.__gregs[16]);
+ printf(" s2=%#lx\n", uc.uc_mcontext.__gregs[18]);
+ printf(" s3=%#lx\n", uc.uc_mcontext.__gregs[19]);
+ printf(" s4=%#lx\n", uc.uc_mcontext.__gregs[20]);
+ printf(" s5=%#lx\n", uc.uc_mcontext.__gregs[21]);
+ printf(" s6=%#lx\n", uc.uc_mcontext.__gregs[22]);
+ printf(" s7=%#lx\n", uc.uc_mcontext.__gregs[23]);
+ printf(" s8=%#lx\n", uc.uc_mcontext.__gregs[24]);
+ printf(" s9=%#lx\n", uc.uc_mcontext.__gregs[25]);
+ printf(" s10=%#lx\n", uc.uc_mcontext.__gregs[26]);
+ printf(" s11=%#lx\n", uc.uc_mcontext.__gregs[27]);
+ printf(" t3=%#lx\n", uc.uc_mcontext.__gregs[28]);
+ printf(" t4=%#lx\n", uc.uc_mcontext.__gregs[29]);
+ printf(" t5=%#lx\n", uc.uc_mcontext.__gregs[30]);
+ printf(" t6=%#lx\n", uc.uc_mcontext.__gregs[31]);
+ VALGRIND_ENABLE_ERROR_REPORTING;
+ assert(uc.uc_mcontext.__gregs[7] == 0);
+ assert(uc.uc_mcontext.__gregs[8] == 0);
+ assert(uc.uc_mcontext.__gregs[9] == 0);
+ assert(uc.uc_mcontext.__gregs[12] == 0);
+ assert(uc.uc_mcontext.__gregs[13] == 1);
+ assert(uc.uc_mcontext.__gregs[14] == 1);
+ assert(uc.uc_mcontext.__gregs[15] == 1);
+ assert(uc.uc_mcontext.__gregs[16] == 1);
+ assert(uc.uc_mcontext.__gregs[18] == ULONG_MAX);
+ assert(uc.uc_mcontext.__gregs[19] == ULONG_MAX);
+ assert(uc.uc_mcontext.__gregs[20] == ULONG_MAX);
+ assert(uc.uc_mcontext.__gregs[21] == ULONG_MAX);
+ assert(uc.uc_mcontext.__gregs[22] == 0);
+ assert(uc.uc_mcontext.__gregs[23] == 0);
+ assert(uc.uc_mcontext.__gregs[24] == 0);
+ assert(uc.uc_mcontext.__gregs[25] == 0);
+ assert(uc.uc_mcontext.__gregs[26] == 0);
+ assert(uc.uc_mcontext.__gregs[27] == 0);
+ assert(uc.uc_mcontext.__gregs[28] == 0);
+ assert(uc.uc_mcontext.__gregs[29] == 0);
+ assert(uc.uc_mcontext.__gregs[30] == 0);
+ assert(uc.uc_mcontext.__gregs[31] == 0);
+
+ printf("Values after return from the signal handler:\n");
+ VALGRIND_DISABLE_ERROR_REPORTING;
+ printf(" t2=%#lx\n", regs_out[0]);
+ printf(" s0=%#lx\n", regs_out[1]);
+ printf(" s1=%#lx\n", regs_out[2]);
+ printf(" a2=%#lx\n", regs_out[3]);
+ printf(" a3=%#lx\n", regs_out[4]);
+ printf(" a4=%#lx\n", regs_out[5]);
+ printf(" a5=%#lx\n", regs_out[6]);
+ printf(" a6=%#lx\n", regs_out[7]);
+ printf(" s2=%#lx\n", regs_out[8]);
+ printf(" s3=%#lx\n", regs_out[9]);
+ printf(" s4=%#lx\n", regs_out[10]);
+ printf(" s5=%#lx\n", regs_out[11]);
+ printf(" s6=%#lx\n", regs_out[12]);
+ printf(" s7=%#lx\n", regs_out[13]);
+ printf(" s8=%#lx\n", regs_out[14]);
+ printf(" s9=%#lx\n", regs_out[15]);
+ printf(" s10=%#lx\n", regs_out[16]);
+ printf(" s11=%#lx\n", regs_out[17]);
+ printf(" t3=%#lx\n", regs_out[18]);
+ printf(" t4=%#lx\n", regs_out[19]);
+ printf(" t5=%#lx\n", regs_out[20]);
+ printf(" t6=%#lx\n", regs_out[21]);
+ VALGRIND_ENABLE_ERROR_REPORTING;
+ assert(regs_out[0] == 0);
+ assert(regs_out[1] == 0);
+ assert(regs_out[2] == 0);
+ assert(regs_out[3] == 0);
+ assert(regs_out[4] == 2);
+ assert(regs_out[5] == 2);
+ assert(regs_out[6] == 2);
+ assert(regs_out[7] == 2);
+ assert(regs_out[8] == ULONG_MAX);
+ assert(regs_out[9] == ULONG_MAX);
+ assert(regs_out[10] == 0);
+ assert(regs_out[11] == 0);
+ assert(regs_out[12] == ULONG_MAX);
+ assert(regs_out[13] == ULONG_MAX);
+ assert(regs_out[14] == 0);
+ assert(regs_out[15] == 0);
+ assert(regs_out[16] == 0);
+ assert(regs_out[17] == 0);
+ assert(regs_out[18] == ULONG_MAX);
+ assert(regs_out[19] == ULONG_MAX);
+ assert(regs_out[20] == ULONG_MAX);
+ assert(regs_out[21] == ULONG_MAX);
+
+ free(px0);
+ free(px1);
+
+ return 0;
+}
--- /dev/null
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:252)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:254)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:256)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:89)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:258)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:89)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:260)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:262)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:264)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:266)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:268)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:270)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:272)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:300)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:302)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:304)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:89)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:306)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:89)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:308)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:310)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:312)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:314)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:316)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:318)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:320)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:348)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:349)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:352)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:89)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:353)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:89)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:354)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:89)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:356)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:357)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:360)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:362)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:363)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:364)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:366)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:85)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:367)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:89)
+
+Conditional jump or move depends on uninitialised value(s)
+ at 0x........: main (context_integer.c:368)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: main (context_integer.c:89)
+
--- /dev/null
+Values before the signal:
+ t2=0
+ s0=0
+ s1=0
+ a2=0
+ a3=0x1
+ a4=0x1
+ a5=0x1
+ a6=0x1
+ s2=0xffffffffffffffff
+ s3=0xffffffffffffffff
+ s4=0xffffffffffffffff
+ s5=0xffffffffffffffff
+ s6=0
+ s7=0
+ s8=0
+ s9=0
+ s10=0
+ s11=0
+ t3=0
+ t4=0
+ t5=0
+ t6=0
+Values in the signal handler:
+ t2=0
+ s0=0
+ s1=0
+ a2=0
+ a3=0x1
+ a4=0x1
+ a5=0x1
+ a6=0x1
+ s2=0xffffffffffffffff
+ s3=0xffffffffffffffff
+ s4=0xffffffffffffffff
+ s5=0xffffffffffffffff
+ s6=0
+ s7=0
+ s8=0
+ s9=0
+ s10=0
+ s11=0
+ t3=0
+ t4=0
+ t5=0
+ t6=0
+Values after return from the signal handler:
+ t2=0
+ s0=0
+ s1=0
+ a2=0
+ a3=0x2
+ a4=0x2
+ a5=0x2
+ a6=0x2
+ s2=0xffffffffffffffff
+ s3=0xffffffffffffffff
+ s4=0
+ s5=0
+ s6=0xffffffffffffffff
+ s7=0xffffffffffffffff
+ s8=0
+ s9=0
+ s10=0
+ s11=0
+ t3=0xffffffffffffffff
+ t4=0xffffffffffffffff
+ t5=0xffffffffffffffff
+ t6=0xffffffffffffffff
--- /dev/null
+prog: context_integer
+vgopts: -q --track-origins=yes
--- /dev/null
+#! /bin/sh
+
+../filter_stderr "$@"
--- /dev/null
+/* This is the riscv64 variant of memcheck/tests/x86-linux/scalar.c. It checks
+ a selected subset of all syscalls, ones that are in some way interesting from
+ the platform perspective. */
+
+#define _GNU_SOURCE
+#include "../../../include/vki/vki-scnums-riscv64-linux.h"
+#include "../../memcheck.h"
+#include <assert.h>
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/ptrace.h>
+#include <sys/syscall.h>
+#include <unistd.h>
+
+#define GO(__NR_xxx, s) \
+ fprintf(stderr, \
+ "-----------------------------------------------------\n" \
+ "%4d:%24s %s\n" \
+ "-----------------------------------------------------\n", \
+ __NR_xxx, #__NR_xxx, s);
+
+#define SY res = syscall
+#define FAIL assert(-1 == res);
+#define SUCC assert(-1 != res);
+
+#define FAILx(E) \
+ do { \
+ int myerrno = errno; \
+ if (-1 == res) { \
+ if (E == myerrno) { \
+ /* as expected */ \
+ } else { \
+ fprintf(stderr, "Expected error %s (%d), got %d\n", #E, E, \
+ myerrno); \
+ exit(1); \
+ } \
+ } else { \
+ fprintf(stderr, "Expected error %s (%d), got success\n", #E, E); \
+ exit(1); \
+ } \
+ } while (0);
+
+int main(void)
+{
+ /* Uninitialised, but we know px[0] is 0x0. */
+ long* px = malloc(sizeof(*px));
+ long x0 = px[0];
+ long res;
+
+ /* Check the syscall number 0 and two trivial generic syscalls. */
+
+ /* __NR_io_setup 0 */
+ GO(__NR_io_setup, "2s 1m");
+ SY(__NR_io_setup, x0, x0);
+ FAIL;
+
+ /* __NR_read 63 */
+ /* Nb: here we are also getting an error from the syscall arg itself. */
+ GO(__NR_read, "1+3s 1m");
+ SY(__NR_read + x0, x0, x0, x0 + 1);
+ FAIL;
+
+ /* __NR_write 64 */
+ GO(__NR_write, "3s 1m");
+ SY(__NR_write, x0, x0, x0 + 1);
+ FAIL;
+
+ /* Check syscalls not implemented by the kernel on riscv64 and explicitly
+ rejected by Valgrind. */
+
+ /* __NR_kexec_load 104 */
+ GO(__NR_kexec_load, "n/i");
+ SY(__NR_kexec_load);
+ FAILx(ENOSYS);
+
+ /* __NR_fadvise64 223 */
+ GO(__NR_fadvise64, "n/i");
+ SY(__NR_fadvise64);
+ FAILx(ENOSYS);
+
+ /* __NR_rseq 293 */
+ GO(__NR_rseq, "n/i");
+ SY(__NR_rseq);
+ FAILx(ENOSYS);
+
+ /* __NR_clone3 435 */
+ GO(__NR_clone3, "n/i");
+ SY(__NR_clone3);
+ FAILx(ENOSYS);
+
+ /* Check platform-specific wrappers. */
+
+ /* __NR_ptrace 117 */
+ GO(__NR_ptrace, "4s 1m");
+ SY(__NR_ptrace, x0 + PTRACE_PEEKTEXT, x0, x0, x0);
+ FAIL;
+
+ /* __NR_rt_sigreturn 139 */
+ /* Skipped as it is not valid to call this syscall within this context. */
+ GO(__NR_rt_sigreturn, "n/a");
+ /*SY(__NR_rt_sigreturn); FAIL;*/
+
+ /* __NR_mmap 222 */
+ GO(__NR_mmap, "6s 0m");
+ SY(__NR_mmap, x0, x0, x0, x0, x0 - 1, x0);
+ FAIL;
+
+ /* __NR_riscv_flush_icache 259 */
+ GO(__NR_riscv_flush_icache, "3s 0m");
+ SY(__NR_riscv_flush_icache, x0, x0, x0);
+ SUCC;
+
+ /* Finally, check an invalid syscall and __NR_exit. */
+
+ /* No such syscall... */
+ GO(9999, "1e");
+ SY(9999);
+ FAILx(ENOSYS);
+
+ /* __NR_exit 1 */
+ GO(__NR_exit, "1s 0m");
+ SY(__NR_exit, x0);
+ FAIL;
+
+ assert(0);
+}
--- /dev/null
+-----------------------------------------------------
+ 0: __NR_io_setup 2s 1m
+-----------------------------------------------------
+Syscall param io_setup(nr_events) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:55)
+
+Syscall param io_setup(ctxp) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:55)
+
+Syscall param io_setup(ctxp) points to unaddressable byte(s)
+ ...
+ by 0x........: main (scalar.c:55)
+ Address 0x........ is not stack'd, malloc'd or (recently) free'd
+
+-----------------------------------------------------
+ 63: __NR_read 1+3s 1m
+-----------------------------------------------------
+Syscall param (syscallno) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:61)
+
+Syscall param read(fd) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:61)
+
+Syscall param read(buf) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:61)
+
+Syscall param read(count) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:61)
+
+Syscall param read(buf) points to unaddressable byte(s)
+ ...
+ by 0x........: main (scalar.c:61)
+ Address 0x........ is not stack'd, malloc'd or (recently) free'd
+
+-----------------------------------------------------
+ 64: __NR_write 3s 1m
+-----------------------------------------------------
+Syscall param write(fd) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:66)
+
+Syscall param write(buf) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:66)
+
+Syscall param write(count) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:66)
+
+Syscall param write(buf) points to unaddressable byte(s)
+ ...
+ by 0x........: main (scalar.c:66)
+ Address 0x........ is not stack'd, malloc'd or (recently) free'd
+
+-----------------------------------------------------
+ 104: __NR_kexec_load n/i
+-----------------------------------------------------
+-----------------------------------------------------
+ 223: __NR_fadvise64 n/i
+-----------------------------------------------------
+-----------------------------------------------------
+ 293: __NR_rseq n/i
+-----------------------------------------------------
+-----------------------------------------------------
+ 435: __NR_clone3 n/i
+-----------------------------------------------------
+-----------------------------------------------------
+ 117: __NR_ptrace 4s 1m
+-----------------------------------------------------
+Syscall param ptrace(request) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:96)
+
+Syscall param ptrace(pid) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:96)
+
+Syscall param ptrace(addr) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:96)
+
+Syscall param ptrace(data) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:96)
+
+Syscall param ptrace(peek) points to unaddressable byte(s)
+ ...
+ by 0x........: main (scalar.c:96)
+ Address 0x........ is not stack'd, malloc'd or (recently) free'd
+
+-----------------------------------------------------
+ 139: __NR_rt_sigreturn n/a
+-----------------------------------------------------
+-----------------------------------------------------
+ 222: __NR_mmap 6s 0m
+-----------------------------------------------------
+Syscall param mmap(start) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:106)
+
+Syscall param mmap(length) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:106)
+
+Syscall param mmap(prot) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:106)
+
+Syscall param mmap(flags) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:106)
+
+Syscall param mmap(fd) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:106)
+
+Syscall param mmap(offset) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:106)
+
+-----------------------------------------------------
+ 259: __NR_riscv_flush_icache 3s 0m
+-----------------------------------------------------
+Syscall param riscv_flush_icache(start) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:111)
+
+Syscall param riscv_flush_icache(end) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:111)
+
+Syscall param riscv_flush_icache(flags) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:111)
+
+-----------------------------------------------------
+9999: 9999 1e
+-----------------------------------------------------
+WARNING: unhandled riscv64-linux syscall: 9999
+You may be able to write your own handler.
+Read the file README_MISSING_SYSCALL_OR_IOCTL.
+Nevertheless we consider this a bug. Please report
+it at http://valgrind.org/support/bug_reports.html.
+-----------------------------------------------------
+ 93: __NR_exit 1s 0m
+-----------------------------------------------------
+Syscall param exit(status) contains uninitialised byte(s)
+ ...
+ by 0x........: main (scalar.c:123)
+
--- /dev/null
+prog: scalar
+vgopts: -q --error-limit=no
+args: < scalar.c
--- /dev/null
+
+include $(top_srcdir)/Makefile.tool-tests.am
+
+dist_noinst_SCRIPTS = filter_stderr
+
+noinst_HEADERS = testinst.h
+
+EXTRA_DIST = \
+ atomic.stdout.exp atomic.stderr.exp atomic.vgtest \
+ compressed.stdout.exp compressed.stderr.exp compressed.vgtest \
+ csr.stdout.exp csr.stderr.exp csr.vgtest \
+ float32.stdout.exp float32.stderr.exp float32.vgtest \
+ float64.stdout.exp float64.stderr.exp float64.vgtest \
+ integer.stdout.exp integer.stderr.exp integer.vgtest \
+ muldiv.stdout.exp muldiv.stderr.exp muldiv.vgtest
+
+check_PROGRAMS = \
+ allexec \
+ atomic \
+ compressed \
+ csr \
+ float32 \
+ float64 \
+ integer \
+ muldiv
+
+AM_CFLAGS += @FLAG_M64@
+AM_CXXFLAGS += @FLAG_M64@
+AM_CCASFLAGS += @FLAG_M64@
+
+allexec_CFLAGS = $(AM_CFLAGS) @FLAG_W_NO_NONNULL@
--- /dev/null
+../allexec.c
\ No newline at end of file
--- /dev/null
+/* Tests for the RV64A standard atomic instruction-set extension. */
+
+#include "testinst.h"
+
+static void test_atomic_shared(void)
+{
+ printf("RV64A atomic instruction set, shared operations\n");
+
+ /* ------------------- lr.w rd, (rs1) -------------------- */
+ /* ----------------- sc.w rd, rs2, (rs1) ----------------- */
+ TESTINST_2_1_LRSC(4, "lr.w a0, (a2)", "sc.w a1, a0, (a2)", a0, a1, a2);
+
+ TESTINST_2_1_LRSC(4, "lr.w t4, (t6)", "sc.w t5, t4, (t6)", t4, t5, t6);
+ TESTINST_2_1_LRSC(4, "lr.w zero, (a1)", "sc.w a0, zero, (a1)", zero, a0, a1);
+ TESTINST_2_1_LRSC(4, "lr.w a0, (a1)", "sc.w zero, a0, (a1)", a0, zero, a1);
+
+ /* -------------- amoswap.w rd, rs2, (rs1) --------------- */
+ TESTINST_1_2_AMOX(4, "amoswap.w a0, a1, (a2)", 0xabcdef0123456789, a0, a1,
+ a2);
+
+ TESTINST_1_2_AMOX(4, "amoswap.w t4, t5, (t6)", 0xabcdef0123456789, t4, t5,
+ t6);
+ TESTINST_1_2_AMOX(4, "amoswap.w zero, a0, (a1)", 0xabcdef0123456789, zero,
+ a0, a1);
+ TESTINST_1_2_AMOX(4, "amoswap.w a0, zero, (a1)", 0xabcdef0123456789, a0,
+ zero, a1);
+
+ /* --------------- amoadd.w rd, rs2, (rs1) --------------- */
+ TESTINST_1_2_AMOX(4, "amoadd.w a0, a1, (a2)", 0xabcdef0123456789, a0, a1,
+ a2);
+
+ TESTINST_1_2_AMOX(4, "amoadd.w t4, t5, (t6)", 0xabcdef0123456789, t4, t5,
+ t6);
+ TESTINST_1_2_AMOX(4, "amoadd.w zero, a0, (a1)", 0xabcdef0123456789, zero, a0,
+ a1);
+ TESTINST_1_2_AMOX(4, "amoadd.w a0, zero, (a1)", 0xabcdef0123456789, a0, zero,
+ a1);
+
+ /* --------------- amoxor.w rd, rs2, (rs1) --------------- */
+ TESTINST_1_2_AMOX(4, "amoxor.w a0, a1, (a2)", 0xabcdef0123456789, a0, a1,
+ a2);
+
+ TESTINST_1_2_AMOX(4, "amoxor.w t4, t5, (t6)", 0xabcdef0123456789, t4, t5,
+ t6);
+ TESTINST_1_2_AMOX(4, "amoxor.w zero, a0, (a1)", 0xabcdef0123456789, zero, a0,
+ a1);
+ TESTINST_1_2_AMOX(4, "amoxor.w a0, zero, (a1)", 0xabcdef0123456789, a0, zero,
+ a1);
+
+ /* --------------- amoand.w rd, rs2, (rs1) --------------- */
+ TESTINST_1_2_AMOX(4, "amoand.w a0, a1, (a2)", 0xabcdef0123456789, a0, a1,
+ a2);
+
+ TESTINST_1_2_AMOX(4, "amoand.w t4, t5, (t6)", 0xabcdef0123456789, t4, t5,
+ t6);
+ TESTINST_1_2_AMOX(4, "amoand.w zero, a0, (a1)", 0xabcdef0123456789, zero, a0,
+ a1);
+ TESTINST_1_2_AMOX(4, "amoand.w a0, zero, (a1)", 0xabcdef0123456789, a0, zero,
+ a1);
+
+ /* --------------- amoor.w rd, rs2, (rs1) ---------------- */
+ TESTINST_1_2_AMOX(4, "amoor.w a0, a1, (a2)", 0xabcdef0123456789, a0, a1, a2);
+
+ TESTINST_1_2_AMOX(4, "amoor.w t4, t5, (t6)", 0xabcdef0123456789, t4, t5, t6);
+ TESTINST_1_2_AMOX(4, "amoor.w zero, a0, (a1)", 0xabcdef0123456789, zero, a0,
+ a1);
+ TESTINST_1_2_AMOX(4, "amoor.w a0, zero, (a1)", 0xabcdef0123456789, a0, zero,
+ a1);
+
+ /* --------------- amomin.w rd, rs2, (rs1) --------------- */
+ TESTINST_1_2_AMOX(4, "amomin.w a0, a1, (a2)", 0x0000000000000000, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amomin.w a0, a1, (a2)", 0x000000007fffffff, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amomin.w a0, a1, (a2)", 0x0000000080000000, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amomin.w a0, a1, (a2)", 0x00000000ffffffff, a0, a1,
+ a2);
+
+ TESTINST_1_2_AMOX(4, "amomin.w t4, t5, (t6)", 0xabcdef0123456789, t4, t5,
+ t6);
+ TESTINST_1_2_AMOX(4, "amomin.w zero, a0, (a1)", 0xabcdef0123456789, zero, a0,
+ a1);
+ TESTINST_1_2_AMOX(4, "amomin.w a0, zero, (a1)", 0xabcdef0123456789, a0, zero,
+ a1);
+
+ /* --------------- amomax.w rd, rs2, (rs1) --------------- */
+ TESTINST_1_2_AMOX(4, "amomax.w a0, a1, (a2)", 0x0000000000000000, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amomax.w a0, a1, (a2)", 0x000000007fffffff, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amomax.w a0, a1, (a2)", 0x0000000080000000, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amomax.w a0, a1, (a2)", 0x00000000ffffffff, a0, a1,
+ a2);
+
+ TESTINST_1_2_AMOX(4, "amomax.w t4, t5, (t6)", 0xabcdef0123456789, t4, t5,
+ t6);
+ TESTINST_1_2_AMOX(4, "amomax.w zero, a0, (a1)", 0xabcdef0123456789, zero, a0,
+ a1);
+ TESTINST_1_2_AMOX(4, "amomax.w a0, zero, (a1)", 0xabcdef0123456789, a0, zero,
+ a1);
+
+ /* -------------- amominu.w rd, rs2, (rs1) --------------- */
+ TESTINST_1_2_AMOX(4, "amominu.w a0, a1, (a2)", 0x0000000000000000, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amominu.w a0, a1, (a2)", 0x000000007fffffff, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amominu.w a0, a1, (a2)", 0x0000000080000000, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amominu.w a0, a1, (a2)", 0x00000000ffffffff, a0, a1,
+ a2);
+
+ TESTINST_1_2_AMOX(4, "amominu.w t4, t5, (t6)", 0xabcdef0123456789, t4, t5,
+ t6);
+ TESTINST_1_2_AMOX(4, "amominu.w zero, a0, (a1)", 0xabcdef0123456789, zero,
+ a0, a1);
+ TESTINST_1_2_AMOX(4, "amominu.w a0, zero, (a1)", 0xabcdef0123456789, a0,
+ zero, a1);
+
+ /* -------------- amomaxu.w rd, rs2, (rs1) --------------- */
+ TESTINST_1_2_AMOX(4, "amomaxu.w a0, a1, (a2)", 0x0000000000000000, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amomaxu.w a0, a1, (a2)", 0x000000007fffffff, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amomaxu.w a0, a1, (a2)", 0x0000000080000000, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amomaxu.w a0, a1, (a2)", 0x00000000ffffffff, a0, a1,
+ a2);
+
+ TESTINST_1_2_AMOX(4, "amomaxu.w t4, t5, (t6)", 0xabcdef0123456789, t4, t5,
+ t6);
+ TESTINST_1_2_AMOX(4, "amomaxu.w zero, a0, (a1)", 0xabcdef0123456789, zero,
+ a0, a1);
+ TESTINST_1_2_AMOX(4, "amomaxu.w a0, zero, (a1)", 0xabcdef0123456789, a0,
+ zero, a1);
+
+ printf("\n");
+}
+
+static void test_atomic_additions(void)
+{
+ printf("RV64A atomic instruction set, additions\n");
+
+ /* ------------------- lr.d rd, (rs1) -------------------- */
+ /* ----------------- sc.d rd, rs2, (rs1) ----------------- */
+ TESTINST_2_1_LRSC(4, "lr.d a0, (a2)", "sc.d a1, a0, (a2)", a0, a1, a2);
+
+ TESTINST_2_1_LRSC(4, "lr.d t4, (t6)", "sc.d t5, t4, (t6)", t4, t5, t6);
+ TESTINST_2_1_LRSC(4, "lr.d zero, (a1)", "sc.d a0, zero, (a1)", zero, a0, a1);
+ TESTINST_2_1_LRSC(4, "lr.d a0, (a1)", "sc.d zero, a0, (a1)", a0, zero, a1);
+
+ /* -------------- amoswap.d rd, rs2, (rs1) --------------- */
+ TESTINST_1_2_AMOX(4, "amoswap.d a0, a1, (a2)", 0xabcdef0123456789, a0, a1,
+ a2);
+
+ TESTINST_1_2_AMOX(4, "amoswap.d t4, t5, (t6)", 0xabcdef0123456789, t4, t5,
+ t6);
+ TESTINST_1_2_AMOX(4, "amoswap.d zero, a0, (a1)", 0xabcdef0123456789, zero,
+ a0, a1);
+ TESTINST_1_2_AMOX(4, "amoswap.d a0, zero, (a1)", 0xabcdef0123456789, a0,
+ zero, a1);
+
+ /* --------------- amoadd.d rd, rs2, (rs1) --------------- */
+ TESTINST_1_2_AMOX(4, "amoadd.d a0, a1, (a2)", 0xabcdef0123456789, a0, a1,
+ a2);
+
+ TESTINST_1_2_AMOX(4, "amoadd.d t4, t5, (t6)", 0xabcdef0123456789, t4, t5,
+ t6);
+ TESTINST_1_2_AMOX(4, "amoadd.d zero, a0, (a1)", 0xabcdef0123456789, zero, a0,
+ a1);
+ TESTINST_1_2_AMOX(4, "amoadd.d a0, zero, (a1)", 0xabcdef0123456789, a0, zero,
+ a1);
+
+ /* --------------- amoxor.d rd, rs2, (rs1) --------------- */
+ TESTINST_1_2_AMOX(4, "amoxor.d a0, a1, (a2)", 0xabcdef0123456789, a0, a1,
+ a2);
+
+ TESTINST_1_2_AMOX(4, "amoxor.d t4, t5, (t6)", 0xabcdef0123456789, t4, t5,
+ t6);
+ TESTINST_1_2_AMOX(4, "amoxor.d zero, a0, (a1)", 0xabcdef0123456789, zero, a0,
+ a1);
+ TESTINST_1_2_AMOX(4, "amoxor.d a0, zero, (a1)", 0xabcdef0123456789, a0, zero,
+ a1);
+
+ /* --------------- amoand.d rd, rs2, (rs1) --------------- */
+ TESTINST_1_2_AMOX(4, "amoand.d a0, a1, (a2)", 0xabcdef0123456789, a0, a1,
+ a2);
+
+ TESTINST_1_2_AMOX(4, "amoand.d t4, t5, (t6)", 0xabcdef0123456789, t4, t5,
+ t6);
+ TESTINST_1_2_AMOX(4, "amoand.d zero, a0, (a1)", 0xabcdef0123456789, zero, a0,
+ a1);
+ TESTINST_1_2_AMOX(4, "amoand.d a0, zero, (a1)", 0xabcdef0123456789, a0, zero,
+ a1);
+
+ /* --------------- amoor.d rd, rs2, (rs1) ---------------- */
+ TESTINST_1_2_AMOX(4, "amoor.d a0, a1, (a2)", 0xabcdef0123456789, a0, a1, a2);
+
+ TESTINST_1_2_AMOX(4, "amoor.d t4, t5, (t6)", 0xabcdef0123456789, t4, t5, t6);
+ TESTINST_1_2_AMOX(4, "amoor.d zero, a0, (a1)", 0xabcdef0123456789, zero, a0,
+ a1);
+ TESTINST_1_2_AMOX(4, "amoor.d a0, zero, (a1)", 0xabcdef0123456789, a0, zero,
+ a1);
+
+ /* --------------- amomin.d rd, rs2, (rs1) --------------- */
+ TESTINST_1_2_AMOX(4, "amomin.d a0, a1, (a2)", 0x0000000000000000, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amomin.d a0, a1, (a2)", 0x7fffffffffffffff, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amomin.d a0, a1, (a2)", 0x8000000000000000, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amomin.d a0, a1, (a2)", 0xffffffffffffffff, a0, a1,
+ a2);
+
+ TESTINST_1_2_AMOX(4, "amomin.d t4, t5, (t6)", 0xabcdef0123456789, t4, t5,
+ t6);
+ TESTINST_1_2_AMOX(4, "amomin.d zero, a0, (a1)", 0xabcdef0123456789, zero, a0,
+ a1);
+ TESTINST_1_2_AMOX(4, "amomin.d a0, zero, (a1)", 0xabcdef0123456789, a0, zero,
+ a1);
+
+ /* --------------- amomax.d rd, rs2, (rs1) --------------- */
+ TESTINST_1_2_AMOX(4, "amomax.d a0, a1, (a2)", 0x0000000000000000, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amomax.d a0, a1, (a2)", 0x7fffffffffffffff, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amomax.d a0, a1, (a2)", 0x8000000000000000, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amomax.d a0, a1, (a2)", 0xffffffffffffffff, a0, a1,
+ a2);
+
+ TESTINST_1_2_AMOX(4, "amomax.d t4, t5, (t6)", 0xabcdef0123456789, t4, t5,
+ t6);
+ TESTINST_1_2_AMOX(4, "amomax.d zero, a0, (a1)", 0xabcdef0123456789, zero, a0,
+ a1);
+ TESTINST_1_2_AMOX(4, "amomax.d a0, zero, (a1)", 0xabcdef0123456789, a0, zero,
+ a1);
+
+ /* -------------- amominu.d rd, rs2, (rs1) --------------- */
+ TESTINST_1_2_AMOX(4, "amominu.d a0, a1, (a2)", 0x0000000000000000, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amominu.d a0, a1, (a2)", 0x7fffffffffffffff, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amominu.d a0, a1, (a2)", 0x8000000000000000, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amominu.d a0, a1, (a2)", 0xffffffffffffffff, a0, a1,
+ a2);
+
+ TESTINST_1_2_AMOX(4, "amominu.d t4, t5, (t6)", 0xabcdef0123456789, t4, t5,
+ t6);
+ TESTINST_1_2_AMOX(4, "amominu.d zero, a0, (a1)", 0xabcdef0123456789, zero,
+ a0, a1);
+ TESTINST_1_2_AMOX(4, "amominu.d a0, zero, (a1)", 0xabcdef0123456789, a0,
+ zero, a1);
+
+ /* -------------- amomaxu.d rd, rs2, (rs1) --------------- */
+ TESTINST_1_2_AMOX(4, "amomaxu.d a0, a1, (a2)", 0x0000000000000000, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amomaxu.d a0, a1, (a2)", 0x7fffffffffffffff, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amomaxu.d a0, a1, (a2)", 0x8000000000000000, a0, a1,
+ a2);
+ TESTINST_1_2_AMOX(4, "amomaxu.d a0, a1, (a2)", 0xffffffffffffffff, a0, a1,
+ a2);
+
+ TESTINST_1_2_AMOX(4, "amomaxu.d t4, t5, (t6)", 0xabcdef0123456789, t4, t5,
+ t6);
+ TESTINST_1_2_AMOX(4, "amomaxu.d zero, a0, (a1)", 0xabcdef0123456789, zero,
+ a0, a1);
+ TESTINST_1_2_AMOX(4, "amomaxu.d a0, zero, (a1)", 0xabcdef0123456789, a0,
+ zero, a1);
+}
+
+int main(void)
+{
+ test_atomic_shared();
+ test_atomic_additions();
+ return 0;
+}
--- /dev/null
+RV64A atomic instruction set, shared operations
+lr.w a0, (a2) ::
+ inputs: a2=&area_mid
+ output: a0=0xffffffffaf27d13b
+sc.w a1, a0, (a2) ::
+ inputs: a2=&area_mid, a0=0x0000000050d82ec4
+ output: a1=0x0000000000000000
+ [+000] c4 2e d8 50 .. .. .. .. .. .. .. .. .. .. .. ..
+sc.w a1, a0, (a2) ::
+ inputs: a2=&area_mid, a0=0xffffffffaf27d13b
+ output: a1=0x0000000000000001
+lr.w t4, (t6) ::
+ inputs: t6=&area_mid
+ output: t4=0x0000000056a044b2
+sc.w t5, t4, (t6) ::
+ inputs: t6=&area_mid, t4=0xffffffffa95fbb4d
+ output: t5=0x0000000000000000
+ [+000] 4d bb 5f a9 .. .. .. .. .. .. .. .. .. .. .. ..
+sc.w t5, t4, (t6) ::
+ inputs: t6=&area_mid, t4=0x0000000056a044b2
+ output: t5=0x0000000000000001
+lr.w zero, (a1) ::
+ inputs: a1=&area_mid
+ output: zero=0x0000000000000000
+sc.w a0, zero, (a1) ::
+ inputs: a1=&area_mid, zero=0x0000000000000000
+ output: a0=0x0000000000000000
+ [+000] 00 00 00 00 .. .. .. .. .. .. .. .. .. .. .. ..
+sc.w a0, zero, (a1) ::
+ inputs: a1=&area_mid, zero=0x0000000000000000
+ output: a0=0x0000000000000001
+lr.w a0, (a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffffb7839b97
+sc.w zero, a0, (a1) ::
+ inputs: a1=&area_mid, a0=0x00000000487c6468
+ output: zero=0x0000000000000000
+ [+000] 68 64 7c 48 .. .. .. .. .. .. .. .. .. .. .. ..
+sc.w zero, a0, (a1) ::
+ inputs: a1=&area_mid, a0=0xffffffffb7839b97
+ output: zero=0x0000000000000000
+amoswap.w a0, a1, (a2) ::
+ inputs: a1=0xabcdef0123456789, a2=&area_mid
+ output: a0=0xffffffffa705f65d
+ [+000] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+amoswap.w t4, t5, (t6) ::
+ inputs: t5=0xabcdef0123456789, t6=&area_mid
+ output: t4=0x000000003df76c96
+ [+000] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+amoswap.w zero, a0, (a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ output: zero=0x0000000000000000
+ [+000] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+amoswap.w a0, zero, (a1) ::
+ inputs: zero=0xabcdef0123456789, a1=&area_mid
+ output: a0=0xffffffffc95c9810
+ [+000] 00 00 00 00 .. .. .. .. .. .. .. .. .. .. .. ..
+amoadd.w a0, a1, (a2) ::
+ inputs: a1=0xabcdef0123456789, a2=&area_mid
+ output: a0=0xfffffffff7e8c6a9
+ [+000] 32 2e 2e 1b .. .. .. .. .. .. .. .. .. .. .. ..
+amoadd.w t4, t5, (t6) ::
+ inputs: t5=0xabcdef0123456789, t6=&area_mid
+ output: t4=0x000000003b13ff64
+ [+000] ed 66 59 5e .. .. .. .. .. .. .. .. .. .. .. ..
+amoadd.w zero, a0, (a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ output: zero=0x0000000000000000
+ [+000] f7 65 31 d4 .. .. .. .. .. .. .. .. .. .. .. ..
+amoadd.w a0, zero, (a1) ::
+ inputs: zero=0xabcdef0123456789, a1=&area_mid
+ output: a0=0x00000000727c80f3
+ no memory changes
+amoxor.w a0, a1, (a2) ::
+ inputs: a1=0xabcdef0123456789, a2=&area_mid
+ output: a0=0xffffffff9ed0411e
+ [+000] 97 26 95 bd .. .. .. .. .. .. .. .. .. .. .. ..
+amoxor.w t4, t5, (t6) ::
+ inputs: t5=0xabcdef0123456789, t6=&area_mid
+ output: t4=0x0000000050f6fd1c
+ [+000] 95 9a b3 73 .. .. .. .. .. .. .. .. .. .. .. ..
+amoxor.w zero, a0, (a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ output: zero=0x0000000000000000
+ [+000] 91 17 b2 80 .. .. .. .. .. .. .. .. .. .. .. ..
+amoxor.w a0, zero, (a1) ::
+ inputs: zero=0xabcdef0123456789, a1=&area_mid
+ output: a0=0xffffffffb3e1553f
+ no memory changes
+amoand.w a0, a1, (a2) ::
+ inputs: a1=0xabcdef0123456789, a2=&area_mid
+ output: a0=0xffffffff9dbf68bc
+ [+000] 88 60 05 01 .. .. .. .. .. .. .. .. .. .. .. ..
+amoand.w t4, t5, (t6) ::
+ inputs: t5=0xabcdef0123456789, t6=&area_mid
+ output: t4=0x000000007d9d67bc
+ [+000] 88 .. 05 21 .. .. .. .. .. .. .. .. .. .. .. ..
+amoand.w zero, a0, (a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ output: zero=0x0000000000000000
+ [+000] 09 04 00 22 .. .. .. .. .. .. .. .. .. .. .. ..
+amoand.w a0, zero, (a1) ::
+ inputs: zero=0xabcdef0123456789, a1=&area_mid
+ output: a0=0xffffffff8c8b14f4
+ [+000] 00 00 00 00 .. .. .. .. .. .. .. .. .. .. .. ..
+amoor.w a0, a1, (a2) ::
+ inputs: a1=0xabcdef0123456789, a2=&area_mid
+ output: a0=0xfffffffff4b23b84
+ [+000] 8d 7f f7 f7 .. .. .. .. .. .. .. .. .. .. .. ..
+amoor.w t4, t5, (t6) ::
+ inputs: t5=0xabcdef0123456789, t6=&area_mid
+ output: t4=0xffffffffc10a3c47
+ [+000] cf 7f 4f e3 .. .. .. .. .. .. .. .. .. .. .. ..
+amoor.w zero, a0, (a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ output: zero=0x0000000000000000
+ [+000] e9 f7 df 33 .. .. .. .. .. .. .. .. .. .. .. ..
+amoor.w a0, zero, (a1) ::
+ inputs: zero=0xabcdef0123456789, a1=&area_mid
+ output: a0=0xfffffffffc7bc013
+ no memory changes
+amomin.w a0, a1, (a2) ::
+ inputs: a1=0x0000000000000000, a2=&area_mid
+ output: a0=0xffffffffa2acb976
+ no memory changes
+amomin.w a0, a1, (a2) ::
+ inputs: a1=0x000000007fffffff, a2=&area_mid
+ output: a0=0x000000001d3d7dbb
+ no memory changes
+amomin.w a0, a1, (a2) ::
+ inputs: a1=0x0000000080000000, a2=&area_mid
+ output: a0=0xffffffff8a3ac80e
+ [+000] 00 00 00 80 .. .. .. .. .. .. .. .. .. .. .. ..
+amomin.w a0, a1, (a2) ::
+ inputs: a1=0x00000000ffffffff, a2=&area_mid
+ output: a0=0x0000000004b0569c
+ [+000] ff ff ff ff .. .. .. .. .. .. .. .. .. .. .. ..
+amomin.w t4, t5, (t6) ::
+ inputs: t5=0xabcdef0123456789, t6=&area_mid
+ output: t4=0xffffffffa7aae391
+ no memory changes
+amomin.w zero, a0, (a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ output: zero=0x0000000000000000
+ no memory changes
+amomin.w a0, zero, (a1) ::
+ inputs: zero=0xabcdef0123456789, a1=&area_mid
+ output: a0=0xffffffffdb5ce85e
+ no memory changes
+amomax.w a0, a1, (a2) ::
+ inputs: a1=0x0000000000000000, a2=&area_mid
+ output: a0=0xffffffffa32bd88e
+ [+000] 00 00 00 00 .. .. .. .. .. .. .. .. .. .. .. ..
+amomax.w a0, a1, (a2) ::
+ inputs: a1=0x000000007fffffff, a2=&area_mid
+ output: a0=0x0000000004afb8d5
+ [+000] ff ff ff 7f .. .. .. .. .. .. .. .. .. .. .. ..
+amomax.w a0, a1, (a2) ::
+ inputs: a1=0x0000000080000000, a2=&area_mid
+ output: a0=0x000000001bf2425f
+ no memory changes
+amomax.w a0, a1, (a2) ::
+ inputs: a1=0x00000000ffffffff, a2=&area_mid
+ output: a0=0x0000000004033357
+ no memory changes
+amomax.w t4, t5, (t6) ::
+ inputs: t5=0xabcdef0123456789, t6=&area_mid
+ output: t4=0xffffffffd9eb46ea
+ [+000] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+amomax.w zero, a0, (a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ output: zero=0x0000000000000000
+ [+000] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+amomax.w a0, zero, (a1) ::
+ inputs: zero=0xabcdef0123456789, a1=&area_mid
+ output: a0=0xffffffffbd76c58f
+ [+000] 00 00 00 00 .. .. .. .. .. .. .. .. .. .. .. ..
+amominu.w a0, a1, (a2) ::
+ inputs: a1=0x0000000000000000, a2=&area_mid
+ output: a0=0x00000000042fa9fa
+ [+000] 00 00 00 00 .. .. .. .. .. .. .. .. .. .. .. ..
+amominu.w a0, a1, (a2) ::
+ inputs: a1=0x000000007fffffff, a2=&area_mid
+ output: a0=0xffffffffa7f19faf
+ [+000] ff ff ff 7f .. .. .. .. .. .. .. .. .. .. .. ..
+amominu.w a0, a1, (a2) ::
+ inputs: a1=0x0000000080000000, a2=&area_mid
+ output: a0=0xffffffffc5c764db
+ [+000] 00 00 00 80 .. .. .. .. .. .. .. .. .. .. .. ..
+amominu.w a0, a1, (a2) ::
+ inputs: a1=0x00000000ffffffff, a2=&area_mid
+ output: a0=0x0000000077beb4a9
+ no memory changes
+amominu.w t4, t5, (t6) ::
+ inputs: t5=0xabcdef0123456789, t6=&area_mid
+ output: t4=0xffffffffdbe14b46
+ [+000] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+amominu.w zero, a0, (a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ output: zero=0x0000000000000000
+ no memory changes
+amominu.w a0, zero, (a1) ::
+ inputs: zero=0xabcdef0123456789, a1=&area_mid
+ output: a0=0x0000000028dc3c9c
+ [+000] 00 00 00 00 .. .. .. .. .. .. .. .. .. .. .. ..
+amomaxu.w a0, a1, (a2) ::
+ inputs: a1=0x0000000000000000, a2=&area_mid
+ output: a0=0x0000000049cc0fac
+ no memory changes
+amomaxu.w a0, a1, (a2) ::
+ inputs: a1=0x000000007fffffff, a2=&area_mid
+ output: a0=0xffffffff8b19183c
+ no memory changes
+amomaxu.w a0, a1, (a2) ::
+ inputs: a1=0x0000000080000000, a2=&area_mid
+ output: a0=0x000000000acd1475
+ [+000] 00 00 00 80 .. .. .. .. .. .. .. .. .. .. .. ..
+amomaxu.w a0, a1, (a2) ::
+ inputs: a1=0x00000000ffffffff, a2=&area_mid
+ output: a0=0xffffffffe3f6bf86
+ [+000] ff ff ff ff .. .. .. .. .. .. .. .. .. .. .. ..
+amomaxu.w t4, t5, (t6) ::
+ inputs: t5=0xabcdef0123456789, t6=&area_mid
+ output: t4=0x0000000031a0d599
+ no memory changes
+amomaxu.w zero, a0, (a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ output: zero=0x0000000000000000
+ [+000] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+amomaxu.w a0, zero, (a1) ::
+ inputs: zero=0xabcdef0123456789, a1=&area_mid
+ output: a0=0xffffffff9fa43077
+ no memory changes
+
+RV64A atomic instruction set, additions
+lr.d a0, (a2) ::
+ inputs: a2=&area_mid
+ output: a0=0x05d75ec6f616ee9a
+sc.d a1, a0, (a2) ::
+ inputs: a2=&area_mid, a0=0xfa28a13909e91165
+ output: a1=0x0000000000000000
+ [+000] 65 11 e9 09 39 a1 28 fa .. .. .. .. .. .. .. ..
+sc.d a1, a0, (a2) ::
+ inputs: a2=&area_mid, a0=0x05d75ec6f616ee9a
+ output: a1=0x0000000000000001
+lr.d t4, (t6) ::
+ inputs: t6=&area_mid
+ output: t4=0x141625713239066f
+sc.d t5, t4, (t6) ::
+ inputs: t6=&area_mid, t4=0xebe9da8ecdc6f990
+ output: t5=0x0000000000000000
+ [+000] 90 f9 c6 cd 8e da e9 eb .. .. .. .. .. .. .. ..
+sc.d t5, t4, (t6) ::
+ inputs: t6=&area_mid, t4=0x141625713239066f
+ output: t5=0x0000000000000001
+lr.d zero, (a1) ::
+ inputs: a1=&area_mid
+ output: zero=0x0000000000000000
+sc.d a0, zero, (a1) ::
+ inputs: a1=&area_mid, zero=0x0000000000000000
+ output: a0=0x0000000000000000
+ [+000] 00 00 00 00 00 00 00 00 .. .. .. .. .. .. .. ..
+sc.d a0, zero, (a1) ::
+ inputs: a1=&area_mid, zero=0x0000000000000000
+ output: a0=0x0000000000000001
+lr.d a0, (a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xf2db8f44cbbf37e2
+sc.d zero, a0, (a1) ::
+ inputs: a1=&area_mid, a0=0x0d2470bb3440c81d
+ output: zero=0x0000000000000000
+ [+000] 1d c8 40 34 bb 70 24 0d .. .. .. .. .. .. .. ..
+sc.d zero, a0, (a1) ::
+ inputs: a1=&area_mid, a0=0xf2db8f44cbbf37e2
+ output: zero=0x0000000000000000
+amoswap.d a0, a1, (a2) ::
+ inputs: a1=0xabcdef0123456789, a2=&area_mid
+ output: a0=0x78fb29445f3bc8d7
+ [+000] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+amoswap.d t4, t5, (t6) ::
+ inputs: t5=0xabcdef0123456789, t6=&area_mid
+ output: t4=0x34a901384a97a32f
+ [+000] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+amoswap.d zero, a0, (a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ output: zero=0x0000000000000000
+ [+000] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+amoswap.d a0, zero, (a1) ::
+ inputs: zero=0xabcdef0123456789, a1=&area_mid
+ output: a0=0xb9dd5dab8e212ab7
+ [+000] 00 00 00 00 00 00 00 00 .. .. .. .. .. .. .. ..
+amoadd.d a0, a1, (a2) ::
+ inputs: a1=0xabcdef0123456789, a2=&area_mid
+ output: a0=0x3bfcd80321664d3e
+ [+000] c7 b4 ab 44 04 c7 ca e7 .. .. .. .. .. .. .. ..
+amoadd.d t4, t5, (t6) ::
+ inputs: t5=0xabcdef0123456789, t6=&area_mid
+ output: t4=0x63d9810079bbabd9
+ [+000] 62 13 01 9d 01 70 a7 0f .. .. .. .. .. .. .. ..
+amoadd.d zero, a0, (a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ output: zero=0x0000000000000000
+ [+000] 3a 68 72 d5 8d c4 0e b7 .. .. .. .. .. .. .. ..
+amoadd.d a0, zero, (a1) ::
+ inputs: zero=0xabcdef0123456789, a1=&area_mid
+ output: a0=0x10fd4e94e9c808f5
+ no memory changes
+amoxor.d a0, a1, (a2) ::
+ inputs: a1=0xabcdef0123456789, a2=&area_mid
+ output: a0=0x4edb6a053a967ecf
+ [+000] 46 19 d3 19 04 85 16 e5 .. .. .. .. .. .. .. ..
+amoxor.d t4, t5, (t6) ::
+ inputs: t5=0xabcdef0123456789, t6=&area_mid
+ output: t4=0xa1a7a4c9c0a51f6b
+ [+000] e2 78 e0 e3 c8 4b 6a 0a .. .. .. .. .. .. .. ..
+amoxor.d zero, a0, (a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ output: zero=0x0000000000000000
+ [+000] 7e c0 45 b4 cf 96 e3 4e .. .. .. .. .. .. .. ..
+amoxor.d a0, zero, (a1) ::
+ inputs: zero=0xabcdef0123456789, a1=&area_mid
+ output: a0=0xf63a63fedcb4d29c
+ no memory changes
+amoand.d a0, a1, (a2) ::
+ inputs: a1=0xabcdef0123456789, a2=&area_mid
+ output: a0=0xb097e047aacc5b89
+ [+000] .. 43 44 22 01 .. 85 a0 .. .. .. .. .. .. .. ..
+amoand.d t4, t5, (t6) ::
+ inputs: t5=0xabcdef0123456789, t6=&area_mid
+ output: t4=0xef136b941e54ffe8
+ [+000] 88 67 44 02 00 .. 01 ab .. .. .. .. .. .. .. ..
+amoand.d zero, a0, (a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ output: zero=0x0000000000000000
+ [+000] 81 61 41 03 01 .. 49 8b .. .. .. .. .. .. .. ..
+amoand.d a0, zero, (a1) ::
+ inputs: zero=0xabcdef0123456789, a1=&area_mid
+ output: a0=0x6c949cea66e687ae
+ [+000] 00 00 00 00 00 00 00 00 .. .. .. .. .. .. .. ..
+amoor.d a0, a1, (a2) ::
+ inputs: a1=0xabcdef0123456789, a2=&area_mid
+ output: a0=0x623139cb7207e36c
+ [+000] ed e7 47 73 .. ff fd eb .. .. .. .. .. .. .. ..
+amoor.d t4, t5, (t6) ::
+ inputs: t5=0xabcdef0123456789, t6=&area_mid
+ output: t4=0x4c1cd56194c94a4e
+ [+000] cf 6f cd b7 .. ff dd ef .. .. .. .. .. .. .. ..
+amoor.d zero, a0, (a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ output: zero=0x0000000000000000
+ [+000] ff .. 77 .. 97 ef ed ab .. .. .. .. .. .. .. ..
+amoor.d a0, zero, (a1) ::
+ inputs: zero=0xabcdef0123456789, a1=&area_mid
+ output: a0=0x710cf757885d2728
+ no memory changes
+amomin.d a0, a1, (a2) ::
+ inputs: a1=0x0000000000000000, a2=&area_mid
+ output: a0=0x63a8769192481679
+ [+000] 00 00 00 00 00 00 00 00 .. .. .. .. .. .. .. ..
+amomin.d a0, a1, (a2) ::
+ inputs: a1=0x7fffffffffffffff, a2=&area_mid
+ output: a0=0xb9c3e32f2103009d
+ no memory changes
+amomin.d a0, a1, (a2) ::
+ inputs: a1=0x8000000000000000, a2=&area_mid
+ output: a0=0x5127ba1c529aa0bf
+ [+000] 00 00 00 00 00 00 00 80 .. .. .. .. .. .. .. ..
+amomin.d a0, a1, (a2) ::
+ inputs: a1=0xffffffffffffffff, a2=&area_mid
+ output: a0=0x06a17746411ab40c
+ [+000] ff ff ff ff ff ff ff ff .. .. .. .. .. .. .. ..
+amomin.d t4, t5, (t6) ::
+ inputs: t5=0xabcdef0123456789, t6=&area_mid
+ output: t4=0xb3fd9698098ef5b0
+ [+000] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+amomin.d zero, a0, (a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ output: zero=0x0000000000000000
+ [+000] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+amomin.d a0, zero, (a1) ::
+ inputs: zero=0xabcdef0123456789, a1=&area_mid
+ output: a0=0x698bec649583f5aa
+ [+000] 00 00 00 00 00 00 00 00 .. .. .. .. .. .. .. ..
+amomax.d a0, a1, (a2) ::
+ inputs: a1=0x0000000000000000, a2=&area_mid
+ output: a0=0x2a541ab7911c2b5a
+ no memory changes
+amomax.d a0, a1, (a2) ::
+ inputs: a1=0x7fffffffffffffff, a2=&area_mid
+ output: a0=0x532f9ae1d7da8010
+ [+000] ff ff ff ff ff ff ff 7f .. .. .. .. .. .. .. ..
+amomax.d a0, a1, (a2) ::
+ inputs: a1=0x8000000000000000, a2=&area_mid
+ output: a0=0xc2e9e9cf82c7aff8
+ no memory changes
+amomax.d a0, a1, (a2) ::
+ inputs: a1=0xffffffffffffffff, a2=&area_mid
+ output: a0=0x514c816eaff2763f
+ no memory changes
+amomax.d t4, t5, (t6) ::
+ inputs: t5=0xabcdef0123456789, t6=&area_mid
+ output: t4=0xde24e0a879648e11
+ no memory changes
+amomax.d zero, a0, (a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ output: zero=0x0000000000000000
+ no memory changes
+amomax.d a0, zero, (a1) ::
+ inputs: zero=0xabcdef0123456789, a1=&area_mid
+ output: a0=0x5d68e1a25652a804
+ no memory changes
+amominu.d a0, a1, (a2) ::
+ inputs: a1=0x0000000000000000, a2=&area_mid
+ output: a0=0x086a7a39a1e6217d
+ [+000] 00 00 00 00 00 00 00 00 .. .. .. .. .. .. .. ..
+amominu.d a0, a1, (a2) ::
+ inputs: a1=0x7fffffffffffffff, a2=&area_mid
+ output: a0=0x2112ca1cf9f1dd31
+ no memory changes
+amominu.d a0, a1, (a2) ::
+ inputs: a1=0x8000000000000000, a2=&area_mid
+ output: a0=0x822c4c377b82984c
+ [+000] 00 00 00 00 00 00 00 80 .. .. .. .. .. .. .. ..
+amominu.d a0, a1, (a2) ::
+ inputs: a1=0xffffffffffffffff, a2=&area_mid
+ output: a0=0x08847c7642a20df9
+ no memory changes
+amominu.d t4, t5, (t6) ::
+ inputs: t5=0xabcdef0123456789, t6=&area_mid
+ output: t4=0x8fe6d7c56a5ff965
+ no memory changes
+amominu.d zero, a0, (a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ output: zero=0x0000000000000000
+ [+000] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+amominu.d a0, zero, (a1) ::
+ inputs: zero=0xabcdef0123456789, a1=&area_mid
+ output: a0=0x11f7fa4450de2529
+ [+000] 00 00 00 00 00 00 00 00 .. .. .. .. .. .. .. ..
+amomaxu.d a0, a1, (a2) ::
+ inputs: a1=0x0000000000000000, a2=&area_mid
+ output: a0=0xc33ebc4b44b8ddd8
+ no memory changes
+amomaxu.d a0, a1, (a2) ::
+ inputs: a1=0x7fffffffffffffff, a2=&area_mid
+ output: a0=0xe6c097130b5efcf6
+ no memory changes
+amomaxu.d a0, a1, (a2) ::
+ inputs: a1=0x8000000000000000, a2=&area_mid
+ output: a0=0x56470887bfdd3daf
+ [+000] 00 00 00 00 00 00 00 80 .. .. .. .. .. .. .. ..
+amomaxu.d a0, a1, (a2) ::
+ inputs: a1=0xffffffffffffffff, a2=&area_mid
+ output: a0=0xef9f8c927c405d2f
+ [+000] ff ff ff ff ff ff ff ff .. .. .. .. .. .. .. ..
+amomaxu.d t4, t5, (t6) ::
+ inputs: t5=0xabcdef0123456789, t6=&area_mid
+ output: t4=0x8d969e225f9318a0
+ [+000] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+amomaxu.d zero, a0, (a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ output: zero=0x0000000000000000
+ [+000] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+amomaxu.d a0, zero, (a1) ::
+ inputs: zero=0xabcdef0123456789, a1=&area_mid
+ output: a0=0x478d5d7e053a4e0c
+ no memory changes
--- /dev/null
+prog: atomic
+vgopts: -q
--- /dev/null
+/* Tests for the RV64C standard compressed instruction-set extension. */
+
+#include "testinst.h"
+
+static void test_compressed_00(void)
+{
+ printf("RV64C compressed instruction set, quadrant 0\n");
+
+ /* ------------- c.addi4spn rd, nzuimm[9:2] -------------- */
+ TESTINST_1_1(2, "c.addi4spn a0, sp, 4", 0x0000000000001000, a0, sp);
+ TESTINST_1_1(2, "c.addi4spn a0, sp, 8", 0x0000000000001000, a0, sp);
+ TESTINST_1_1(2, "c.addi4spn a0, sp, 16", 0x0000000000001000, a0, sp);
+ TESTINST_1_1(2, "c.addi4spn a0, sp, 32", 0x0000000000001000, a0, sp);
+ TESTINST_1_1(2, "c.addi4spn a0, sp, 64", 0x0000000000001000, a0, sp);
+ TESTINST_1_1(2, "c.addi4spn a0, sp, 128", 0x0000000000001000, a0, sp);
+ TESTINST_1_1(2, "c.addi4spn a0, sp, 256", 0x0000000000001000, a0, sp);
+ TESTINST_1_1(2, "c.addi4spn a0, sp, 512", 0x0000000000001000, a0, sp);
+ TESTINST_1_1(2, "c.addi4spn a0, sp, 1020", 0x0000000000001000, a0, sp);
+
+ TESTINST_1_1(2, "c.addi4spn a0, sp, 4", 0x000000007ffffffc, a0, sp);
+ TESTINST_1_1(2, "c.addi4spn a0, sp, 4", 0x00000000fffffffb, a0, sp);
+ TESTINST_1_1(2, "c.addi4spn a0, sp, 4", 0x00000000fffffffc, a0, sp);
+ TESTINST_1_1(2, "c.addi4spn a5, sp, 4", 0x0000000000001000, a0, sp);
+
+ /* -------------- c.fld rd, uimm[7:3](rs1) --------------- */
+ TESTINST_1_1_FLOAD(2, "c.fld fa0, 0(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(2, "c.fld fa0, 8(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(2, "c.fld fa0, 16(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(2, "c.fld fa0, 32(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(2, "c.fld fa0, 64(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(2, "c.fld fa0, 128(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(2, "c.fld fa0, 248(a1)", fa0, a1);
+
+ TESTINST_1_1_FLOAD(2, "c.fld fa4, 0(a5)", fa4, a5);
+
+ /* --------------- c.lw rd, uimm[6:2](rs1) --------------- */
+ TESTINST_1_1_LOAD(2, "c.lw a0, 0(a1)", a0, a1);
+ TESTINST_1_1_LOAD(2, "c.lw a0, 4(a1)", a0, a1);
+ TESTINST_1_1_LOAD(2, "c.lw a0, 8(a1)", a0, a1);
+ TESTINST_1_1_LOAD(2, "c.lw a0, 16(a1)", a0, a1);
+ TESTINST_1_1_LOAD(2, "c.lw a0, 32(a1)", a0, a1);
+ TESTINST_1_1_LOAD(2, "c.lw a0, 64(a1)", a0, a1);
+ TESTINST_1_1_LOAD(2, "c.lw a0, 124(a1)", a0, a1);
+
+ TESTINST_1_1_LOAD(2, "c.lw a4, 0(a5)", a4, a5);
+
+ /* --------------- c.ld rd, uimm[7:3](rs1) --------------- */
+ TESTINST_1_1_LOAD(2, "c.ld a0, 0(a1)", a0, a1);
+ TESTINST_1_1_LOAD(2, "c.ld a0, 8(a1)", a0, a1);
+ TESTINST_1_1_LOAD(2, "c.ld a0, 16(a1)", a0, a1);
+ TESTINST_1_1_LOAD(2, "c.ld a0, 32(a1)", a0, a1);
+ TESTINST_1_1_LOAD(2, "c.ld a0, 64(a1)", a0, a1);
+ TESTINST_1_1_LOAD(2, "c.ld a0, 128(a1)", a0, a1);
+ TESTINST_1_1_LOAD(2, "c.ld a0, 248(a1)", a0, a1);
+
+ TESTINST_1_1_LOAD(2, "c.ld a4, 0(a5)", a4, a5);
+
+ /* -------------- c.fsd rs2, uimm[7:3](rs1) -------------- */
+ TESTINST_0_2_FSTORE(2, "c.fsd fa0, 0(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(2, "c.fsd fa0, 8(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(2, "c.fsd fa0, 16(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(2, "c.fsd fa0, 32(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(2, "c.fsd fa0, 64(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(2, "c.fsd fa0, 128(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(2, "c.fsd fa0, 248(a1)", 0xabcdef0123456789, fa0, a1);
+
+ TESTINST_0_2_FSTORE(2, "c.fsd fa4, 0(a5)", 0xabcdef0123456789, fa4, a5);
+
+ /* -------------- c.sw rs2, uimm[6:2](rs1) --------------- */
+ TESTINST_0_2_STORE(2, "c.sw a0, 0(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(2, "c.sw a0, 4(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(2, "c.sw a0, 8(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(2, "c.sw a0, 16(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(2, "c.sw a0, 32(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(2, "c.sw a0, 64(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(2, "c.sw a0, 124(a1)", 0xabcdef0123456789, a0, a1);
+
+ TESTINST_0_2_STORE(2, "c.sw a4, 0(a5)", 0xabcdef0123456789, a4, a5);
+
+ /* -------------- c.sd rs2, uimm[7:3](rs1) --------------- */
+ TESTINST_0_2_STORE(2, "c.sd a0, 0(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(2, "c.sd a0, 8(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(2, "c.sd a0, 16(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(2, "c.sd a0, 32(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(2, "c.sd a0, 64(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(2, "c.sd a0, 128(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(2, "c.sd a0, 248(a1)", 0xabcdef0123456789, a0, a1);
+
+ TESTINST_0_2_STORE(2, "c.sd a4, 0(a5)", 0xabcdef0123456789, a4, a5);
+
+ printf("\n");
+}
+
+static void test_compressed_01(void)
+{
+ printf("RV64C compressed instruction set, quadrant 1\n");
+
+ /* ------------------------ c.nop ------------------------ */
+ TESTINST_0_0(2, "c.nop");
+
+ /* -------------- c.addi rd_rs1, nzimm[5:0] -------------- */
+ TESTINST_1_1(2, "c.addi a0, 1", 0x0000000000001000, a0, a0);
+ TESTINST_1_1(2, "c.addi a0, 2", 0x0000000000001000, a0, a0);
+ TESTINST_1_1(2, "c.addi a0, 4", 0x0000000000001000, a0, a0);
+ TESTINST_1_1(2, "c.addi a0, 8", 0x0000000000001000, a0, a0);
+ TESTINST_1_1(2, "c.addi a0, 16", 0x0000000000001000, a0, a0);
+ TESTINST_1_1(2, "c.addi a0, 31", 0x0000000000001000, a0, a0);
+ TESTINST_1_1(2, "c.addi a0, -1", 0x0000000000001000, a0, a0);
+ TESTINST_1_1(2, "c.addi a0, -32", 0x0000000000001000, a0, a0);
+
+ TESTINST_1_1(2, "c.addi a0, 1", 0x000000007fffffff, a0, a0);
+ TESTINST_1_1(2, "c.addi a0, 1", 0x00000000fffffffe, a0, a0);
+ TESTINST_1_1(2, "c.addi a0, 1", 0x00000000ffffffff, a0, a0);
+ TESTINST_1_1(2, "c.addi t6, 1", 0x0000000000001000, t6, t6);
+
+ /* -------------- c.addiw rd_rs1, imm[5:0] --------------- */
+ TESTINST_1_1(2, "c.addiw a0, 0", 0x0000000000001000, a0, a0);
+ TESTINST_1_1(2, "c.addiw a0, 1", 0x0000000000001000, a0, a0);
+ TESTINST_1_1(2, "c.addiw a0, 2", 0x0000000000001000, a0, a0);
+ TESTINST_1_1(2, "c.addiw a0, 4", 0x0000000000001000, a0, a0);
+ TESTINST_1_1(2, "c.addiw a0, 8", 0x0000000000001000, a0, a0);
+ TESTINST_1_1(2, "c.addiw a0, 16", 0x0000000000001000, a0, a0);
+ TESTINST_1_1(2, "c.addiw a0, 31", 0x0000000000001000, a0, a0);
+ TESTINST_1_1(2, "c.addiw a0, -1", 0x0000000000001000, a0, a0);
+ TESTINST_1_1(2, "c.addiw a0, -32", 0x0000000000001000, a0, a0);
+
+ TESTINST_1_1(2, "c.addiw a0, 1", 0x000000007fffffff, a0, a0);
+ TESTINST_1_1(2, "c.addiw a0, 1", 0x00000000fffffffe, a0, a0);
+ TESTINST_1_1(2, "c.addiw a0, 1", 0x00000000ffffffff, a0, a0);
+ TESTINST_1_1(2, "c.addiw t6, 0", 0x0000000000001000, t6, t6);
+
+ /* ------------------ c.li rd, imm[5:0] ------------------ */
+ TESTINST_1_0(2, "c.li a0, 0", a0);
+ TESTINST_1_0(2, "c.li a0, 1", a0);
+ TESTINST_1_0(2, "c.li a0, 2", a0);
+ TESTINST_1_0(2, "c.li a0, 4", a0);
+ TESTINST_1_0(2, "c.li a0, 8", a0);
+ TESTINST_1_0(2, "c.li a0, 15", a0);
+ TESTINST_1_0(2, "c.li a0, -1", a0);
+ TESTINST_1_0(2, "c.li a0, -16", a0);
+
+ TESTINST_1_0(2, "c.li t6, 1", t6);
+
+ /* ---------------- c.addi16sp nzimm[9:4] ---------------- */
+ TESTINST_1_1(2, "c.addi16sp sp, 16", 0x0000000000001000, sp, sp);
+ TESTINST_1_1(2, "c.addi16sp sp, 32", 0x0000000000001000, sp, sp);
+ TESTINST_1_1(2, "c.addi16sp sp, 64", 0x0000000000001000, sp, sp);
+ TESTINST_1_1(2, "c.addi16sp sp, 128", 0x0000000000001000, sp, sp);
+ TESTINST_1_1(2, "c.addi16sp sp, 256", 0x0000000000001000, sp, sp);
+ TESTINST_1_1(2, "c.addi16sp sp, 496", 0x0000000000001000, sp, sp);
+ TESTINST_1_1(2, "c.addi16sp sp, -16", 0x0000000000001000, sp, sp);
+ TESTINST_1_1(2, "c.addi16sp sp, -512", 0x0000000000001000, sp, sp);
+
+ TESTINST_1_1(2, "c.addi16sp sp, 16", 0x000000007ffffff0, sp, sp);
+ TESTINST_1_1(2, "c.addi16sp sp, 16", 0x00000000ffffffef, sp, sp);
+ TESTINST_1_1(2, "c.addi16sp sp, 16", 0x00000000fffffff0, sp, sp);
+
+ /* --------------- c.lui rd, nzimm[17:12] ---------------- */
+ TESTINST_1_0(2, "c.lui a0, 1", a0);
+ TESTINST_1_0(2, "c.lui a0, 2", a0);
+ TESTINST_1_0(2, "c.lui a0, 4", a0);
+ TESTINST_1_0(2, "c.lui a0, 8", a0);
+ TESTINST_1_0(2, "c.lui a0, 16", a0);
+ TESTINST_1_0(2, "c.lui a0, 31", a0);
+ TESTINST_1_0(2, "c.lui a0, 0xfffff" /* -1 */, a0);
+ TESTINST_1_0(2, "c.lui a0, 0xfffe0" /* -32 */, a0);
+
+ TESTINST_1_0(2, "c.lui t6, 1", t6);
+
+ /* ------------- c.srli rd_rs1, nzuimm[5:0] -------------- */
+ TESTINST_1_1(2, "c.srli a0, 1", 0xabcdef0123456789, a0, a0);
+ TESTINST_1_1(2, "c.srli a0, 2", 0xabcdef0123456789, a0, a0);
+ TESTINST_1_1(2, "c.srli a0, 4", 0xabcdef0123456789, a0, a0);
+ TESTINST_1_1(2, "c.srli a0, 8", 0xabcdef0123456789, a0, a0);
+ TESTINST_1_1(2, "c.srli a0, 16", 0xabcdef0123456789, a0, a0);
+ TESTINST_1_1(2, "c.srli a0, 32", 0xabcdef0123456789, a0, a0);
+ TESTINST_1_1(2, "c.srli a0, 63", 0xabcdef0123456789, a0, a0);
+
+ TESTINST_1_1(2, "c.srli a5, 1", 0xabcdef0123456789, a5, a5);
+
+ /* ------------- c.srai rd_rs1, nzuimm[5:0] -------------- */
+ TESTINST_1_1(2, "c.srai a0, 1", 0xabcdef0123456789, a0, a0);
+ TESTINST_1_1(2, "c.srai a0, 2", 0xabcdef0123456789, a0, a0);
+ TESTINST_1_1(2, "c.srai a0, 4", 0xabcdef0123456789, a0, a0);
+ TESTINST_1_1(2, "c.srai a0, 8", 0xabcdef0123456789, a0, a0);
+ TESTINST_1_1(2, "c.srai a0, 16", 0xabcdef0123456789, a0, a0);
+ TESTINST_1_1(2, "c.srai a0, 32", 0xabcdef0123456789, a0, a0);
+ TESTINST_1_1(2, "c.srai a0, 63", 0xabcdef0123456789, a0, a0);
+
+ TESTINST_1_1(2, "c.srai a5, 1", 0xabcdef0123456789, a5, a5);
+
+ /* --------------- c.andi rd_rs1, imm[5:0] --------------- */
+ TESTINST_1_1(2, "c.andi a0, 0", 0xffffffffffffffff, a0, a0);
+ TESTINST_1_1(2, "c.andi a0, 1", 0xffffffffffffffff, a0, a0);
+ TESTINST_1_1(2, "c.andi a0, 2", 0xffffffffffffffff, a0, a0);
+ TESTINST_1_1(2, "c.andi a0, 4", 0xffffffffffffffff, a0, a0);
+ TESTINST_1_1(2, "c.andi a0, 8", 0xffffffffffffffff, a0, a0);
+ TESTINST_1_1(2, "c.andi a0, 16", 0xffffffffffffffff, a0, a0);
+ TESTINST_1_1(2, "c.andi a0, 31", 0xffffffffffffffff, a0, a0);
+
+ TESTINST_1_1(2, "c.andi a5, 0", 0xffffffffffffffff, a5, a5);
+
+ /* ------------------ c.sub rd_rs1, rs2 ------------------ */
+ TESTINST_1_2(2, "c.sub a0, a1", 0x0000000000001000, 0x0000000000000fff, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.sub a0, a1", 0x0000000000001000, 0x0000000000001000, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.sub a0, a1", 0x0000000000001000, 0x0000000000001001, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.sub a0, a1", 0xffffffffffffffff, 0x0000000000000000, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.sub a0, a1", 0x0000000100000000, 0x0000000000000001, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.sub a4, a5", 0x0000000000001000, 0x0000000000000fff, a4,
+ a4, a5);
+
+ /* ------------------ c.xor rd_rs1, rs2 ------------------ */
+ TESTINST_1_2(2, "c.xor a0, a1", 0x0000ffff0000ffff, 0x00000000ffffffff, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.xor a4, a5", 0x0000ffff0000ffff, 0x00000000ffffffff, a4,
+ a4, a5);
+
+ /* ------------------ c.or rd_rs1, rs2 ------------------- */
+ TESTINST_1_2(2, "c.or a0, a1", 0x0000ffff0000ffff, 0x00000000ffffffff, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.or a4, a5", 0x0000ffff0000ffff, 0x00000000ffffffff, a4,
+ a4, a5);
+
+ /* ------------------ c.and rd_rs1, rs2 ------------------ */
+ TESTINST_1_2(2, "c.and a0, a1", 0x0000ffff0000ffff, 0x00000000ffffffff, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.and a4, a5", 0x0000ffff0000ffff, 0x00000000ffffffff, a4,
+ a4, a5);
+
+ /* ----------------- c.subw rd_rs1, rs2 ------------------ */
+ TESTINST_1_2(2, "c.subw a0, a1", 0x0000000000001000, 0x0000000000000fff, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.subw a0, a1", 0x0000000000001000, 0x0000000000001000, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.subw a0, a1", 0x0000000000001000, 0x0000000000001001, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.subw a0, a1", 0xffffffffffffffff, 0x0000000000000000, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.subw a0, a1", 0x0000000100000000, 0x0000000000000001, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.subw a4, a5", 0x0000000000001000, 0x0000000000000fff, a4,
+ a4, a5);
+
+ /* ----------------- c.addw rd_rs1, rs2 ------------------ */
+ TESTINST_1_2(2, "c.addw a0, a1", 0x0000000000001000, 0x0000000000002000, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.addw a0, a1", 0x000000007fffffff, 0x0000000000000001, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.addw a0, a1", 0x00000000fffffffe, 0x0000000000000001, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.addw a0, a1", 0x00000000ffffffff, 0x0000000000000001, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.addw a0, a1", 0xfffffffffffffffe, 0x0000000000000001, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.addw a0, a1", 0xffffffffffffffff, 0x0000000000000001, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.addw a4, a5", 0x0000000000001000, 0x0000000000002000, a4,
+ a4, a5);
+
+ /* -------------------- c.j imm[11:1] -------------------- */
+ TESTINST_0_0_J_RANGE(2, "c.j .+4", 4);
+ TESTINST_0_0_J_RANGE(2, "c.j .+6", 6);
+ TESTINST_0_0_J_RANGE(2, "c.j .+8", 8);
+ TESTINST_0_0_J_RANGE(2, "c.j .+16", 16);
+ TESTINST_0_0_J_RANGE(2, "c.j .+32", 32);
+ TESTINST_0_0_J_RANGE(2, "c.j .+64", 64);
+ TESTINST_0_0_J_RANGE(2, "c.j .+128", 128);
+ TESTINST_0_0_J_RANGE(2, "c.j .+256", 256);
+ TESTINST_0_0_J_RANGE(2, "c.j .+512", 512);
+ TESTINST_0_0_J_RANGE(2, "c.j .+1024", 1024);
+ TESTINST_0_0_J_RANGE(2, "c.j .+2044", 2044);
+ TESTINST_0_0_J_RANGE(2, "c.j .-4", -4);
+ TESTINST_0_0_J_RANGE(2, "c.j .-6", -6);
+ TESTINST_0_0_J_RANGE(2, "c.j .-2048", -2048);
+
+ /* ---------------- c.beqz rs1, imm[8:1] ----------------- */
+ TESTINST_0_1_BxxZ_RANGE(2, "c.beqz a0, .+4", 0, 4, a0);
+ TESTINST_0_1_BxxZ_RANGE(2, "c.beqz a0, .+6", 0, 6, a0);
+ TESTINST_0_1_BxxZ_RANGE(2, "c.beqz a0, .+8", 0, 8, a0);
+ TESTINST_0_1_BxxZ_RANGE(2, "c.beqz a0, .+16", 0, 16, a0);
+ TESTINST_0_1_BxxZ_RANGE(2, "c.beqz a0, .+32", 0, 32, a0);
+ TESTINST_0_1_BxxZ_RANGE(2, "c.beqz a0, .+64", 0, 64, a0);
+ TESTINST_0_1_BxxZ_RANGE(2, "c.beqz a0, .+128", 0, 128, a0);
+ TESTINST_0_1_BxxZ_RANGE(2, "c.beqz a0, .+252", 0, 252, a0);
+ TESTINST_0_1_BxxZ_RANGE(2, "c.beqz a0, .-4", 0, -4, a0);
+ TESTINST_0_1_BxxZ_RANGE(2, "c.beqz a0, .-6", 0, -6, a0);
+ TESTINST_0_1_BxxZ_RANGE(2, "c.beqz a0, .-256", 0, -256, a0);
+
+ TESTINST_0_1_BxxZ_RANGE(2, "c.beqz a5, .+4", 0, 4, a5);
+ TESTINST_0_1_BxxZ_COND(2, "c.beqz a0, 1f", 0, a0);
+ TESTINST_0_1_BxxZ_COND(2, "c.beqz a0, 1f", 1, a0);
+
+ /* ---------------- c.bnez rs1, imm[8:1] ----------------- */
+ TESTINST_0_1_BxxZ_RANGE(2, "c.bnez a0, .+4", 1, 4, a0);
+ TESTINST_0_1_BxxZ_RANGE(2, "c.bnez a0, .+6", 1, 6, a0);
+ TESTINST_0_1_BxxZ_RANGE(2, "c.bnez a0, .+8", 1, 8, a0);
+ TESTINST_0_1_BxxZ_RANGE(2, "c.bnez a0, .+16", 1, 16, a0);
+ TESTINST_0_1_BxxZ_RANGE(2, "c.bnez a0, .+32", 1, 32, a0);
+ TESTINST_0_1_BxxZ_RANGE(2, "c.bnez a0, .+64", 1, 64, a0);
+ TESTINST_0_1_BxxZ_RANGE(2, "c.bnez a0, .+128", 1, 128, a0);
+ TESTINST_0_1_BxxZ_RANGE(2, "c.bnez a0, .+252", 1, 252, a0);
+ TESTINST_0_1_BxxZ_RANGE(2, "c.bnez a0, .-4", 1, -4, a0);
+ TESTINST_0_1_BxxZ_RANGE(2, "c.bnez a0, .-6", 1, -6, a0);
+ TESTINST_0_1_BxxZ_RANGE(2, "c.bnez a0, .-256", 1, -256, a0);
+
+ TESTINST_0_1_BxxZ_RANGE(2, "c.bnez a5, .+4", 1, 4, a5);
+ TESTINST_0_1_BxxZ_COND(2, "c.bnez a0, 1f", 0, a0);
+ TESTINST_0_1_BxxZ_COND(2, "c.bnez a0, 1f", 1, a0);
+
+ printf("\n");
+}
+
+static void test_compressed_10(void)
+{
+ printf("RV64C compressed instruction set, quadrant 2\n");
+
+ /* ------------- c.slli rd_rs1, nzuimm[5:0] -------------- */
+ TESTINST_1_1(2, "c.slli a0, 1", 0xabcdef0123456789, a0, a0);
+ TESTINST_1_1(2, "c.slli a0, 2", 0xabcdef0123456789, a0, a0);
+ TESTINST_1_1(2, "c.slli a0, 4", 0xabcdef0123456789, a0, a0);
+ TESTINST_1_1(2, "c.slli a0, 8", 0xabcdef0123456789, a0, a0);
+ TESTINST_1_1(2, "c.slli a0, 16", 0xabcdef0123456789, a0, a0);
+ TESTINST_1_1(2, "c.slli a0, 32", 0xabcdef0123456789, a0, a0);
+ TESTINST_1_1(2, "c.slli a0, 63", 0xabcdef0123456789, a0, a0);
+
+ TESTINST_1_1(2, "c.slli a5, 1", 0xabcdef0123456789, a5, a5);
+
+ /* -------------- c.fldsp rd, uimm[8:3](x2) -------------- */
+ TESTINST_1_1_FLOAD(2, "c.fldsp fa0, 0(sp)", fa0, sp);
+ TESTINST_1_1_FLOAD(2, "c.fldsp fa0, 8(sp)", fa0, sp);
+ TESTINST_1_1_FLOAD(2, "c.fldsp fa0, 16(sp)", fa0, sp);
+ TESTINST_1_1_FLOAD(2, "c.fldsp fa0, 32(sp)", fa0, sp);
+ TESTINST_1_1_FLOAD(2, "c.fldsp fa0, 64(sp)", fa0, sp);
+ TESTINST_1_1_FLOAD(2, "c.fldsp fa0, 128(sp)", fa0, sp);
+ TESTINST_1_1_FLOAD(2, "c.fldsp fa0, 256(sp)", fa0, sp);
+ TESTINST_1_1_FLOAD(2, "c.fldsp fa0, 504(sp)", fa0, sp);
+
+ TESTINST_1_1_FLOAD(2, "c.fldsp fa5, 0(sp)", fa5, sp);
+
+ /* -------------- c.lwsp rd, uimm[7:2](x2) --------------- */
+ TESTINST_1_1_LOAD(2, "c.lwsp a0, 0(sp)", a0, sp);
+ TESTINST_1_1_LOAD(2, "c.lwsp a0, 4(sp)", a0, sp);
+ TESTINST_1_1_LOAD(2, "c.lwsp a0, 8(sp)", a0, sp);
+ TESTINST_1_1_LOAD(2, "c.lwsp a0, 16(sp)", a0, sp);
+ TESTINST_1_1_LOAD(2, "c.lwsp a0, 32(sp)", a0, sp);
+ TESTINST_1_1_LOAD(2, "c.lwsp a0, 64(sp)", a0, sp);
+ TESTINST_1_1_LOAD(2, "c.lwsp a0, 128(sp)", a0, sp);
+ TESTINST_1_1_LOAD(2, "c.lwsp a0, 252(sp)", a0, sp);
+
+ TESTINST_1_1_LOAD(2, "c.lwsp a5, 0(sp)", a5, sp);
+
+ /* -------------- c.ldsp rd, uimm[8:3](x2) --------------- */
+ TESTINST_1_1_LOAD(2, "c.ldsp a0, 0(sp)", a0, sp);
+ TESTINST_1_1_LOAD(2, "c.ldsp a0, 8(sp)", a0, sp);
+ TESTINST_1_1_LOAD(2, "c.ldsp a0, 16(sp)", a0, sp);
+ TESTINST_1_1_LOAD(2, "c.ldsp a0, 32(sp)", a0, sp);
+ TESTINST_1_1_LOAD(2, "c.ldsp a0, 64(sp)", a0, sp);
+ TESTINST_1_1_LOAD(2, "c.ldsp a0, 128(sp)", a0, sp);
+ TESTINST_1_1_LOAD(2, "c.ldsp a0, 256(sp)", a0, sp);
+ TESTINST_1_1_LOAD(2, "c.ldsp a0, 504(sp)", a0, sp);
+
+ TESTINST_1_1_LOAD(2, "c.ldsp a5, 0(sp)", a5, sp);
+
+ /* ---------------------- c.jr rs1 ----------------------- */
+ TESTINST_0_1_JR_RANGE(2, "c.jr t0", "1f+4", 4, t0);
+ TESTINST_0_1_JR_RANGE(2, "c.jr t0", "1f+6", 6, t0);
+ TESTINST_0_1_JR_RANGE(2, "c.jr t0", "1f+8", 8, t0);
+ TESTINST_0_1_JR_RANGE(2, "c.jr t0", "1f-4", -4, t0);
+ TESTINST_0_1_JR_RANGE(2, "c.jr t0", "1f-6", -6, t0);
+ TESTINST_0_1_JR_RANGE(2, "c.jr t0", "1f-8", -8, t0);
+
+ TESTINST_0_1_JR_RANGE(2, "c.jr t6", "1f+4", 4, t6);
+
+ /* -------------------- c.mv rd, rs2 --------------------- */
+ TESTINST_1_1(2, "c.mv t0, t6", 0xabcdef0123456789, t0, t6);
+ TESTINST_1_1(2, "c.mv t6, t0", 0xabcdef0123456789, t6, t0);
+ TESTINST_1_1(2, "c.mv s0, s11", 0xabcdef0123456789, s0, s11);
+ TESTINST_1_1(2, "c.mv s11, s0", 0xabcdef0123456789, s11, s0);
+ TESTINST_1_1(2, "c.mv a0, a7", 0xabcdef0123456789, a0, a7);
+ TESTINST_1_1(2, "c.mv a7, a0", 0xabcdef0123456789, a7, a0);
+
+ /* --------------------- c.jalr rs1 ---------------------- */
+ TESTINST_1_1_JALR_RANGE(2, "c.jalr t0", "1f+4", 4, ra, t0);
+ TESTINST_1_1_JALR_RANGE(2, "c.jalr t0", "1f+6", 6, ra, t0);
+ TESTINST_1_1_JALR_RANGE(2, "c.jalr t0", "1f+8", 8, ra, t0);
+ TESTINST_1_1_JALR_RANGE(2, "c.jalr t0", "1f-4", -4, ra, t0);
+ TESTINST_1_1_JALR_RANGE(2, "c.jalr t0", "1f-6", -6, ra, t0);
+ TESTINST_1_1_JALR_RANGE(2, "c.jalr t0", "1f-8", -8, ra, t0);
+
+ TESTINST_1_1_JALR_RANGE(2, "c.jalr t6", "1f+4", 4, ra, t6);
+
+ /* ------------------ c.add rd_rs1, rs2 ------------------ */
+ TESTINST_1_2(2, "c.add a0, a1", 0x0000000000001000, 0x0000000000002000, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.add a0, a1", 0x000000007fffffff, 0x0000000000000001, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.add a0, a1", 0x00000000fffffffe, 0x0000000000000001, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.add a0, a1", 0x00000000ffffffff, 0x0000000000000001, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.add a0, a1", 0xfffffffffffffffe, 0x0000000000000001, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.add a0, a1", 0xffffffffffffffff, 0x0000000000000001, a0,
+ a0, a1);
+ TESTINST_1_2(2, "c.add a4, a5", 0x0000000000001000, 0x0000000000002000, a4,
+ a4, a5);
+
+ /* ------------- c.fsdsp rs2, uimm[8:3](x2) -------------- */
+ TESTINST_0_2_FSTORE(2, "c.fsdsp fa0, 0(sp)", 0xabcdef0123456789, fa0, sp);
+ TESTINST_0_2_FSTORE(2, "c.fsdsp fa0, 8(sp)", 0xabcdef0123456789, fa0, sp);
+ TESTINST_0_2_FSTORE(2, "c.fsdsp fa0, 16(sp)", 0xabcdef0123456789, fa0, sp);
+ TESTINST_0_2_FSTORE(2, "c.fsdsp fa0, 32(sp)", 0xabcdef0123456789, fa0, sp);
+ TESTINST_0_2_FSTORE(2, "c.fsdsp fa0, 64(sp)", 0xabcdef0123456789, fa0, sp);
+ TESTINST_0_2_FSTORE(2, "c.fsdsp fa0, 128(sp)", 0xabcdef0123456789, fa0, sp);
+ TESTINST_0_2_FSTORE(2, "c.fsdsp fa0, 256(sp)", 0xabcdef0123456789, fa0, sp);
+ TESTINST_0_2_FSTORE(2, "c.fsdsp fa0, 504(sp)", 0xabcdef0123456789, fa0, sp);
+
+ TESTINST_0_2_FSTORE(2, "c.fsdsp fa5, 0(sp)", 0xabcdef0123456789, fa5, sp);
+
+ /* -------------- c.swsp rs2, uimm[7:2](x2) -------------- */
+ TESTINST_0_2_STORE(2, "c.swsp a0, 0(sp)", 0xabcdef0123456789, a0, sp);
+ TESTINST_0_2_STORE(2, "c.swsp a0, 4(sp)", 0xabcdef0123456789, a0, sp);
+ TESTINST_0_2_STORE(2, "c.swsp a0, 8(sp)", 0xabcdef0123456789, a0, sp);
+ TESTINST_0_2_STORE(2, "c.swsp a0, 16(sp)", 0xabcdef0123456789, a0, sp);
+ TESTINST_0_2_STORE(2, "c.swsp a0, 32(sp)", 0xabcdef0123456789, a0, sp);
+ TESTINST_0_2_STORE(2, "c.swsp a0, 64(sp)", 0xabcdef0123456789, a0, sp);
+ TESTINST_0_2_STORE(2, "c.swsp a0, 128(sp)", 0xabcdef0123456789, a0, sp);
+ TESTINST_0_2_STORE(2, "c.swsp a0, 252(sp)", 0xabcdef0123456789, a0, sp);
+
+ TESTINST_0_2_STORE(2, "c.swsp a5, 0(sp)", 0xabcdef0123456789, a5, sp);
+
+ /* -------------- c.sdsp rs2, uimm[8:3](x2) -------------- */
+ TESTINST_0_2_STORE(2, "c.sdsp a0, 0(sp)", 0xabcdef0123456789, a0, sp);
+ TESTINST_0_2_STORE(2, "c.sdsp a0, 8(sp)", 0xabcdef0123456789, a0, sp);
+ TESTINST_0_2_STORE(2, "c.sdsp a0, 16(sp)", 0xabcdef0123456789, a0, sp);
+ TESTINST_0_2_STORE(2, "c.sdsp a0, 32(sp)", 0xabcdef0123456789, a0, sp);
+ TESTINST_0_2_STORE(2, "c.sdsp a0, 64(sp)", 0xabcdef0123456789, a0, sp);
+ TESTINST_0_2_STORE(2, "c.sdsp a0, 128(sp)", 0xabcdef0123456789, a0, sp);
+ TESTINST_0_2_STORE(2, "c.sdsp a0, 256(sp)", 0xabcdef0123456789, a0, sp);
+ TESTINST_0_2_STORE(2, "c.sdsp a0, 504(sp)", 0xabcdef0123456789, a0, sp);
+
+ TESTINST_0_2_STORE(2, "c.sdsp a5, 0(sp)", 0xabcdef0123456789, a5, sp);
+}
+
+int main(void)
+{
+ test_compressed_00();
+ test_compressed_01();
+ test_compressed_10();
+ return 0;
+}
--- /dev/null
+RV64C compressed instruction set, quadrant 0
+c.addi4spn a0, sp, 4 ::
+ inputs: sp=0x0000000000001000
+ output: a0=0x0000000000001004
+c.addi4spn a0, sp, 8 ::
+ inputs: sp=0x0000000000001000
+ output: a0=0x0000000000001008
+c.addi4spn a0, sp, 16 ::
+ inputs: sp=0x0000000000001000
+ output: a0=0x0000000000001010
+c.addi4spn a0, sp, 32 ::
+ inputs: sp=0x0000000000001000
+ output: a0=0x0000000000001020
+c.addi4spn a0, sp, 64 ::
+ inputs: sp=0x0000000000001000
+ output: a0=0x0000000000001040
+c.addi4spn a0, sp, 128 ::
+ inputs: sp=0x0000000000001000
+ output: a0=0x0000000000001080
+c.addi4spn a0, sp, 256 ::
+ inputs: sp=0x0000000000001000
+ output: a0=0x0000000000001100
+c.addi4spn a0, sp, 512 ::
+ inputs: sp=0x0000000000001000
+ output: a0=0x0000000000001200
+c.addi4spn a0, sp, 1020 ::
+ inputs: sp=0x0000000000001000
+ output: a0=0x00000000000013fc
+c.addi4spn a0, sp, 4 ::
+ inputs: sp=0x000000007ffffffc
+ output: a0=0x0000000080000000
+c.addi4spn a0, sp, 4 ::
+ inputs: sp=0x00000000fffffffb
+ output: a0=0x00000000ffffffff
+c.addi4spn a0, sp, 4 ::
+ inputs: sp=0x00000000fffffffc
+ output: a0=0x0000000100000000
+c.addi4spn a5, sp, 4 ::
+ inputs: sp=0x0000000000001000
+ output: a0=0x0000000000000020
+c.fld fa0, 0(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xbeafe48541dc8da0
+ no memory changes
+c.fld fa0, 8(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xba6d23fbddcfb6e4
+ no memory changes
+c.fld fa0, 16(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xe23b6d7d6753321d
+ no memory changes
+c.fld fa0, 32(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0x849d6e092767dabd
+ no memory changes
+c.fld fa0, 64(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xec83e542163f4e88
+ no memory changes
+c.fld fa0, 128(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0x21989d257082ce6f
+ no memory changes
+c.fld fa0, 248(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0x63082c1746f49884
+ no memory changes
+c.fld fa4, 0(a5) ::
+ inputs: a5=&area_mid
+ output: fa4=0x5486cc410e1801e6
+ no memory changes
+c.lw a0, 0(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000000720eda7
+ no memory changes
+c.lw a0, 4(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffffec7a332e
+ no memory changes
+c.lw a0, 8(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xfffffffff26fc107
+ no memory changes
+c.lw a0, 16(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffffb4a7dcfa
+ no memory changes
+c.lw a0, 32(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffff81406130
+ no memory changes
+c.lw a0, 64(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000000da412a7
+ no memory changes
+c.lw a0, 124(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000006a330ec8
+ no memory changes
+c.lw a4, 0(a5) ::
+ inputs: a5=&area_mid
+ output: a4=0xffffffffd45c61ed
+ no memory changes
+c.ld a0, 0(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x82501ceacc654dae
+ no memory changes
+c.ld a0, 8(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x6dbeca915808e621
+ no memory changes
+c.ld a0, 16(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x863d8543d33dd28a
+ no memory changes
+c.ld a0, 32(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x07ff662e72b0598a
+ no memory changes
+c.ld a0, 64(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x30a49d2822488e15
+ no memory changes
+c.ld a0, 128(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xe539d48afb0b8e7d
+ no memory changes
+c.ld a0, 248(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x36f9f34ce2cde861
+ no memory changes
+c.ld a4, 0(a5) ::
+ inputs: a5=&area_mid
+ output: a4=0x172704a799a1c1f4
+ no memory changes
+c.fsd fa0, 0(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+000] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.fsd fa0, 8(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+000] .. .. .. .. .. .. .. .. 89 67 45 23 01 ef cd ab
+c.fsd fa0, 16(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+016] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.fsd fa0, 32(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+032] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.fsd fa0, 64(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+064] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.fsd fa0, 128(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+128] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.fsd fa0, 248(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+240] .. .. .. .. .. .. .. .. 89 67 45 23 01 ef cd ab
+c.fsd fa4, 0(a5) ::
+ inputs: fa4=0xabcdef0123456789, a5=&area_mid
+ [+000] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.sw a0, 0(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+000] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+c.sw a0, 4(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+000] .. .. .. .. 89 67 45 23 .. .. .. .. .. .. .. ..
+c.sw a0, 8(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+000] .. .. .. .. .. .. .. .. 89 67 45 23 .. .. .. ..
+c.sw a0, 16(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+016] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+c.sw a0, 32(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+032] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+c.sw a0, 64(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+064] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+c.sw a0, 124(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+112] .. .. .. .. .. .. .. .. .. .. .. .. 89 67 45 23
+c.sw a4, 0(a5) ::
+ inputs: a4=0xabcdef0123456789, a5=&area_mid
+ [+000] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+c.sd a0, 0(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+000] 89 67 45 23 01 .. cd ab .. .. .. .. .. .. .. ..
+c.sd a0, 8(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+000] .. .. .. .. .. .. .. .. 89 67 45 23 01 ef cd ab
+c.sd a0, 16(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+016] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.sd a0, 32(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+032] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.sd a0, 64(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+064] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.sd a0, 128(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+128] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.sd a0, 248(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+240] .. .. .. .. .. .. .. .. 89 67 45 23 01 ef cd ab
+c.sd a4, 0(a5) ::
+ inputs: a4=0xabcdef0123456789, a5=&area_mid
+ [+000] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+
+RV64C compressed instruction set, quadrant 1
+c.nop ::
+c.addi a0, 1 ::
+ inputs: a0=0x0000000000001000
+ output: a0=0x0000000000001001
+c.addi a0, 2 ::
+ inputs: a0=0x0000000000001000
+ output: a0=0x0000000000001002
+c.addi a0, 4 ::
+ inputs: a0=0x0000000000001000
+ output: a0=0x0000000000001004
+c.addi a0, 8 ::
+ inputs: a0=0x0000000000001000
+ output: a0=0x0000000000001008
+c.addi a0, 16 ::
+ inputs: a0=0x0000000000001000
+ output: a0=0x0000000000001010
+c.addi a0, 31 ::
+ inputs: a0=0x0000000000001000
+ output: a0=0x000000000000101f
+c.addi a0, -1 ::
+ inputs: a0=0x0000000000001000
+ output: a0=0x0000000000000fff
+c.addi a0, -32 ::
+ inputs: a0=0x0000000000001000
+ output: a0=0x0000000000000fe0
+c.addi a0, 1 ::
+ inputs: a0=0x000000007fffffff
+ output: a0=0x0000000080000000
+c.addi a0, 1 ::
+ inputs: a0=0x00000000fffffffe
+ output: a0=0x00000000ffffffff
+c.addi a0, 1 ::
+ inputs: a0=0x00000000ffffffff
+ output: a0=0x0000000100000000
+c.addi t6, 1 ::
+ inputs: t6=0x0000000000001000
+ output: t6=0x0000000000001001
+c.addiw a0, 0 ::
+ inputs: a0=0x0000000000001000
+ output: a0=0x0000000000001000
+c.addiw a0, 1 ::
+ inputs: a0=0x0000000000001000
+ output: a0=0x0000000000001001
+c.addiw a0, 2 ::
+ inputs: a0=0x0000000000001000
+ output: a0=0x0000000000001002
+c.addiw a0, 4 ::
+ inputs: a0=0x0000000000001000
+ output: a0=0x0000000000001004
+c.addiw a0, 8 ::
+ inputs: a0=0x0000000000001000
+ output: a0=0x0000000000001008
+c.addiw a0, 16 ::
+ inputs: a0=0x0000000000001000
+ output: a0=0x0000000000001010
+c.addiw a0, 31 ::
+ inputs: a0=0x0000000000001000
+ output: a0=0x000000000000101f
+c.addiw a0, -1 ::
+ inputs: a0=0x0000000000001000
+ output: a0=0x0000000000000fff
+c.addiw a0, -32 ::
+ inputs: a0=0x0000000000001000
+ output: a0=0x0000000000000fe0
+c.addiw a0, 1 ::
+ inputs: a0=0x000000007fffffff
+ output: a0=0xffffffff80000000
+c.addiw a0, 1 ::
+ inputs: a0=0x00000000fffffffe
+ output: a0=0xffffffffffffffff
+c.addiw a0, 1 ::
+ inputs: a0=0x00000000ffffffff
+ output: a0=0x0000000000000000
+c.addiw t6, 0 ::
+ inputs: t6=0x0000000000001000
+ output: t6=0x0000000000001000
+c.li a0, 0 ::
+ output: a0=0x0000000000000000
+c.li a0, 1 ::
+ output: a0=0x0000000000000001
+c.li a0, 2 ::
+ output: a0=0x0000000000000002
+c.li a0, 4 ::
+ output: a0=0x0000000000000004
+c.li a0, 8 ::
+ output: a0=0x0000000000000008
+c.li a0, 15 ::
+ output: a0=0x000000000000000f
+c.li a0, -1 ::
+ output: a0=0xffffffffffffffff
+c.li a0, -16 ::
+ output: a0=0xfffffffffffffff0
+c.li t6, 1 ::
+ output: t6=0x0000000000000001
+c.addi16sp sp, 16 ::
+ inputs: sp=0x0000000000001000
+ output: sp=0x0000000000001010
+c.addi16sp sp, 32 ::
+ inputs: sp=0x0000000000001000
+ output: sp=0x0000000000001020
+c.addi16sp sp, 64 ::
+ inputs: sp=0x0000000000001000
+ output: sp=0x0000000000001040
+c.addi16sp sp, 128 ::
+ inputs: sp=0x0000000000001000
+ output: sp=0x0000000000001080
+c.addi16sp sp, 256 ::
+ inputs: sp=0x0000000000001000
+ output: sp=0x0000000000001100
+c.addi16sp sp, 496 ::
+ inputs: sp=0x0000000000001000
+ output: sp=0x00000000000011f0
+c.addi16sp sp, -16 ::
+ inputs: sp=0x0000000000001000
+ output: sp=0x0000000000000ff0
+c.addi16sp sp, -512 ::
+ inputs: sp=0x0000000000001000
+ output: sp=0x0000000000000e00
+c.addi16sp sp, 16 ::
+ inputs: sp=0x000000007ffffff0
+ output: sp=0x0000000080000000
+c.addi16sp sp, 16 ::
+ inputs: sp=0x00000000ffffffef
+ output: sp=0x00000000ffffffff
+c.addi16sp sp, 16 ::
+ inputs: sp=0x00000000fffffff0
+ output: sp=0x0000000100000000
+c.lui a0, 1 ::
+ output: a0=0x0000000000001000
+c.lui a0, 2 ::
+ output: a0=0x0000000000002000
+c.lui a0, 4 ::
+ output: a0=0x0000000000004000
+c.lui a0, 8 ::
+ output: a0=0x0000000000008000
+c.lui a0, 16 ::
+ output: a0=0x0000000000010000
+c.lui a0, 31 ::
+ output: a0=0x000000000001f000
+c.lui a0, 0xfffff ::
+ output: a0=0xfffffffffffff000
+c.lui a0, 0xfffe0 ::
+ output: a0=0xfffffffffffe0000
+c.lui t6, 1 ::
+ output: t6=0x0000000000001000
+c.srli a0, 1 ::
+ inputs: a0=0xabcdef0123456789
+ output: a0=0x55e6f78091a2b3c4
+c.srli a0, 2 ::
+ inputs: a0=0xabcdef0123456789
+ output: a0=0x2af37bc048d159e2
+c.srli a0, 4 ::
+ inputs: a0=0xabcdef0123456789
+ output: a0=0x0abcdef012345678
+c.srli a0, 8 ::
+ inputs: a0=0xabcdef0123456789
+ output: a0=0x00abcdef01234567
+c.srli a0, 16 ::
+ inputs: a0=0xabcdef0123456789
+ output: a0=0x0000abcdef012345
+c.srli a0, 32 ::
+ inputs: a0=0xabcdef0123456789
+ output: a0=0x00000000abcdef01
+c.srli a0, 63 ::
+ inputs: a0=0xabcdef0123456789
+ output: a0=0x0000000000000001
+c.srli a5, 1 ::
+ inputs: a5=0xabcdef0123456789
+ output: a5=0x55e6f78091a2b3c4
+c.srai a0, 1 ::
+ inputs: a0=0xabcdef0123456789
+ output: a0=0xd5e6f78091a2b3c4
+c.srai a0, 2 ::
+ inputs: a0=0xabcdef0123456789
+ output: a0=0xeaf37bc048d159e2
+c.srai a0, 4 ::
+ inputs: a0=0xabcdef0123456789
+ output: a0=0xfabcdef012345678
+c.srai a0, 8 ::
+ inputs: a0=0xabcdef0123456789
+ output: a0=0xffabcdef01234567
+c.srai a0, 16 ::
+ inputs: a0=0xabcdef0123456789
+ output: a0=0xffffabcdef012345
+c.srai a0, 32 ::
+ inputs: a0=0xabcdef0123456789
+ output: a0=0xffffffffabcdef01
+c.srai a0, 63 ::
+ inputs: a0=0xabcdef0123456789
+ output: a0=0xffffffffffffffff
+c.srai a5, 1 ::
+ inputs: a5=0xabcdef0123456789
+ output: a5=0xd5e6f78091a2b3c4
+c.andi a0, 0 ::
+ inputs: a0=0xffffffffffffffff
+ output: a0=0x0000000000000000
+c.andi a0, 1 ::
+ inputs: a0=0xffffffffffffffff
+ output: a0=0x0000000000000001
+c.andi a0, 2 ::
+ inputs: a0=0xffffffffffffffff
+ output: a0=0x0000000000000002
+c.andi a0, 4 ::
+ inputs: a0=0xffffffffffffffff
+ output: a0=0x0000000000000004
+c.andi a0, 8 ::
+ inputs: a0=0xffffffffffffffff
+ output: a0=0x0000000000000008
+c.andi a0, 16 ::
+ inputs: a0=0xffffffffffffffff
+ output: a0=0x0000000000000010
+c.andi a0, 31 ::
+ inputs: a0=0xffffffffffffffff
+ output: a0=0x000000000000001f
+c.andi a5, 0 ::
+ inputs: a5=0xffffffffffffffff
+ output: a5=0x0000000000000000
+c.sub a0, a1 ::
+ inputs: a0=0x0000000000001000, a1=0x0000000000000fff
+ output: a0=0x0000000000000001
+c.sub a0, a1 ::
+ inputs: a0=0x0000000000001000, a1=0x0000000000001000
+ output: a0=0x0000000000000000
+c.sub a0, a1 ::
+ inputs: a0=0x0000000000001000, a1=0x0000000000001001
+ output: a0=0xffffffffffffffff
+c.sub a0, a1 ::
+ inputs: a0=0xffffffffffffffff, a1=0x0000000000000000
+ output: a0=0xffffffffffffffff
+c.sub a0, a1 ::
+ inputs: a0=0x0000000100000000, a1=0x0000000000000001
+ output: a0=0x00000000ffffffff
+c.sub a4, a5 ::
+ inputs: a4=0x0000000000001000, a5=0x0000000000000fff
+ output: a4=0x0000000000000001
+c.xor a0, a1 ::
+ inputs: a0=0x0000ffff0000ffff, a1=0x00000000ffffffff
+ output: a0=0x0000ffffffff0000
+c.xor a4, a5 ::
+ inputs: a4=0x0000ffff0000ffff, a5=0x00000000ffffffff
+ output: a4=0x0000ffffffff0000
+c.or a0, a1 ::
+ inputs: a0=0x0000ffff0000ffff, a1=0x00000000ffffffff
+ output: a0=0x0000ffffffffffff
+c.or a4, a5 ::
+ inputs: a4=0x0000ffff0000ffff, a5=0x00000000ffffffff
+ output: a4=0x0000ffffffffffff
+c.and a0, a1 ::
+ inputs: a0=0x0000ffff0000ffff, a1=0x00000000ffffffff
+ output: a0=0x000000000000ffff
+c.and a4, a5 ::
+ inputs: a4=0x0000ffff0000ffff, a5=0x00000000ffffffff
+ output: a4=0x000000000000ffff
+c.subw a0, a1 ::
+ inputs: a0=0x0000000000001000, a1=0x0000000000000fff
+ output: a0=0x0000000000000001
+c.subw a0, a1 ::
+ inputs: a0=0x0000000000001000, a1=0x0000000000001000
+ output: a0=0x0000000000000000
+c.subw a0, a1 ::
+ inputs: a0=0x0000000000001000, a1=0x0000000000001001
+ output: a0=0xffffffffffffffff
+c.subw a0, a1 ::
+ inputs: a0=0xffffffffffffffff, a1=0x0000000000000000
+ output: a0=0xffffffffffffffff
+c.subw a0, a1 ::
+ inputs: a0=0x0000000100000000, a1=0x0000000000000001
+ output: a0=0xffffffffffffffff
+c.subw a4, a5 ::
+ inputs: a4=0x0000000000001000, a5=0x0000000000000fff
+ output: a4=0x0000000000000001
+c.addw a0, a1 ::
+ inputs: a0=0x0000000000001000, a1=0x0000000000002000
+ output: a0=0x0000000000003000
+c.addw a0, a1 ::
+ inputs: a0=0x000000007fffffff, a1=0x0000000000000001
+ output: a0=0xffffffff80000000
+c.addw a0, a1 ::
+ inputs: a0=0x00000000fffffffe, a1=0x0000000000000001
+ output: a0=0xffffffffffffffff
+c.addw a0, a1 ::
+ inputs: a0=0x00000000ffffffff, a1=0x0000000000000001
+ output: a0=0x0000000000000000
+c.addw a0, a1 ::
+ inputs: a0=0xfffffffffffffffe, a1=0x0000000000000001
+ output: a0=0xffffffffffffffff
+c.addw a0, a1 ::
+ inputs: a0=0xffffffffffffffff, a1=0x0000000000000001
+ output: a0=0x0000000000000000
+c.addw a4, a5 ::
+ inputs: a4=0x0000000000001000, a5=0x0000000000002000
+ output: a4=0x0000000000003000
+c.j .+4 ::
+ target: reached
+c.j .+6 ::
+ target: reached
+c.j .+8 ::
+ target: reached
+c.j .+16 ::
+ target: reached
+c.j .+32 ::
+ target: reached
+c.j .+64 ::
+ target: reached
+c.j .+128 ::
+ target: reached
+c.j .+256 ::
+ target: reached
+c.j .+512 ::
+ target: reached
+c.j .+1024 ::
+ target: reached
+c.j .+2044 ::
+ target: reached
+c.j .-4 ::
+ target: reached
+c.j .-6 ::
+ target: reached
+c.j .-2048 ::
+ target: reached
+c.beqz a0, .+4 ::
+ inputs: a0=0
+ target: reached
+c.beqz a0, .+6 ::
+ inputs: a0=0
+ target: reached
+c.beqz a0, .+8 ::
+ inputs: a0=0
+ target: reached
+c.beqz a0, .+16 ::
+ inputs: a0=0
+ target: reached
+c.beqz a0, .+32 ::
+ inputs: a0=0
+ target: reached
+c.beqz a0, .+64 ::
+ inputs: a0=0
+ target: reached
+c.beqz a0, .+128 ::
+ inputs: a0=0
+ target: reached
+c.beqz a0, .+252 ::
+ inputs: a0=0
+ target: reached
+c.beqz a0, .-4 ::
+ inputs: a0=0
+ target: reached
+c.beqz a0, .-6 ::
+ inputs: a0=0
+ target: reached
+c.beqz a0, .-256 ::
+ inputs: a0=0
+ target: reached
+c.beqz a5, .+4 ::
+ inputs: a5=0
+ target: reached
+c.beqz a0, 1f ::
+ inputs: a0=0
+ branch: taken
+c.beqz a0, 1f ::
+ inputs: a0=1
+ branch: not taken
+c.bnez a0, .+4 ::
+ inputs: a0=1
+ target: reached
+c.bnez a0, .+6 ::
+ inputs: a0=1
+ target: reached
+c.bnez a0, .+8 ::
+ inputs: a0=1
+ target: reached
+c.bnez a0, .+16 ::
+ inputs: a0=1
+ target: reached
+c.bnez a0, .+32 ::
+ inputs: a0=1
+ target: reached
+c.bnez a0, .+64 ::
+ inputs: a0=1
+ target: reached
+c.bnez a0, .+128 ::
+ inputs: a0=1
+ target: reached
+c.bnez a0, .+252 ::
+ inputs: a0=1
+ target: reached
+c.bnez a0, .-4 ::
+ inputs: a0=1
+ target: reached
+c.bnez a0, .-6 ::
+ inputs: a0=1
+ target: reached
+c.bnez a0, .-256 ::
+ inputs: a0=1
+ target: reached
+c.bnez a5, .+4 ::
+ inputs: a5=1
+ target: reached
+c.bnez a0, 1f ::
+ inputs: a0=0
+ branch: not taken
+c.bnez a0, 1f ::
+ inputs: a0=1
+ branch: taken
+
+RV64C compressed instruction set, quadrant 2
+c.slli a0, 1 ::
+ inputs: a0=0xabcdef0123456789
+ output: a0=0x579bde02468acf12
+c.slli a0, 2 ::
+ inputs: a0=0xabcdef0123456789
+ output: a0=0xaf37bc048d159e24
+c.slli a0, 4 ::
+ inputs: a0=0xabcdef0123456789
+ output: a0=0xbcdef01234567890
+c.slli a0, 8 ::
+ inputs: a0=0xabcdef0123456789
+ output: a0=0xcdef012345678900
+c.slli a0, 16 ::
+ inputs: a0=0xabcdef0123456789
+ output: a0=0xef01234567890000
+c.slli a0, 32 ::
+ inputs: a0=0xabcdef0123456789
+ output: a0=0x2345678900000000
+c.slli a0, 63 ::
+ inputs: a0=0xabcdef0123456789
+ output: a0=0x8000000000000000
+c.slli a5, 1 ::
+ inputs: a5=0xabcdef0123456789
+ output: a5=0x579bde02468acf12
+c.fldsp fa0, 0(sp) ::
+ inputs: sp=&area_mid
+ output: fa0=0x09938bb5e378ccc9
+ no memory changes
+c.fldsp fa0, 8(sp) ::
+ inputs: sp=&area_mid
+ output: fa0=0xd46119bc4f7b459c
+ no memory changes
+c.fldsp fa0, 16(sp) ::
+ inputs: sp=&area_mid
+ output: fa0=0xcd40b4ceaa101165
+ no memory changes
+c.fldsp fa0, 32(sp) ::
+ inputs: sp=&area_mid
+ output: fa0=0x0ec2557909435825
+ no memory changes
+c.fldsp fa0, 64(sp) ::
+ inputs: sp=&area_mid
+ output: fa0=0xb7e70cf3395b0d30
+ no memory changes
+c.fldsp fa0, 128(sp) ::
+ inputs: sp=&area_mid
+ output: fa0=0x6c7c4355121e0d98
+ no memory changes
+c.fldsp fa0, 256(sp) ::
+ inputs: sp=&area_mid
+ output: fa0=0xee5b125eb6a74a8d
+ no memory changes
+c.fldsp fa0, 504(sp) ::
+ inputs: sp=&area_mid
+ output: fa0=0xbd4f1ec2a7cdc5d1
+ no memory changes
+c.fldsp fa5, 0(sp) ::
+ inputs: sp=&area_mid
+ output: fa5=0x6a642668a9bd2cd0
+ no memory changes
+c.lwsp a0, 0(sp) ::
+ inputs: sp=&area_mid
+ output: a0=0xffffffffa2c51890
+ no memory changes
+c.lwsp a0, 4(sp) ::
+ inputs: sp=&area_mid
+ output: a0=0x0000000003588d55
+ no memory changes
+c.lwsp a0, 8(sp) ::
+ inputs: sp=&area_mid
+ output: a0=0xffffffffbd9fc2c3
+ no memory changes
+c.lwsp a0, 16(sp) ::
+ inputs: sp=&area_mid
+ output: a0=0xffffffff8dc294e9
+ no memory changes
+c.lwsp a0, 32(sp) ::
+ inputs: sp=&area_mid
+ output: a0=0x00000000185128a6
+ no memory changes
+c.lwsp a0, 64(sp) ::
+ inputs: sp=&area_mid
+ output: a0=0xffffffffa02175a9
+ no memory changes
+c.lwsp a0, 128(sp) ::
+ inputs: sp=&area_mid
+ output: a0=0x000000002a54a500
+ no memory changes
+c.lwsp a0, 252(sp) ::
+ inputs: sp=&area_mid
+ output: a0=0x0000000042735f59
+ no memory changes
+c.lwsp a5, 0(sp) ::
+ inputs: sp=&area_mid
+ output: a5=0x00000000670a7797
+ no memory changes
+c.ldsp a0, 0(sp) ::
+ inputs: sp=&area_mid
+ output: a0=0x6429290760136358
+ no memory changes
+c.ldsp a0, 8(sp) ::
+ inputs: sp=&area_mid
+ output: a0=0xbefd16247abc5ae2
+ no memory changes
+c.ldsp a0, 16(sp) ::
+ inputs: sp=&area_mid
+ output: a0=0x05a2ce0c43b76420
+ no memory changes
+c.ldsp a0, 32(sp) ::
+ inputs: sp=&area_mid
+ output: a0=0x22efeba3bef6670c
+ no memory changes
+c.ldsp a0, 64(sp) ::
+ inputs: sp=&area_mid
+ output: a0=0x82ad9af526269470
+ no memory changes
+c.ldsp a0, 128(sp) ::
+ inputs: sp=&area_mid
+ output: a0=0xa872c2086f198487
+ no memory changes
+c.ldsp a0, 256(sp) ::
+ inputs: sp=&area_mid
+ output: a0=0x0ab07070f302a1dc
+ no memory changes
+c.ldsp a0, 504(sp) ::
+ inputs: sp=&area_mid
+ output: a0=0xcb1f9e3eb6021eea
+ no memory changes
+c.ldsp a5, 0(sp) ::
+ inputs: sp=&area_mid
+ output: a5=0xc6fac5ba2658c35f
+ no memory changes
+c.jr t0 ::
+ inputs: t0=1f+4
+ target: reached
+c.jr t0 ::
+ inputs: t0=1f+6
+ target: reached
+c.jr t0 ::
+ inputs: t0=1f+8
+ target: reached
+c.jr t0 ::
+ inputs: t0=1f-4
+ target: reached
+c.jr t0 ::
+ inputs: t0=1f-6
+ target: reached
+c.jr t0 ::
+ inputs: t0=1f-8
+ target: reached
+c.jr t6 ::
+ inputs: t6=1f+4
+ target: reached
+c.mv t0, t6 ::
+ inputs: t6=0xabcdef0123456789
+ output: t0=0xabcdef0123456789
+c.mv t6, t0 ::
+ inputs: t0=0xabcdef0123456789
+ output: t6=0xabcdef0123456789
+c.mv s0, s11 ::
+ inputs: s11=0xabcdef0123456789
+ output: s0=0xabcdef0123456789
+c.mv s11, s0 ::
+ inputs: s0=0xabcdef0123456789
+ output: s11=0xabcdef0123456789
+c.mv a0, a7 ::
+ inputs: a7=0xabcdef0123456789
+ output: a0=0xabcdef0123456789
+c.mv a7, a0 ::
+ inputs: a0=0xabcdef0123456789
+ output: a7=0xabcdef0123456789
+c.jalr t0 ::
+ inputs: t0=1f+4
+ output: ra=1f+2
+ target: reached
+c.jalr t0 ::
+ inputs: t0=1f+6
+ output: ra=1f+2
+ target: reached
+c.jalr t0 ::
+ inputs: t0=1f+8
+ output: ra=1f+2
+ target: reached
+c.jalr t0 ::
+ inputs: t0=1f-4
+ output: ra=1f+2
+ target: reached
+c.jalr t0 ::
+ inputs: t0=1f-6
+ output: ra=1f+2
+ target: reached
+c.jalr t0 ::
+ inputs: t0=1f-8
+ output: ra=1f+2
+ target: reached
+c.jalr t6 ::
+ inputs: t6=1f+4
+ output: ra=1f+2
+ target: reached
+c.add a0, a1 ::
+ inputs: a0=0x0000000000001000, a1=0x0000000000002000
+ output: a0=0x0000000000003000
+c.add a0, a1 ::
+ inputs: a0=0x000000007fffffff, a1=0x0000000000000001
+ output: a0=0x0000000080000000
+c.add a0, a1 ::
+ inputs: a0=0x00000000fffffffe, a1=0x0000000000000001
+ output: a0=0x00000000ffffffff
+c.add a0, a1 ::
+ inputs: a0=0x00000000ffffffff, a1=0x0000000000000001
+ output: a0=0x0000000100000000
+c.add a0, a1 ::
+ inputs: a0=0xfffffffffffffffe, a1=0x0000000000000001
+ output: a0=0xffffffffffffffff
+c.add a0, a1 ::
+ inputs: a0=0xffffffffffffffff, a1=0x0000000000000001
+ output: a0=0x0000000000000000
+c.add a4, a5 ::
+ inputs: a4=0x0000000000001000, a5=0x0000000000002000
+ output: a4=0x0000000000003000
+c.fsdsp fa0, 0(sp) ::
+ inputs: fa0=0xabcdef0123456789, sp=&area_mid
+ [+000] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.fsdsp fa0, 8(sp) ::
+ inputs: fa0=0xabcdef0123456789, sp=&area_mid
+ [+000] .. .. .. .. .. .. .. .. 89 67 45 23 01 ef cd ab
+c.fsdsp fa0, 16(sp) ::
+ inputs: fa0=0xabcdef0123456789, sp=&area_mid
+ [+016] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.fsdsp fa0, 32(sp) ::
+ inputs: fa0=0xabcdef0123456789, sp=&area_mid
+ [+032] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.fsdsp fa0, 64(sp) ::
+ inputs: fa0=0xabcdef0123456789, sp=&area_mid
+ [+064] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.fsdsp fa0, 128(sp) ::
+ inputs: fa0=0xabcdef0123456789, sp=&area_mid
+ [+128] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.fsdsp fa0, 256(sp) ::
+ inputs: fa0=0xabcdef0123456789, sp=&area_mid
+ [+256] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.fsdsp fa0, 504(sp) ::
+ inputs: fa0=0xabcdef0123456789, sp=&area_mid
+ [+496] .. .. .. .. .. .. .. .. 89 67 45 23 01 ef cd ab
+c.fsdsp fa5, 0(sp) ::
+ inputs: fa5=0xabcdef0123456789, sp=&area_mid
+ [+000] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.swsp a0, 0(sp) ::
+ inputs: a0=0xabcdef0123456789, sp=&area_mid
+ [+000] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+c.swsp a0, 4(sp) ::
+ inputs: a0=0xabcdef0123456789, sp=&area_mid
+ [+000] .. .. .. .. 89 67 45 23 .. .. .. .. .. .. .. ..
+c.swsp a0, 8(sp) ::
+ inputs: a0=0xabcdef0123456789, sp=&area_mid
+ [+000] .. .. .. .. .. .. .. .. 89 67 45 23 .. .. .. ..
+c.swsp a0, 16(sp) ::
+ inputs: a0=0xabcdef0123456789, sp=&area_mid
+ [+016] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+c.swsp a0, 32(sp) ::
+ inputs: a0=0xabcdef0123456789, sp=&area_mid
+ [+032] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+c.swsp a0, 64(sp) ::
+ inputs: a0=0xabcdef0123456789, sp=&area_mid
+ [+064] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+c.swsp a0, 128(sp) ::
+ inputs: a0=0xabcdef0123456789, sp=&area_mid
+ [+128] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+c.swsp a0, 252(sp) ::
+ inputs: a0=0xabcdef0123456789, sp=&area_mid
+ [+240] .. .. .. .. .. .. .. .. .. .. .. .. 89 67 45 23
+c.swsp a5, 0(sp) ::
+ inputs: a5=0xabcdef0123456789, sp=&area_mid
+ [+000] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+c.sdsp a0, 0(sp) ::
+ inputs: a0=0xabcdef0123456789, sp=&area_mid
+ [+000] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.sdsp a0, 8(sp) ::
+ inputs: a0=0xabcdef0123456789, sp=&area_mid
+ [+000] .. .. .. .. .. .. .. .. 89 67 45 23 01 ef cd ab
+c.sdsp a0, 16(sp) ::
+ inputs: a0=0xabcdef0123456789, sp=&area_mid
+ [+016] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.sdsp a0, 32(sp) ::
+ inputs: a0=0xabcdef0123456789, sp=&area_mid
+ [+032] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.sdsp a0, 64(sp) ::
+ inputs: a0=0xabcdef0123456789, sp=&area_mid
+ [+064] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.sdsp a0, 128(sp) ::
+ inputs: a0=0xabcdef0123456789, sp=&area_mid
+ [+128] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.sdsp a0, 256(sp) ::
+ inputs: a0=0xabcdef0123456789, sp=&area_mid
+ [+256] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+c.sdsp a0, 504(sp) ::
+ inputs: a0=0xabcdef0123456789, sp=&area_mid
+ [+496] .. .. .. .. .. .. .. .. 89 67 45 23 01 ef cd ab
+c.sdsp a5, 0(sp) ::
+ inputs: a5=0xabcdef0123456789, sp=&area_mid
+ [+000] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
--- /dev/null
+prog: compressed
+vgopts: -q
--- /dev/null
+/* Tests for the RV64Zicsr standard control-and-status register instruction-set
+ extension. */
+
+#include "testinst.h"
+
+static void test_csr64_shared(void)
+{
+ printf("RV64Zicsr control-and-status register instruction set, shared "
+ "operations\n");
+
+ /* ----------------- csrrw rd, csr, rs1 ------------------ */
+ /* fflags */
+ TESTINST_1_1_CSR(4, "csrrw a0, fflags, a1", 0x00, 0x01, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrw a0, fflags, a1", 0x00, 0x1f, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrw a0, fflags, a1", 0xff, 0x1e, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrw a0, fflags, a1", 0xff, 0x00, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrw a0, fflags, a1", 0x00, 0xff, a0, fcsr, a1);
+
+ TESTINST_1_1_CSR(4, "csrrw t5, fflags, t6", 0x00, 0x01, t5, fcsr, t6);
+ TESTINST_1_1_CSR(4, "csrrw zero, fflags, a1", 0xff, 0x01, zero, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrw a0, fflags, zero", 0xff, 0x00, a0, fcsr, zero);
+
+ /* frm */
+ TESTINST_1_1_CSR(4, "csrrw a0, frm, a1", 0x00, 0x1, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrw a0, frm, a1", 0x00, 0x7, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrw a0, frm, a1", 0xff, 0x6, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrw a0, frm, a1", 0xff, 0x0, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrw a0, frm, a1", 0x00, 0xff, a0, fcsr, a1);
+
+ TESTINST_1_1_CSR(4, "csrrw t5, frm, t6", 0x00, 0x1, t5, fcsr, t6);
+ TESTINST_1_1_CSR(4, "csrrw zero, frm, a1", 0xff, 0x1, zero, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrw a0, frm, zero", 0xff, 0x0, a0, fcsr, zero);
+
+ /* fcsr */
+ TESTINST_1_1_CSR(4, "csrrw a0, fcsr, a1", 0x00, 0x01, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrw a0, fcsr, a1", 0x00, 0xff, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrw a0, fcsr, a1", 0xff, 0xfe, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrw a0, fcsr, a1", 0xff, 0x00, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrw a0, fcsr, a1", 0x00, 0xff, a0, fcsr, a1);
+
+ TESTINST_1_1_CSR(4, "csrrw t5, fcsr, t6", 0x00, 0x01, t5, fcsr, t6);
+ TESTINST_1_1_CSR(4, "csrrw zero, fcsr, a1", 0xff, 0x01, zero, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrw a0, fcsr, zero", 0xff, 0x00, a0, fcsr, zero);
+
+ /* ----------------- csrrs rd, csr, rs1 ------------------ */
+ /* fflags */
+ TESTINST_1_1_CSR(4, "csrrs a0, fflags, a1", 0x00, 0x01, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrs a0, fflags, a1", 0x00, 0x1f, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrs a0, fflags, a1", 0xff, 0x1e, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrs a0, fflags, a1", 0xff, 0x00, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrs a0, fflags, a1", 0x00, 0xff, a0, fcsr, a1);
+
+ TESTINST_1_1_CSR(4, "csrrs t5, fflags, t6", 0x00, 0x01, t5, fcsr, t6);
+ TESTINST_1_1_CSR(4, "csrrs zero, fflags, a1", 0xff, 0x01, zero, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrs a0, fflags, zero", 0xff, 0x00, a0, fcsr, zero);
+
+ /* frm */
+ TESTINST_1_1_CSR(4, "csrrs a0, frm, a1", 0x00, 0x1, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrs a0, frm, a1", 0x00, 0x7, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrs a0, frm, a1", 0xff, 0x6, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrs a0, frm, a1", 0xff, 0x0, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrs a0, frm, a1", 0x00, 0xff, a0, fcsr, a1);
+
+ TESTINST_1_1_CSR(4, "csrrs t5, frm, t6", 0x00, 0x1, t5, fcsr, t6);
+ TESTINST_1_1_CSR(4, "csrrs zero, frm, a1", 0xff, 0x1, zero, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrs a0, frm, zero", 0xff, 0x0, a0, fcsr, zero);
+
+ /* fcsr */
+ TESTINST_1_1_CSR(4, "csrrs a0, fcsr, a1", 0x00, 0x01, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrs a0, fcsr, a1", 0x00, 0xff, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrs a0, fcsr, a1", 0xff, 0xfe, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrs a0, fcsr, a1", 0xff, 0x00, a0, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrs a0, fcsr, a1", 0x00, 0xff, a0, fcsr, a1);
+
+ TESTINST_1_1_CSR(4, "csrrs t5, fcsr, t6", 0x00, 0x01, t5, fcsr, t6);
+ TESTINST_1_1_CSR(4, "csrrs zero, fcsr, a1", 0xff, 0x01, zero, fcsr, a1);
+ TESTINST_1_1_CSR(4, "csrrs a0, fcsr, zero", 0xff, 0x00, a0, fcsr, zero);
+
+ /* ----------------- csrrc rd, csr, rs1 ------------------ */
+ /* Not currently handled. */
+
+ /* -------------- csrrwi rd, csr, uimm[4:0] -------------- */
+ /* Not currently handled. */
+
+ /* -------------- csrrsi rd, csr, uimm[4:0] -------------- */
+ /* Not currently handled. */
+
+ /* -------------- csrrci rd, csr, uimm[4:0] -------------- */
+ /* Not currently handled. */
+}
+
+int main(void)
+{
+ test_csr64_shared();
+ return 0;
+}
--- /dev/null
+RV64Zicsr control-and-status register instruction set, shared operations
+csrrw a0, fflags, a1 ::
+ inputs: a1=0x0000000000000001, fcsr=0x0000000000000000
+ output: a0=0x0000000000000000, fcsr=0x0000000000000001
+csrrw a0, fflags, a1 ::
+ inputs: a1=0x000000000000001f, fcsr=0x0000000000000000
+ output: a0=0x0000000000000000, fcsr=0x000000000000001f
+csrrw a0, fflags, a1 ::
+ inputs: a1=0x000000000000001e, fcsr=0x00000000000000ff
+ output: a0=0x000000000000001f, fcsr=0x00000000000000fe
+csrrw a0, fflags, a1 ::
+ inputs: a1=0x0000000000000000, fcsr=0x00000000000000ff
+ output: a0=0x000000000000001f, fcsr=0x00000000000000e0
+csrrw a0, fflags, a1 ::
+ inputs: a1=0x00000000000000ff, fcsr=0x0000000000000000
+ output: a0=0x0000000000000000, fcsr=0x000000000000001f
+csrrw t5, fflags, t6 ::
+ inputs: t6=0x0000000000000001, fcsr=0x0000000000000000
+ output: t5=0x0000000000000000, fcsr=0x0000000000000001
+csrrw zero, fflags, a1 ::
+ inputs: a1=0x0000000000000001, fcsr=0x00000000000000ff
+ output: zero=0x0000000000000000, fcsr=0x00000000000000e1
+csrrw a0, fflags, zero ::
+ inputs: zero=0x0000000000000000, fcsr=0x00000000000000ff
+ output: a0=0x000000000000001f, fcsr=0x00000000000000e0
+csrrw a0, frm, a1 ::
+ inputs: a1=0x0000000000000001, fcsr=0x0000000000000000
+ output: a0=0x0000000000000000, fcsr=0x0000000000000020
+csrrw a0, frm, a1 ::
+ inputs: a1=0x0000000000000007, fcsr=0x0000000000000000
+ output: a0=0x0000000000000000, fcsr=0x00000000000000e0
+csrrw a0, frm, a1 ::
+ inputs: a1=0x0000000000000006, fcsr=0x00000000000000ff
+ output: a0=0x0000000000000007, fcsr=0x00000000000000df
+csrrw a0, frm, a1 ::
+ inputs: a1=0x0000000000000000, fcsr=0x00000000000000ff
+ output: a0=0x0000000000000007, fcsr=0x000000000000001f
+csrrw a0, frm, a1 ::
+ inputs: a1=0x00000000000000ff, fcsr=0x0000000000000000
+ output: a0=0x0000000000000000, fcsr=0x00000000000000e0
+csrrw t5, frm, t6 ::
+ inputs: t6=0x0000000000000001, fcsr=0x0000000000000000
+ output: t5=0x0000000000000000, fcsr=0x0000000000000020
+csrrw zero, frm, a1 ::
+ inputs: a1=0x0000000000000001, fcsr=0x00000000000000ff
+ output: zero=0x0000000000000000, fcsr=0x000000000000003f
+csrrw a0, frm, zero ::
+ inputs: zero=0x0000000000000000, fcsr=0x00000000000000ff
+ output: a0=0x0000000000000007, fcsr=0x000000000000001f
+csrrw a0, fcsr, a1 ::
+ inputs: a1=0x0000000000000001, fcsr=0x0000000000000000
+ output: a0=0x0000000000000000, fcsr=0x0000000000000001
+csrrw a0, fcsr, a1 ::
+ inputs: a1=0x00000000000000ff, fcsr=0x0000000000000000
+ output: a0=0x0000000000000000, fcsr=0x00000000000000ff
+csrrw a0, fcsr, a1 ::
+ inputs: a1=0x00000000000000fe, fcsr=0x00000000000000ff
+ output: a0=0x00000000000000ff, fcsr=0x00000000000000fe
+csrrw a0, fcsr, a1 ::
+ inputs: a1=0x0000000000000000, fcsr=0x00000000000000ff
+ output: a0=0x00000000000000ff, fcsr=0x0000000000000000
+csrrw a0, fcsr, a1 ::
+ inputs: a1=0x00000000000000ff, fcsr=0x0000000000000000
+ output: a0=0x0000000000000000, fcsr=0x00000000000000ff
+csrrw t5, fcsr, t6 ::
+ inputs: t6=0x0000000000000001, fcsr=0x0000000000000000
+ output: t5=0x0000000000000000, fcsr=0x0000000000000001
+csrrw zero, fcsr, a1 ::
+ inputs: a1=0x0000000000000001, fcsr=0x00000000000000ff
+ output: zero=0x0000000000000000, fcsr=0x0000000000000001
+csrrw a0, fcsr, zero ::
+ inputs: zero=0x0000000000000000, fcsr=0x00000000000000ff
+ output: a0=0x00000000000000ff, fcsr=0x0000000000000000
+csrrs a0, fflags, a1 ::
+ inputs: a1=0x0000000000000001, fcsr=0x0000000000000000
+ output: a0=0x0000000000000000, fcsr=0x0000000000000001
+csrrs a0, fflags, a1 ::
+ inputs: a1=0x000000000000001f, fcsr=0x0000000000000000
+ output: a0=0x0000000000000000, fcsr=0x000000000000001f
+csrrs a0, fflags, a1 ::
+ inputs: a1=0x000000000000001e, fcsr=0x00000000000000ff
+ output: a0=0x000000000000001f, fcsr=0x00000000000000ff
+csrrs a0, fflags, a1 ::
+ inputs: a1=0x0000000000000000, fcsr=0x00000000000000ff
+ output: a0=0x000000000000001f, fcsr=0x00000000000000ff
+csrrs a0, fflags, a1 ::
+ inputs: a1=0x00000000000000ff, fcsr=0x0000000000000000
+ output: a0=0x0000000000000000, fcsr=0x000000000000001f
+csrrs t5, fflags, t6 ::
+ inputs: t6=0x0000000000000001, fcsr=0x0000000000000000
+ output: t5=0x0000000000000000, fcsr=0x0000000000000001
+csrrs zero, fflags, a1 ::
+ inputs: a1=0x0000000000000001, fcsr=0x00000000000000ff
+ output: zero=0x0000000000000000, fcsr=0x00000000000000ff
+csrrs a0, fflags, zero ::
+ inputs: zero=0x0000000000000000, fcsr=0x00000000000000ff
+ output: a0=0x000000000000001f, fcsr=0x00000000000000ff
+csrrs a0, frm, a1 ::
+ inputs: a1=0x0000000000000001, fcsr=0x0000000000000000
+ output: a0=0x0000000000000000, fcsr=0x0000000000000020
+csrrs a0, frm, a1 ::
+ inputs: a1=0x0000000000000007, fcsr=0x0000000000000000
+ output: a0=0x0000000000000000, fcsr=0x00000000000000e0
+csrrs a0, frm, a1 ::
+ inputs: a1=0x0000000000000006, fcsr=0x00000000000000ff
+ output: a0=0x0000000000000007, fcsr=0x00000000000000ff
+csrrs a0, frm, a1 ::
+ inputs: a1=0x0000000000000000, fcsr=0x00000000000000ff
+ output: a0=0x0000000000000007, fcsr=0x00000000000000ff
+csrrs a0, frm, a1 ::
+ inputs: a1=0x00000000000000ff, fcsr=0x0000000000000000
+ output: a0=0x0000000000000000, fcsr=0x00000000000000e0
+csrrs t5, frm, t6 ::
+ inputs: t6=0x0000000000000001, fcsr=0x0000000000000000
+ output: t5=0x0000000000000000, fcsr=0x0000000000000020
+csrrs zero, frm, a1 ::
+ inputs: a1=0x0000000000000001, fcsr=0x00000000000000ff
+ output: zero=0x0000000000000000, fcsr=0x00000000000000ff
+csrrs a0, frm, zero ::
+ inputs: zero=0x0000000000000000, fcsr=0x00000000000000ff
+ output: a0=0x0000000000000007, fcsr=0x00000000000000ff
+csrrs a0, fcsr, a1 ::
+ inputs: a1=0x0000000000000001, fcsr=0x0000000000000000
+ output: a0=0x0000000000000000, fcsr=0x0000000000000001
+csrrs a0, fcsr, a1 ::
+ inputs: a1=0x00000000000000ff, fcsr=0x0000000000000000
+ output: a0=0x0000000000000000, fcsr=0x00000000000000ff
+csrrs a0, fcsr, a1 ::
+ inputs: a1=0x00000000000000fe, fcsr=0x00000000000000ff
+ output: a0=0x00000000000000ff, fcsr=0x00000000000000ff
+csrrs a0, fcsr, a1 ::
+ inputs: a1=0x0000000000000000, fcsr=0x00000000000000ff
+ output: a0=0x00000000000000ff, fcsr=0x00000000000000ff
+csrrs a0, fcsr, a1 ::
+ inputs: a1=0x00000000000000ff, fcsr=0x0000000000000000
+ output: a0=0x0000000000000000, fcsr=0x00000000000000ff
+csrrs t5, fcsr, t6 ::
+ inputs: t6=0x0000000000000001, fcsr=0x0000000000000000
+ output: t5=0x0000000000000000, fcsr=0x0000000000000001
+csrrs zero, fcsr, a1 ::
+ inputs: a1=0x0000000000000001, fcsr=0x00000000000000ff
+ output: zero=0x0000000000000000, fcsr=0x00000000000000ff
+csrrs a0, fcsr, zero ::
+ inputs: zero=0x0000000000000000, fcsr=0x00000000000000ff
+ output: a0=0x00000000000000ff, fcsr=0x00000000000000ff
--- /dev/null
+prog: csr
+vgopts: -q
--- /dev/null
+#! /bin/sh
+
+../filter_stderr
--- /dev/null
+/* Tests for the RV64F standard single-precision floating-point instruction-set
+ extension. */
+
+#include "testinst.h"
+
+static void test_float32_shared(void)
+{
+ printf("RV64F single-precision FP instruction set, shared operations\n");
+
+ /* --------------- flw rd, imm[11:0](rs1) ---------------- */
+ TESTINST_1_1_FLOAD(4, "flw fa0, 0(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "flw fa0, 4(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "flw fa0, 8(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "flw fa0, 16(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "flw fa0, 32(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "flw fa0, 64(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "flw fa0, 128(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "flw fa0, 256(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "flw fa0, 512(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "flw fa0, 1024(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "flw fa0, 2040(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "flw fa0, -4(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "flw fa0, -2048(a1)", fa0, a1);
+
+ TESTINST_1_1_FLOAD(4, "flw fa4, 0(a5)", fa4, a5);
+
+ /* --------------- fsw rs2, imm[11:0](rs1) --------------- */
+ TESTINST_0_2_FSTORE(4, "fsw fa0, 0(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsw fa0, 4(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsw fa0, 8(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsw fa0, 16(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsw fa0, 32(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsw fa0, 64(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsw fa0, 128(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsw fa0, 256(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsw fa0, 512(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsw fa0, 1024(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsw fa0, 2040(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsw fa0, -4(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsw fa0, -2048(a1)", 0xabcdef0123456789, fa0, a1);
+
+ TESTINST_0_2_FSTORE(4, "fsw fa4, 0(a5)", 0xabcdef0123456789, fa4, a5);
+
+ /* ------------ fmadd.s rd, rs1, rs2, rs3, rm ------------ */
+ /* 3.0 * 2.0 + 1.0 -> 7.0 */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3", 0xffffffff40400000,
+ 0xffffffff40000000, 0xffffffff3f800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 1.0 + -1.0 -> 0.0 */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffffbf800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 2.0 * FLT_TRUE_MIN + -FLT_TRUE_MIN -> FLT_TRUE_MIN (no UF because exact)
+ */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3", 0xffffffff40000000,
+ 0xffffffff00000001, 0xffffffff80000001, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 2.0 * FLT_MAX + -FLT_MAX -> FLT_MAX */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3", 0xffffffff40000000,
+ 0xffffffff7f7fffff, 0xffffffffff7fffff, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 2.0 * FLT_MAX + 0.0 -> INFINITY (OF, NX) */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3", 0xffffffff40000000,
+ 0xffffffff7f7fffff, 0xffffffff00000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 2.0 * INFINITY + -INFINITY -> qNAN (NV) */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3", 0xffffffff40000000,
+ 0xffffffff7f800000, 0xffffffffff800000, 0x00, fa0, fa1, fa2,
+ fa3);
+
+ /* 1.0 * 1.0 + FLT_EPSILON/2 (RNE) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3, rne", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * nextafterf(1.0) + FLT_EPSILON/2 (RNE) -> 2nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3, rne", 0xffffffff3f800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 1.0 + FLT_EPSILON/2 (RTZ) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3, rtz", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 + -FLT_EPSILON/2 (RTZ) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3, rtz", 0xffffffff3f800000,
+ 0xffffffffbf800000, 0xffffffffb3800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 1.0 + FLT_EPSILON/2 (RDN) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3, rdn", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 + -FLT_EPSILON/2 (RDN) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3, rdn", 0xffffffff3f800000,
+ 0xffffffffbf800000, 0xffffffffb3800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 1.0 + FLT_EPSILON/2 (RUP) -> nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3, rup", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 + -FLT_EPSILON/2 (RUP) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3, rup", 0xffffffff3f800000,
+ 0xffffffffbf800000, 0xffffffffb3800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 1.0 + FLT_EPSILON/2 (RMM) -> nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3, rmm", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 + -FLT_EPSILON/2 (RMM) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3, rmm", 0xffffffff3f800000,
+ 0xffffffffbf800000, 0xffffffffb3800000, 0x00, fa0, fa1, fa2,
+ fa3);
+
+ /* 1.0 * 1.0 + FLT_EPSILON/2 (DYN-RNE) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * nextafterf(1.0) + FLT_EPSILON/2 (DYN-RNE) -> 2nextafterf(1.0) (NX)
+ */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 1.0 + FLT_EPSILON/2 (DYN-RTZ) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x20, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 + -FLT_EPSILON/2 (DYN-RTZ) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffffbf800000, 0xffffffffb3800000, 0x20, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 1.0 + FLT_EPSILON/2 (DYN-RDN) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x40, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 + -FLT_EPSILON/2 (DYN-RDN) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffffbf800000, 0xffffffffb3800000, 0x40, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 1.0 + FLT_EPSILON/2 (DYN-RUP) -> nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x60, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 + -FLT_EPSILON/2 (DYN-RUP) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffffbf800000, 0xffffffffb3800000, 0x60, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 1.0 + FLT_EPSILON/2 (DYN-RMM) -> nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x80, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 + -FLT_EPSILON/2 (DYN-RMM) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmadd.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffffbf800000, 0xffffffffb3800000, 0x80, fa0, fa1, fa2,
+ fa3);
+
+ /* ------------ fmsub.s rd, rs1, rs2, rs3, rm ------------ */
+ /* 3.0 * 2.0 - 1.0 -> 5.0 */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3", 0xffffffff40400000,
+ 0xffffffff40000000, 0xffffffff3f800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 1.0 - 1.0 -> 0.0 */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffff3f800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 2.0 * FLT_TRUE_MIN - FLT_TRUE_MIN -> FLT_TRUE_MIN (no UF because exact)
+ */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3", 0xffffffff40000000,
+ 0xffffffff00000001, 0xffffffff00000001, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 2.0 * FLT_MAX - FLT_MAX -> FLT_MAX */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3", 0xffffffff40000000,
+ 0xffffffff7f7fffff, 0xffffffff7f7fffff, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 2.0 * FLT_MAX - 0.0 -> INFINITY (OF, NX) */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3", 0xffffffff40000000,
+ 0xffffffff7f7fffff, 0xffffffff00000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 2.0 * INFINITY - INFINITY -> qNAN (NV) */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3", 0xffffffff40000000,
+ 0xffffffff7f800000, 0xffffffff7f800000, 0x00, fa0, fa1, fa2,
+ fa3);
+
+ /* 1.0 * nextafterf(1.0) - FLT_EPSILON/2 (RNE) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3, rne", 0xffffffff3f800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 2nextafterf(1.0) - FLT_EPSILON/2 (RNE) -> 2nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3, rne", 0xffffffff3f800000,
+ 0xffffffff3f800002, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * nextafterf(1.0) - FLT_EPSILON/2 (RTZ) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3, rtz", 0xffffffff3f800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 - FLT_EPSILON/2 (RTZ) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3, rtz", 0xffffffff3f800000,
+ 0xffffffffbf800000, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * nextafterf(1.0) - FLT_EPSILON/2 (RDN) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3, rdn", 0xffffffff3f800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 - FLT_EPSILON/2 (RDN) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3, rdn", 0xffffffff3f800000,
+ 0xffffffffbf800000, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * nextafterf(1.0) - FLT_EPSILON/2 (RUP) -> nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3, rup", 0xffffffff3f800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 - FLT_EPSILON/2 (RUP) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3, rup", 0xffffffff3f800000,
+ 0xffffffffbf800000, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * nextafterf(1.0) - FLT_EPSILON/2 (RMM) -> nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3, rmm", 0xffffffff3f800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 - FLT_EPSILON/2 (RMM) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3, rmm", 0xffffffff3f800000,
+ 0xffffffffbf800000, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+
+ /* 1.0 * nextafterf(1.0) - FLT_EPSILON/2 (DYN-RNE) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 2nextafterf(1.0) - FLT_EPSILON/2 (DYN-RNE) -> 2nextafterf(1.0) (NX)
+ */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800002, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * nextafterf(1.0) - FLT_EPSILON/2 (DYN-RTZ) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x20, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 - FLT_EPSILON/2 (DYN-RTZ) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffffbf800000, 0xffffffff33800000, 0x20, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * nextafterf(1.0) - FLT_EPSILON/2 (DYN-RDN) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x40, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 - FLT_EPSILON/2 (DYN-RDN) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffffbf800000, 0xffffffff33800000, 0x40, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * nextafterf(1.0) - FLT_EPSILON/2 (DYN-RUP) -> nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x60, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 - FLT_EPSILON/2 (DYN-RUP) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffffbf800000, 0xffffffff33800000, 0x60, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * nextafterf(1.0) - FLT_EPSILON/2 (DYN-RMM) -> nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x80, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 - FLT_EPSILON/2 (DYN-RMM) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmsub.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffffbf800000, 0xffffffff33800000, 0x80, fa0, fa1, fa2,
+ fa3);
+
+ /* ----------- fnmsub.s rd, rs1, rs2, rs3, rm ------------ */
+ /* -(3.0 * 2.0) + 1.0 -> -5.0 */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3", 0xffffffff40400000,
+ 0xffffffff40000000, 0xffffffff3f800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) + 1.0 -> 0.0 */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffff3f800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(2.0 * FLT_TRUE_MIN) + FLT_TRUE_MIN -> -FLT_TRUE_MIN (no UF because
+ exact) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3", 0xffffffff40000000,
+ 0xffffffff00000001, 0xffffffff00000001, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(2.0 * FLT_MAX) + FLT_MAX -> -FLT_MAX */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3", 0xffffffff40000000,
+ 0xffffffff7f7fffff, 0xffffffff7f7fffff, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(2.0 * FLT_MAX) + 0.0 -> -INFINITY (OF, NX) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3", 0xffffffff40000000,
+ 0xffffffff7f7fffff, 0xffffffff00000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(2.0 * INFINITY) + INFINITY -> qNAN (NV) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3", 0xffffffff40000000,
+ 0xffffffff7f800000, 0xffffffff7f800000, 0x00, fa0, fa1, fa2,
+ fa3);
+
+ /* -(-1.0 * 1.0) + FLT_EPSILON/2 (RNE) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3, rne", 0xffffffffbf800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * nextafterf(1.0)) + FLT_EPSILON/2 (RNE) -> 2nextafterf(1.0) (NX)
+ */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3, rne", 0xffffffffbf800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * 1.0) + FLT_EPSILON/2 (RTZ) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3, rtz", 0xffffffffbf800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) + -FLT_EPSILON/2 (RTZ) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3, rtz", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffffb3800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * 1.0) + FLT_EPSILON/2 (RDN) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3, rdn", 0xffffffffbf800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) + -FLT_EPSILON/2 (RDN) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3, rdn", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffffb3800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * 1.0) + FLT_EPSILON/2 (RUP) -> nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3, rup", 0xffffffffbf800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) + -FLT_EPSILON/2 (RUP) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3, rup", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffffb3800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * 1.0) + FLT_EPSILON/2 (RMM) -> nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3, rmm", 0xffffffffbf800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) + -FLT_EPSILON/2 (RMM) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3, rmm", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffffb3800000, 0x00, fa0, fa1, fa2,
+ fa3);
+
+ /* -(-1.0 * 1.0) + FLT_EPSILON/2 (DYN-RNE) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3", 0xffffffffbf800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * nextafterf(1.0)) + FLT_EPSILON/2 (DYN-RNE) ->
+ 2nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3", 0xffffffffbf800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * 1.0) + FLT_EPSILON/2 (DYN-RTZ) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3", 0xffffffffbf800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x20, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) + -FLT_EPSILON/2 (DYN-RTZ) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffffb3800000, 0x20, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * 1.0) + FLT_EPSILON/2 (DYN-RDN) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3", 0xffffffffbf800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x40, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) + -FLT_EPSILON/2 (DYN-RDN) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffffb3800000, 0x40, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * 1.0) + FLT_EPSILON/2 (DYN-RUP) -> nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3", 0xffffffffbf800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x60, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) + -FLT_EPSILON/2 (DYN-RUP) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffffb3800000, 0x60, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * 1.0) + FLT_EPSILON/2 (DYN-RMM) -> nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3", 0xffffffffbf800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x80, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) + -FLT_EPSILON/2 (DYN-RMM) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmsub.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffffb3800000, 0x80, fa0, fa1, fa2,
+ fa3);
+
+ /* ----------- fnmadd.s rd, rs1, rs2, rs3, rm ------------ */
+ /* -(3.0 * 2.0) - 1.0 -> -7.0 */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3", 0xffffffff40400000,
+ 0xffffffff40000000, 0xffffffff3f800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) - -1.0 -> 0.0 */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffffbf800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(2.0 * FLT_TRUE_MIN) - -FLT_TRUE_MIN -> -FLT_TRUE_MIN (no UF because
+ exact) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3", 0xffffffff40000000,
+ 0xffffffff00000001, 0xffffffff80000001, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(2.0 * FLT_MAX) - -FLT_MAX -> -FLT_MAX */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3", 0xffffffff40000000,
+ 0xffffffff7f7fffff, 0xffffffffff7fffff, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(2.0 * FLT_MAX) - 0.0 -> -INFINITY (OF, NX) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3", 0xffffffff40000000,
+ 0xffffffff7f7fffff, 0xffffffff00000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(2.0 * INFINITY) - -INFINITY -> qNAN (NV) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3", 0xffffffff40000000,
+ 0xffffffff7f800000, 0xffffffffff800000, 0x00, fa0, fa1, fa2,
+ fa3);
+
+ /* -(-1.0 * nextafterf(1.0)) - FLT_EPSILON/2 (RNE) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3, rne", 0xffffffffbf800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * 2nextafterf(1.0)) - FLT_EPSILON/2 (RNE) -> 2nextafterf(1.0) (NX)
+ */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3, rne", 0xffffffffbf800000,
+ 0xffffffff3f800002, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * nextafterf(1.0)) - FLT_EPSILON/2 (RTZ) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3, rtz", 0xffffffffbf800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) - FLT_EPSILON/2 (RTZ) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3, rtz", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * nextafterf(1.0)) - FLT_EPSILON/2 (RDN) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3, rdn", 0xffffffffbf800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) - FLT_EPSILON/2 (RDN) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3, rdn", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * nextafterf(1.0)) - FLT_EPSILON/2 (RUP) -> nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3, rup", 0xffffffffbf800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) - FLT_EPSILON/2 (RUP) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3, rup", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * nextafterf(1.0)) - FLT_EPSILON/2 (RMM) -> nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3, rmm", 0xffffffffbf800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) - FLT_EPSILON/2 (RMM) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3, rmm", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+
+ /* -(-1.0 * nextafterf(1.0)) - FLT_EPSILON/2 (DYN-RNE) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3", 0xffffffffbf800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * 2nextafterf(1.0)) - FLT_EPSILON/2 (DYN-RNE) -> 2nextafterf(1.0)
+ (NX) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3", 0xffffffffbf800000,
+ 0xffffffff3f800002, 0xffffffff33800000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * nextafterf(1.0)) - FLT_EPSILON/2 (DYN-RTZ) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3", 0xffffffffbf800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x20, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) - FLT_EPSILON/2 (DYN-RTZ) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x20, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * nextafterf(1.0)) - FLT_EPSILON/2 (DYN-RDN) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3", 0xffffffffbf800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x40, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) - FLT_EPSILON/2 (DYN-RDN) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x40, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * nextafterf(1.0)) - FLT_EPSILON/2 (DYN-RUP) ->
+ nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3", 0xffffffffbf800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x60, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) - FLT_EPSILON/2 (DYN-RUP) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x60, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * nextafterf(1.0)) - FLT_EPSILON/2 (DYN-RMM) ->
+ nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3", 0xffffffffbf800000,
+ 0xffffffff3f800001, 0xffffffff33800000, 0x80, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) - FLT_EPSILON/2 (DYN-RMM) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmadd.s fa0, fa1, fa2, fa3", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0xffffffff33800000, 0x80, fa0, fa1, fa2,
+ fa3);
+
+ /* --------------- fadd.s rd, rs1, rs2, rm --------------- */
+ /* 2.0 + 1.0 -> 3.0 */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2", 0xffffffff40000000,
+ 0xffffffff3f800000, 0x00, fa0, fa1, fa2);
+ /* 1.0 + -1.0 -> 0.0 */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2", 0xffffffff3f800000,
+ 0xffffffffbf800000, 0x00, fa0, fa1, fa2);
+ /* FLT_TRUE_MIN + FLT_TRUE_MIN -> 2*FLT_TRUE_MIN (no UF because exact) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2", 0xffffffff00000001,
+ 0xffffffff00000001, 0x00, fa0, fa1, fa2);
+ /* FLT_MAX + FLT_MAX -> INFINITY (OF, NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2", 0xffffffff7f7fffff,
+ 0xffffffff7f7fffff, 0x00, fa0, fa1, fa2);
+ /* -FLT_MAX + -FLT_MAX -> -INFINITY (OF, NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2", 0xffffffffff7fffff,
+ 0xffffffffff7fffff, 0x00, fa0, fa1, fa2);
+ /* nextafterf(FLT_MIN) + -FLT_MIN -> FLT_TRUE_MIN (no UF because exact) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2", 0xffffffff00800001,
+ 0xffffffff80800000, 0x00, fa0, fa1, fa2);
+ /* INFINITY + -INFINITY -> qNAN (NV) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2", 0xffffffff7f800000,
+ 0xffffffffff800000, 0x00, fa0, fa1, fa2);
+
+ /* 1.0 + FLT_EPSILON/2 (RNE) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2, rne", 0xffffffff3f800000,
+ 0xffffffff33800000, 0x00, fa0, fa1, fa2);
+ /* nextafterf(1.0) + FLT_EPSILON/2 (RNE) -> 2nextafterf(1.0) (NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2, rne", 0xffffffff3f800001,
+ 0xffffffff33800000, 0x00, fa0, fa1, fa2);
+ /* 1.0 + FLT_EPSILON/2 (RTZ) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2, rtz", 0xffffffff3f800000,
+ 0xffffffff33800000, 0x00, fa0, fa1, fa2);
+ /* -1.0 + -FLT_EPSILON/2 (RTZ) -> -1.0 (NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2, rtz", 0xffffffffbf800000,
+ 0xffffffffb3800000, 0x00, fa0, fa1, fa2);
+ /* 1.0 + FLT_EPSILON/2 (RDN) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2, rdn", 0xffffffff3f800000,
+ 0xffffffff33800000, 0x00, fa0, fa1, fa2);
+ /* -1.0 + -FLT_EPSILON/2 (RDN) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2, rdn", 0xffffffffbf800000,
+ 0xffffffffb3800000, 0x00, fa0, fa1, fa2);
+ /* 1.0 + FLT_EPSILON/2 (RUP) -> nextafterf(1.0) (NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2, rup", 0xffffffff3f800000,
+ 0xffffffff33800000, 0x00, fa0, fa1, fa2);
+ /* -1.0 + -FLT_EPSILON/2 (RUP) -> -1.0 (NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2, rup", 0xffffffffbf800000,
+ 0xffffffffb3800000, 0x00, fa0, fa1, fa2);
+ /* 1.0 + FLT_EPSILON/2 (RMM) -> nextafterf(1.0) (NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2, rmm", 0xffffffff3f800000,
+ 0xffffffff33800000, 0x00, fa0, fa1, fa2);
+ /* -1.0 + -FLT_EPSILON/2 (RMM) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2, rmm", 0xffffffffbf800000,
+ 0xffffffffb3800000, 0x00, fa0, fa1, fa2);
+
+ /* 1.0 + FLT_EPSILON/2 (DYN-RNE) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2", 0xffffffff3f800000,
+ 0xffffffff33800000, 0x00, fa0, fa1, fa2);
+ /* nextafterf(1.0) + FLT_EPSILON/2 (DYN-RNE) -> 2nextafterf(1.0) (NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2", 0xffffffff3f800001,
+ 0xffffffff33800000, 0x00, fa0, fa1, fa2);
+ /* 1.0 + FLT_EPSILON/2 (DYN-RTZ) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2", 0xffffffff3f800000,
+ 0xffffffff33800000, 0x20, fa0, fa1, fa2);
+ /* -1.0 + -FLT_EPSILON/2 (DYN-RTZ) -> -1.0 (NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2", 0xffffffffbf800000,
+ 0xffffffffb3800000, 0x20, fa0, fa1, fa2);
+ /* 1.0 + FLT_EPSILON/2 (DYN-RDN) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2", 0xffffffff3f800000,
+ 0xffffffff33800000, 0x40, fa0, fa1, fa2);
+ /* -1.0 + -FLT_EPSILON/2 (DYN-RDN) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2", 0xffffffffbf800000,
+ 0xffffffffb3800000, 0x40, fa0, fa1, fa2);
+ /* 1.0 + FLT_EPSILON/2 (DYN-RUP) -> nextafterf(1.0) (NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2", 0xffffffff3f800000,
+ 0xffffffff33800000, 0x60, fa0, fa1, fa2);
+ /* -1.0 + -FLT_EPSILON/2 (DYN-RUP) -> -1.0 (NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2", 0xffffffffbf800000,
+ 0xffffffffb3800000, 0x60, fa0, fa1, fa2);
+ /* 1.0 + FLT_EPSILON/2 (DYN-RMM) -> nextafterf(1.0) (NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2", 0xffffffff3f800000,
+ 0xffffffff33800000, 0x80, fa0, fa1, fa2);
+ /* -1.0 + -FLT_EPSILON/2 (DYN-RMM) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_2_F(4, "fadd.s fa0, fa1, fa2", 0xffffffffbf800000,
+ 0xffffffffb3800000, 0x80, fa0, fa1, fa2);
+
+ /* --------------- fsub.s rd, rs1, rs2, rm --------------- */
+ /* 2.0 - 1.0 -> 1.0 */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2", 0xffffffff40000000,
+ 0xffffffff3f800000, 0x00, fa0, fa1, fa2);
+ /* 1.0 - 1.0 -> 0.0 */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0x00, fa0, fa1, fa2);
+ /* FLT_TRUE_MIN - -FLT_TRUE_MIN -> 2*FLT_TRUE_MIN (no UF because exact) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2", 0xffffffff00000001,
+ 0xffffffff80000001, 0x00, fa0, fa1, fa2);
+ /* FLT_MAX - -FLT_MAX -> INFINITY (OF, NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2", 0xffffffff7f7fffff,
+ 0xffffffffff7fffff, 0x00, fa0, fa1, fa2);
+ /* -FLT_MAX - FLT_MAX -> -INFINITY (OF, NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2", 0xffffffffff7fffff,
+ 0xffffffff7f7fffff, 0x00, fa0, fa1, fa2);
+ /* nextafterf(FLT_MIN) - FLT_MIN -> FLT_TRUE_MIN (no UF because exact) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2", 0xffffffff00800001,
+ 0xffffffff00800000, 0x00, fa0, fa1, fa2);
+ /* INFINITY - INFINITY -> qNAN (NV) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2", 0xffffffff7f800000,
+ 0xffffffff7f800000, 0x00, fa0, fa1, fa2);
+
+ /* nextafterf(1.0) - FLT_EPSILON/2 (RNE) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2, rne", 0xffffffff3f800001,
+ 0xffffffff33800000, 0x00, fa0, fa1, fa2);
+ /* 2nextafterf(1.0) - FLT_EPSILON/2 (RNE) -> 2nextafterf(1.0) (NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2, rne", 0xffffffff3f800002,
+ 0xffffffff33800000, 0x00, fa0, fa1, fa2);
+ /* nextafterf(1.0) - FLT_EPSILON/2 (RTZ) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2, rtz", 0xffffffff3f800001,
+ 0xffffffff33800000, 0x00, fa0, fa1, fa2);
+ /* -1.0 - FLT_EPSILON/2 (RTZ) -> -1.0 (NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2, rtz", 0xffffffffbf800000,
+ 0xffffffff33800000, 0x00, fa0, fa1, fa2);
+ /* nextafterf(1.0) - FLT_EPSILON/2 (RDN) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2, rdn", 0xffffffff3f800001,
+ 0xffffffff33800000, 0x00, fa0, fa1, fa2);
+ /* -1.0 - FLT_EPSILON/2 (RDN) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2, rdn", 0xffffffffbf800000,
+ 0xffffffff33800000, 0x00, fa0, fa1, fa2);
+ /* nextafterf(1.0) - FLT_EPSILON/2 (RUP) -> nextafterf(1.0) (NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2, rup", 0xffffffff3f800001,
+ 0xffffffff33800000, 0x00, fa0, fa1, fa2);
+ /* -1.0 - FLT_EPSILON/2 (RUP) -> -1.0 (NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2, rup", 0xffffffffbf800000,
+ 0xffffffff33800000, 0x00, fa0, fa1, fa2);
+ /* nextafterf(1.0) - FLT_EPSILON/2 (RMM) -> nextafterf(1.0) (NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2, rmm", 0xffffffff3f800001,
+ 0xffffffff33800000, 0x00, fa0, fa1, fa2);
+ /* -1.0 - FLT_EPSILON/2 (RMM) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2, rmm", 0xffffffffbf800000,
+ 0xffffffff33800000, 0x00, fa0, fa1, fa2);
+
+ /* nextafterf(1.0) - FLT_EPSILON/2 (DYN-RNE) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2", 0xffffffff3f800001,
+ 0xffffffff33800000, 0x00, fa0, fa1, fa2);
+ /* 2nextafterf(1.0) - FLT_EPSILON/2 (DYN-RNE) -> 2nextafterf(1.0) (NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2", 0xffffffff3f800002,
+ 0xffffffff33800000, 0x00, fa0, fa1, fa2);
+ /* nextafterf(1.0) - FLT_EPSILON/2 (DYN-RTZ) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2", 0xffffffff3f800001,
+ 0xffffffff33800000, 0x20, fa0, fa1, fa2);
+ /* -1.0 - FLT_EPSILON/2 (DYN-RTZ) -> -1.0 (NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2", 0xffffffffbf800000,
+ 0xffffffff33800000, 0x20, fa0, fa1, fa2);
+ /* nextafterf(1.0) - FLT_EPSILON/2 (DYN-RDN) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2", 0xffffffff3f800001,
+ 0xffffffff33800000, 0x40, fa0, fa1, fa2);
+ /* -1.0 - FLT_EPSILON/2 (DYN-RDN) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2", 0xffffffffbf800000,
+ 0xffffffff33800000, 0x40, fa0, fa1, fa2);
+ /* nextafterf(1.0) - FLT_EPSILON/2 (DYN-RUP) -> nextafterf(1.0) (NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2", 0xffffffff3f800001,
+ 0xffffffff33800000, 0x60, fa0, fa1, fa2);
+ /* -1.0 - FLT_EPSILON/2 (DYN-RUP) -> -1.0 (NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2", 0xffffffffbf800000,
+ 0xffffffff33800000, 0x60, fa0, fa1, fa2);
+ /* nextafterf(1.0) - FLT_EPSILON/2 (DYN-RMM) -> nextafterf(1.0) (NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2", 0xffffffff3f800001,
+ 0xffffffff33800000, 0x80, fa0, fa1, fa2);
+ /* -1.0 - FLT_EPSILON/2 (DYN-RMM) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_2_F(4, "fsub.s fa0, fa1, fa2", 0xffffffffbf800000,
+ 0xffffffff33800000, 0x80, fa0, fa1, fa2);
+
+ /* --------------- fmul.s rd, rs1, rs2, rm --------------- */
+ /* 2.0 * 1.0 -> 2.0 */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2", 0xffffffff40000000,
+ 0xffffffff3f800000, 0x00, fa0, fa1, fa2);
+ /* 1.0 * 0.0 -> 0.0 */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2", 0xffffffff3f800000,
+ 0xffffffff00000000, 0x00, fa0, fa1, fa2);
+ /* 2**-74 * 2**-75 -> 2**-149 aka FLT_TRUE_MIN (no UF because exact) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2", 0xffffffff1a800000,
+ 0xffffffff1a000000, 0x00, fa0, fa1, fa2);
+ /* FLT_MAX * FLT_MAX -> INFINITY (OF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2", 0xffffffff7f7fffff,
+ 0xffffffff7f7fffff, 0x00, fa0, fa1, fa2);
+ /* FLT_MAX * -FLT_MAX -> -INFINITY (OF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2", 0xffffffff7f7fffff,
+ 0xffffffffff7fffff, 0x00, fa0, fa1, fa2);
+ /* 1.0 * INFINITY -> INFINITY */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2", 0xffffffff3f800000,
+ 0xffffffff7f800000, 0x00, fa0, fa1, fa2);
+ /* 0.0 * INFINITY -> qNAN (NV) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2", 0xffffffff00000000,
+ 0xffffffff7f800000, 0x00, fa0, fa1, fa2);
+
+ /* FLT_TRUE_MIN * 0.5 (RNE) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2, rne", 0xffffffff00000001,
+ 0xffffffff3f000000, 0x00, fa0, fa1, fa2);
+ /* 3*FLT_TRUE_MIN * 0.5 (RNE) -> 2*FLT_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2, rne", 0xffffffff00000003,
+ 0xffffffff3f000000, 0x00, fa0, fa1, fa2);
+ /* FLT_TRUE_MIN * 0.5 (RTZ) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2, rtz", 0xffffffff00000001,
+ 0xffffffff3f000000, 0x00, fa0, fa1, fa2);
+ /* -FLT_TRUE_MIN * 0.5 (RTZ) -> -0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2, rtz", 0xffffffff80000001,
+ 0xffffffff3f000000, 0x00, fa0, fa1, fa2);
+ /* FLT_TRUE_MIN * 0.5 (RDN) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2, rdn", 0xffffffff00000001,
+ 0xffffffff3f000000, 0x00, fa0, fa1, fa2);
+ /* -FLT_TRUE_MIN * 0.5 (RDN) -> -FLT_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2, rdn", 0xffffffff80000001,
+ 0xffffffff3f000000, 0x00, fa0, fa1, fa2);
+ /* FLT_TRUE_MIN * 0.5 (RUP) -> FLT_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2, rup", 0xffffffff00000001,
+ 0xffffffff3f000000, 0x00, fa0, fa1, fa2);
+ /* -FLT_TRUE_MIN * 0.5 (RUP) -> -0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2, rup", 0xffffffff80000001,
+ 0xffffffff3f000000, 0x00, fa0, fa1, fa2);
+ /* FLT_TRUE_MIN * 0.5 (RMM) -> FLT_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2, rmm", 0xffffffff00000001,
+ 0xffffffff3f000000, 0x00, fa0, fa1, fa2);
+ /* -FLT_TRUE_MIN * 0.5 (RMM) -> -FLT_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2, rmm", 0xffffffff80000001,
+ 0xffffffff3f000000, 0x00, fa0, fa1, fa2);
+
+ /* FLT_TRUE_MIN * 0.5 (DYN-RNE) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2", 0xffffffff00000001,
+ 0xffffffff3f000000, 0x00, fa0, fa1, fa2);
+ /* 3*FLT_TRUE_MIN * 0.5 (DYN-RNE) -> 2*FLT_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2", 0xffffffff00000003,
+ 0xffffffff3f000000, 0x00, fa0, fa1, fa2);
+ /* FLT_TRUE_MIN * 0.5 (DYN-RTZ) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2", 0xffffffff00000001,
+ 0xffffffff3f000000, 0x20, fa0, fa1, fa2);
+ /* -FLT_TRUE_MIN * 0.5 (DYN-RTZ) -> -0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2", 0xffffffff80000001,
+ 0xffffffff3f000000, 0x20, fa0, fa1, fa2);
+ /* FLT_TRUE_MIN * 0.5 (DYN-RDN) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2", 0xffffffff00000001,
+ 0xffffffff3f000000, 0x40, fa0, fa1, fa2);
+ /* -FLT_TRUE_MIN * 0.5 (DYN-RDN) -> -FLT_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2", 0xffffffff80000001,
+ 0xffffffff3f000000, 0x40, fa0, fa1, fa2);
+ /* FLT_TRUE_MIN * 0.5 (DYN-RUP) -> FLT_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2", 0xffffffff00000001,
+ 0xffffffff3f000000, 0x60, fa0, fa1, fa2);
+ /* -FLT_TRUE_MIN * 0.5 (DYN-RUP) -> -0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2", 0xffffffff80000001,
+ 0xffffffff3f000000, 0x60, fa0, fa1, fa2);
+ /* FLT_TRUE_MIN * 0.5 (DYN-RMM) -> FLT_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2", 0xffffffff00000001,
+ 0xffffffff3f000000, 0x80, fa0, fa1, fa2);
+ /* -FLT_TRUE_MIN * 0.5 (DYN-RMM) -> -FLT_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.s fa0, fa1, fa2", 0xffffffff80000001,
+ 0xffffffff3f000000, 0x80, fa0, fa1, fa2);
+
+ /* --------------- fdiv.s rd, rs1, rs2, rm --------------- */
+ /* 2.0 / 1.0 -> 2.0 */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2", 0xffffffff40000000,
+ 0xffffffff3f800000, 0x00, fa0, fa1, fa2);
+ /* 0.0 / 1.0 -> 0.0 */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2", 0xffffffff00000000,
+ 0xffffffff3f800000, 0x00, fa0, fa1, fa2);
+ /* 1.0 / 2**127 -> 1**-127 (no UF because exact) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2", 0xffffffff3f800000,
+ 0xffffffff7f000000, 0x00, fa0, fa1, fa2);
+ /* FLT_MAX / 0.5 -> INFINITY (OF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2", 0xffffffff7f7fffff,
+ 0xffffffff3f000000, 0x00, fa0, fa1, fa2);
+ /* FLT_MAX / -0.5 -> -INFINITY (OF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2", 0xffffffff7f7fffff,
+ 0xffffffffbf000000, 0x00, fa0, fa1, fa2);
+ /* 1.0 / INFINITY -> 0.0 */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2", 0xffffffff3f800000,
+ 0xffffffff7f800000, 0x00, fa0, fa1, fa2);
+ /* 1.0 / 0.0 -> INFINITY (DZ) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2", 0xffffffff3f800000,
+ 0xffffffff00000000, 0x00, fa0, fa1, fa2);
+ /* 0.0 / 0.0 -> qNAN (NV) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2", 0xffffffff00000000,
+ 0xffffffff00000000, 0x00, fa0, fa1, fa2);
+
+ /* FLT_TRUE_MIN / 2.0 (RNE) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2, rne", 0xffffffff00000001,
+ 0xffffffff40000000, 0x00, fa0, fa1, fa2);
+ /* 3*FLT_TRUE_MIN / 2.0 (RNE) -> 2*FLT_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2, rne", 0xffffffff00000003,
+ 0xffffffff40000000, 0x00, fa0, fa1, fa2);
+ /* FLT_TRUE_MIN / 2.0 (RTZ) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2, rtz", 0xffffffff00000001,
+ 0xffffffff40000000, 0x00, fa0, fa1, fa2);
+ /* -FLT_TRUE_MIN / 2.0 (RTZ) -> -0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2, rtz", 0xffffffff80000001,
+ 0xffffffff40000000, 0x00, fa0, fa1, fa2);
+ /* FLT_TRUE_MIN / 2.0 (RDN) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2, rdn", 0xffffffff00000001,
+ 0xffffffff40000000, 0x00, fa0, fa1, fa2);
+ /* -FLT_TRUE_MIN / 2.0 (RDN) -> -FLT_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2, rdn", 0xffffffff80000001,
+ 0xffffffff40000000, 0x00, fa0, fa1, fa2);
+ /* FLT_TRUE_MIN / 2.0 (RUP) -> FLT_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2, rup", 0xffffffff00000001,
+ 0xffffffff40000000, 0x00, fa0, fa1, fa2);
+ /* -FLT_TRUE_MIN / 2.0 (RUP) -> -0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2, rup", 0xffffffff80000001,
+ 0xffffffff40000000, 0x00, fa0, fa1, fa2);
+ /* FLT_TRUE_MIN / 2.0 (RMM) -> FLT_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2, rmm", 0xffffffff00000001,
+ 0xffffffff40000000, 0x00, fa0, fa1, fa2);
+ /* -FLT_TRUE_MIN / 2.0 (RMM) -> -FLT_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2, rmm", 0xffffffff80000001,
+ 0xffffffff40000000, 0x00, fa0, fa1, fa2);
+
+ /* FLT_TRUE_MIN / 2.0 (DYN-RNE) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2", 0xffffffff00000001,
+ 0xffffffff40000000, 0x00, fa0, fa1, fa2);
+ /* 3*FLT_TRUE_MIN / 2.0 (DYN-RNE) -> 2*FLT_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2", 0xffffffff00000003,
+ 0xffffffff40000000, 0x00, fa0, fa1, fa2);
+ /* FLT_TRUE_MIN / 2.0 (DYN-RTZ) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2", 0xffffffff00000001,
+ 0xffffffff40000000, 0x20, fa0, fa1, fa2);
+ /* -FLT_TRUE_MIN / 2.0 (DYN-RTZ) -> -0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2", 0xffffffff80000001,
+ 0xffffffff40000000, 0x20, fa0, fa1, fa2);
+ /* FLT_TRUE_MIN / 2.0 (DYN-RDN) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2", 0xffffffff00000001,
+ 0xffffffff40000000, 0x40, fa0, fa1, fa2);
+ /* -FLT_TRUE_MIN / 2.0 (DYN-RDN) -> -FLT_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2", 0xffffffff80000001,
+ 0xffffffff40000000, 0x40, fa0, fa1, fa2);
+ /* FLT_TRUE_MIN / 2.0 (DYN-RUP) -> FLT_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2", 0xffffffff00000001,
+ 0xffffffff40000000, 0x60, fa0, fa1, fa2);
+ /* -FLT_TRUE_MIN / 2.0 (DYN-RUP) -> -0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2", 0xffffffff80000001,
+ 0xffffffff40000000, 0x60, fa0, fa1, fa2);
+ /* FLT_TRUE_MIN / 2.0 (DYN-RMM) -> FLT_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2", 0xffffffff00000001,
+ 0xffffffff40000000, 0x80, fa0, fa1, fa2);
+ /* -FLT_TRUE_MIN / 2.0 (DYN-RMM) -> -FLT_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.s fa0, fa1, fa2", 0xffffffff80000001,
+ 0xffffffff40000000, 0x80, fa0, fa1, fa2);
+
+ /* ----------------- fsqrt.s rd, rs1, rm ----------------- */
+ /* sqrt(0.0) -> 0.0 */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1", 0xffffffff00000000, 0x00, fa0, fa1);
+ /* sqrt(INFINITY) -> INFINITY */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1", 0xffffffff7f800000, 0x00, fa0, fa1);
+ /* sqrt(2*FLT_TRUE_MIN) -> 2**-74 */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1", 0xffffffff00000002, 0x00, fa0, fa1);
+ /* sqrt(qNAN) -> qNAN */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1", 0xffffffff7fc00000, 0x00, fa0, fa1);
+ /* sqrt(-1.0) -> qNAN (NV) */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1", 0xffffffffbf800000, 0x00, fa0, fa1);
+
+ /* sqrt(nextafterf(1.0)) (RNE) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1, rne", 0xffffffff3f800001, 0x00, fa0,
+ fa1);
+ /* sqrt(2nextafterf(1.0)) (RNE) -> nextafterf(1.0) (NX) */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1, rne", 0xffffffff3f800002, 0x00, fa0,
+ fa1);
+ /* sqrt(nextafterf(1.0)) (RTZ) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1, rtz", 0xffffffff3f800001, 0x00, fa0,
+ fa1);
+ /* sqrt(2nextafterf(1.0)) (RTZ) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1, rtz", 0xffffffff3f800002, 0x00, fa0,
+ fa1);
+ /* sqrt(nextafterf(1.0)) (RDN) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1, rdn", 0xffffffff3f800001, 0x00, fa0,
+ fa1);
+ /* sqrt(2nextafterf(1.0)) (RDN) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1, rdn", 0xffffffff3f800002, 0x00, fa0,
+ fa1);
+ /* sqrt(nextafterf(1.0)) (RUP) -> nextafterf(1.0) (NX) */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1, rup", 0xffffffff3f800001, 0x00, fa0,
+ fa1);
+ /* sqrt(2nextafterf(1.0)) (RUP) -> nextafterf(1.0) (NX) */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1, rup", 0xffffffff3f800002, 0x00, fa0,
+ fa1);
+ /* sqrt(nextafterf(1.0)) (RMM) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1, rmm", 0xffffffff3f800001, 0x00, fa0,
+ fa1);
+ /* sqrt(2nextafterf(1.0)) (RMM) -> nextafterf(1.0) (NX) */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1, rmm", 0xffffffff3f800002, 0x00, fa0,
+ fa1);
+
+ /* sqrt(nextafterf(1.0)) (DYN-RNE) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1", 0xffffffff3f800001, 0x00, fa0, fa1);
+ /* sqrt(2nextafterf(1.0)) (DYN-RNE) -> nextafterf(1.0) (NX) */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1", 0xffffffff3f800002, 0x00, fa0, fa1);
+ /* sqrt(nextafterf(1.0)) (DYN-RTZ) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1", 0xffffffff3f800001, 0x20, fa0, fa1);
+ /* sqrt(2nextafterf(1.0)) (DYN-RTZ) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1", 0xffffffff3f800002, 0x20, fa0, fa1);
+ /* sqrt(nextafterf(1.0)) (DYN-RDN) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1", 0xffffffff3f800001, 0x40, fa0, fa1);
+ /* sqrt(2nextafterf(1.0)) (DYN-RDN) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1", 0xffffffff3f800002, 0x40, fa0, fa1);
+ /* sqrt(nextafterf(1.0)) (DYN-RUP) -> nextafterf(1.0) (NX) */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1", 0xffffffff3f800001, 0x60, fa0, fa1);
+ /* sqrt(2nextafterf(1.0)) (DYN-RUP) -> nextafterf(1.0) (NX) */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1", 0xffffffff3f800002, 0x60, fa0, fa1);
+ /* sqrt(nextafterf(1.0)) (DYN-RMM) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1", 0xffffffff3f800001, 0x80, fa0, fa1);
+ /* sqrt(2nextafterf(1.0)) (DYN-RMM) -> nextafterf(1.0) (NX) */
+ TESTINST_1_1_F(4, "fsqrt.s fa0, fa1", 0xffffffff3f800002, 0x80, fa0, fa1);
+
+ /* ---------------- fsgnj.s rd, rs1, rs2 ----------------- */
+ /* fmv.s rd, rs1 */
+ TESTINST_1_2_F(4, "fsgnj.s fa0, fa1, fa1", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0x00, fa0, fa1, fa1);
+ TESTINST_1_2_F(4, "fsgnj.s fa0, fa1, fa1", 0xffffffffbf800000,
+ 0xffffffffbf800000, 0x00, fa0, fa1, fa1);
+
+ /* fsgnj(1.0, +) -> 1.0 */
+ TESTINST_1_2_F(4, "fsgnj.s fa0, fa1, fa2", 0xffffffff3f800000,
+ 0xffffffff7fffffff, 0x00, fa0, fa1, fa2);
+ /* fsgnj(1.0, -) -> -1.0 */
+ TESTINST_1_2_F(4, "fsgnj.s fa0, fa1, fa2", 0xffffffff3f800000,
+ 0xffffffff80000000, 0x00, fa0, fa1, fa2);
+ /* fsgnj(-1.0, +) -> 1.0 */
+ TESTINST_1_2_F(4, "fsgnj.s fa0, fa1, fa2", 0xffffffffbf800000,
+ 0xffffffff7fffffff, 0x00, fa0, fa1, fa2);
+ /* fsgnj(-1.0, -) -> -1.0 */
+ TESTINST_1_2_F(4, "fsgnj.s fa0, fa1, fa2", 0xffffffffbf800000,
+ 0xffffffff80000000, 0x00, fa0, fa1, fa2);
+
+ /* ---------------- fsgnjn.s rd, rs1, rs2 ---------------- */
+ /* fneg.s rd, rs1 */
+ TESTINST_1_2_F(4, "fsgnjn.s fa0, fa1, fa1", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0x00, fa0, fa1, fa1);
+ TESTINST_1_2_F(4, "fsgnjn.s fa0, fa1, fa1", 0xffffffffbf800000,
+ 0xffffffffbf800000, 0x00, fa0, fa1, fa1);
+
+ /* fsgnjn(1.0, +) -> -1.0 */
+ TESTINST_1_2_F(4, "fsgnjn.s fa0, fa1, fa2", 0xffffffff3f800000,
+ 0xffffffff7fffffff, 0x00, fa0, fa1, fa2);
+ /* fsgnjn(1.0, -) -> 1.0 */
+ TESTINST_1_2_F(4, "fsgnjn.s fa0, fa1, fa2", 0xffffffff3f800000,
+ 0xffffffff80000000, 0x00, fa0, fa1, fa2);
+ /* fsgnjn(-1.0, +) -> -1.0 */
+ TESTINST_1_2_F(4, "fsgnjn.s fa0, fa1, fa2", 0xffffffffbf800000,
+ 0xffffffff7fffffff, 0x00, fa0, fa1, fa2);
+ /* fsgnjn(-1.0, -) -> 1.0 */
+ TESTINST_1_2_F(4, "fsgnjn.s fa0, fa1, fa2", 0xffffffffbf800000,
+ 0xffffffff80000000, 0x00, fa0, fa1, fa2);
+
+ /* ---------------- fsgnjx.s rd, rs1, rs2 ---------------- */
+ /* fabs.s rd, rs1 */
+ TESTINST_1_2_F(4, "fsgnjx.s fa0, fa1, fa1", 0xffffffff3f800000,
+ 0xffffffff3f800000, 0x00, fa0, fa1, fa1);
+ TESTINST_1_2_F(4, "fsgnjx.s fa0, fa1, fa1", 0xffffffffbf800000,
+ 0xffffffffbf800000, 0x00, fa0, fa1, fa1);
+
+ /* fsgnjx(1.0, +) -> 1.0 */
+ TESTINST_1_2_F(4, "fsgnjx.s fa0, fa1, fa2", 0xffffffff3f800000,
+ 0xffffffff7fffffff, 0x00, fa0, fa1, fa2);
+ /* fsgnjx(1.0, -) -> -1.0 */
+ TESTINST_1_2_F(4, "fsgnjx.s fa0, fa1, fa2", 0xffffffff3f800000,
+ 0xffffffff80000000, 0x00, fa0, fa1, fa2);
+ /* fsgnjx(-1.0, +) -> -1.0 */
+ TESTINST_1_2_F(4, "fsgnjx.s fa0, fa1, fa2", 0xffffffffbf800000,
+ 0xffffffff7fffffff, 0x00, fa0, fa1, fa2);
+ /* fsgnjx(-1.0, -) -> 1.0 */
+ TESTINST_1_2_F(4, "fsgnjx.s fa0, fa1, fa2", 0xffffffffbf800000,
+ 0xffffffff80000000, 0x00, fa0, fa1, fa2);
+
+ /* ----------------- fmin.s rd, rs1, rs2 ----------------- */
+ /* min(0.0, 1.0) -> 0.0 */
+ TESTINST_1_2_F(4, "fmin.s fa0, fa1, fa2", 0xffffffff00000000,
+ 0xffffffff3f800000, 0x00, fa0, fa1, fa2);
+ /* min(0.0, -0.0) -> -0.0 */
+ TESTINST_1_2_F(4, "fmin.s fa0, fa1, fa2", 0xffffffff00000000,
+ 0xffffffff80000000, 0x00, fa0, fa1, fa2);
+ /* min(-0.0, 0.0) -> -0.0 */
+ TESTINST_1_2_F(4, "fmin.s fa0, fa1, fa2", 0xffffffff80000000,
+ 0xffffffff00000000, 0x00, fa0, fa1, fa2);
+ /* min(INFINITY, INFINITY) -> INFINITY */
+ TESTINST_1_2_F(4, "fmin.s fa0, fa1, fa2", 0xffffffff7f800000,
+ 0xffffffff7f800000, 0x00, fa0, fa1, fa2);
+ /* min(0.0, qNAN) -> 0.0 */
+ TESTINST_1_2_F(4, "fmin.s fa0, fa1, fa2", 0xffffffff00000000,
+ 0xffffffff7fc00000, 0x00, fa0, fa1, fa2);
+ /* min(0.0, sNAN) -> 0.0 (NV) */
+ TESTINST_1_2_F(4, "fmin.s fa0, fa1, fa2", 0xffffffff00000000,
+ 0xffffffff7fa00000, 0x00, fa0, fa1, fa2);
+
+ /* ----------------- fmax.s rd, rs1, rs2 ----------------- */
+ /* max(0.0, 1.0) -> 1.0 */
+ TESTINST_1_2_F(4, "fmax.s fa0, fa1, fa2", 0xffffffff00000000,
+ 0xffffffff3f800000, 0x00, fa0, fa1, fa2);
+ /* max(0.0, -0.0) -> 0.0 */
+ TESTINST_1_2_F(4, "fmax.s fa0, fa1, fa2", 0xffffffff00000000,
+ 0xffffffff80000000, 0x00, fa0, fa1, fa2);
+ /* max(-0.0, 0.0) -> 0.0 */
+ TESTINST_1_2_F(4, "fmax.s fa0, fa1, fa2", 0xffffffff80000000,
+ 0xffffffff00000000, 0x00, fa0, fa1, fa2);
+ /* max(INFINITY, INFINITY) -> INFINITY */
+ TESTINST_1_2_F(4, "fmax.s fa0, fa1, fa2", 0xffffffff7f800000,
+ 0xffffffff7f800000, 0x00, fa0, fa1, fa2);
+ /* max(0.0, qNAN) -> 0.0 */
+ TESTINST_1_2_F(4, "fmax.s fa0, fa1, fa2", 0xffffffff00000000,
+ 0xffffffff7fc00000, 0x00, fa0, fa1, fa2);
+ /* max(0.0, sNAN) -> 0.0 (NV) */
+ TESTINST_1_2_F(4, "fmax.s fa0, fa1, fa2", 0xffffffff00000000,
+ 0xffffffff7fa00000, 0x00, fa0, fa1, fa2);
+
+ /* ---------------- fcvt.w.s rd, rs1, rm ----------------- */
+ /* 0.0 -> 0 */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0", 0xffffffff00000000, 0x00, a0, fa0);
+ /* FLT_TRUE_MIN -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0", 0xffffffff00000001, 0x00, a0, fa0);
+ /* INFINITY -> 2**31-1 aka INT_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0", 0xffffffff7f800000, 0x00, a0, fa0);
+ /* qNAN -> 2**31-1 aka INT_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0", 0xffffffff7fc00000, 0x00, a0, fa0);
+ /* nextafterf(2**31, 0.0) -> 2**31-128 */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0", 0xffffffff4effffff, 0x00, a0, fa0);
+ /* -2**31 -> -2**31 aka INT_MIN */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0", 0xffffffffcf000000, 0x00, a0, fa0);
+ /* 2**31 -> 2**31-1 aka INT_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0", 0xffffffff4f000000, 0x00, a0, fa0);
+ /* -nextafterf(2**31) -> -2**31 aka INT_MIN (NV) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0", 0xffffffffcf000001, 0x00, a0, fa0);
+
+ /* 1.0 (rd=zero) -> 0 */
+ TESTINST_1_1_IF(4, "fcvt.w.s zero, fa0", 0xffffffff3f800000, 0x00, zero,
+ fa0);
+
+ /* 0.5 (RNE) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0, rne", 0xffffffff3f000000, 0x00, a0,
+ fa0);
+ /* 1.5 (RNE) -> 2 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0, rne", 0xffffffff3fc00000, 0x00, a0,
+ fa0);
+ /* 0.5 (RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0, rtz", 0xffffffff3f000000, 0x00, a0,
+ fa0);
+ /* -0.5 (RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0, rtz", 0xffffffffbf000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RDN) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0, rdn", 0xffffffff3f000000, 0x00, a0,
+ fa0);
+ /* -0.5 (RDN) -> -1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0, rdn", 0xffffffffbf000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RUP) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0, rup", 0xffffffff3f000000, 0x00, a0,
+ fa0);
+ /* -0.5 (RUP) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0, rup", 0xffffffffbf000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RMM) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0, rmm", 0xffffffff3f000000, 0x00, a0,
+ fa0);
+ /* -0.5 (RMM) -> -1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0, rmm", 0xffffffffbf000000, 0x00, a0,
+ fa0);
+
+ /* 0.5 (DYN-RNE) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0", 0xffffffff3f000000, 0x00, a0, fa0);
+ /* 1.5 (DYN-RNE) -> 2 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0", 0xffffffff3fc00000, 0x00, a0, fa0);
+ /* 0.5 (DYN-RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0", 0xffffffff3f000000, 0x20, a0, fa0);
+ /* -0.5 (DYN-RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0", 0xffffffffbf000000, 0x20, a0, fa0);
+ /* 0.5 (DYN-RDN) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0", 0xffffffff3f000000, 0x40, a0, fa0);
+ /* -0.5 (DYN-RDN) -> -1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0", 0xffffffffbf000000, 0x40, a0, fa0);
+ /* 0.5 (DYN-RUP) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0", 0xffffffff3f000000, 0x60, a0, fa0);
+ /* -0.5 (DYN-RUP) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0", 0xffffffffbf000000, 0x60, a0, fa0);
+ /* 0.5 (DYN-RMM) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0", 0xffffffff3f000000, 0x80, a0, fa0);
+ /* -0.5 (DYN-RMM) -> -1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.s a0, fa0", 0xffffffffbf000000, 0x80, a0, fa0);
+
+ /* ---------------- fcvt.wu.s rd, rs1, rm ---------------- */
+ /* 0.0 -> 0 */
+ TESTINST_1_1_IF(4, "fcvt.wu.s a0, fa0", 0xffffffff00000000, 0x00, a0, fa0);
+ /* FLT_TRUE_MIN -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.s a0, fa0", 0xffffffff00000001, 0x00, a0, fa0);
+ /* INFINITY -> 2**32-1 aka UINT_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.wu.s a0, fa0", 0xffffffff7f800000, 0x00, a0, fa0);
+ /* qNAN -> 2**32-1 aka UINT_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.wu.s a0, fa0", 0xffffffff7fc00000, 0x00, a0, fa0);
+ /* nextafterf(2**32, 0.0) -> 2**32-256 */
+ TESTINST_1_1_IF(4, "fcvt.wu.s a0, fa0", 0xffffffff4f7fffff, 0x00, a0, fa0);
+ /* 2**32 -> 2**32-1 aka UINT_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.wu.s a0, fa0", 0xffffffff4f800000, 0x00, a0, fa0);
+ /* -1.0 -> 0 (NV) */
+ TESTINST_1_1_IF(4, "fcvt.wu.s a0, fa0", 0xffffffffbf800000, 0x00, a0, fa0);
+
+ /* 1.0 (rd=zero) -> 0 */
+ TESTINST_1_1_IF(4, "fcvt.wu.s zero, fa0", 0xffffffff3f800000, 0x00, zero,
+ fa0);
+
+ /* 0.5 (RNE) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.s a0, fa0, rne", 0xffffffff3f000000, 0x00, a0,
+ fa0);
+ /* 1.5 (RNE) -> 2 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.s a0, fa0, rne", 0xffffffff3fc00000, 0x00, a0,
+ fa0);
+ /* 0.5 (RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.s a0, fa0, rtz", 0xffffffff3f000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RDN) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.s a0, fa0, rdn", 0xffffffff3f000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RUP) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.s a0, fa0, rup", 0xffffffff3f000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RMM) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.s a0, fa0, rmm", 0xffffffff3f000000, 0x00, a0,
+ fa0);
+
+ /* 0.5 (DYN-RNE) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.s a0, fa0", 0xffffffff3f000000, 0x00, a0, fa0);
+ /* 1.5 (DYN-RNE) -> 2 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.s a0, fa0", 0xffffffff3fc00000, 0x00, a0, fa0);
+ /* 0.5 (DYN-RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.s a0, fa0", 0xffffffff3f000000, 0x20, a0, fa0);
+ /* 0.5 (DYN-RDN) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.s a0, fa0", 0xffffffff3f000000, 0x40, a0, fa0);
+ /* 0.5 (DYN-RUP) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.s a0, fa0", 0xffffffff3f000000, 0x60, a0, fa0);
+ /* 0.5 (DYN-RMM) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.s a0, fa0", 0xffffffff3f000000, 0x80, a0, fa0);
+
+ /* ------------------- fmv.x.w rd, rs1 ------------------- */
+ TESTINST_1_1_IF(4, "fmv.x.w a0, fa0", 0xabcdef0123456789, 0x00, a0, fa0);
+
+ /* "0xffffffff7fffffff" -> "0x000000007fffffff" */
+ TESTINST_1_1_IF(4, "fmv.x.w a0, fa0", 0xffffffff7fffffff, 0x00, a0, fa0);
+ /* "0x0000000080000000" -> "0xffffffff80000000" */
+ TESTINST_1_1_IF(4, "fmv.x.w a0, fa0", 0x0000000080000000, 0x00, a0, fa0);
+
+ /* 1.0 (rd=zero) -> 0 */
+ TESTINST_1_1_IF(4, "fmv.x.w zero, fa0", 0xffffffff3f800000, 0x00, zero, fa0);
+
+ /* ----------------- feq.s rd, rs1, rs2 ------------------ */
+ /* 0.0 == 1.0 -> 0 */
+ TESTINST_1_2_FCMP(4, "feq.s a0, fa0, fa1", 0xffffffff00000000,
+ 0xffffffff3f800000, 0x00, a0, fa0, fa1);
+ /* 0.0 == 0.0 -> 1 */
+ TESTINST_1_2_FCMP(4, "feq.s a0, fa0, fa1", 0xffffffff00000000,
+ 0xffffffff00000000, 0x00, a0, fa0, fa1);
+ /* 0.0 == -0.0 -> 1 */
+ TESTINST_1_2_FCMP(4, "feq.s a0, fa0, fa1", 0xffffffff00000000,
+ 0xffffffff80000000, 0x00, a0, fa0, fa1);
+ /* -0.0 == 0.0 -> 1 */
+ TESTINST_1_2_FCMP(4, "feq.s a0, fa0, fa1", 0xffffffff80000000,
+ 0xffffffff00000000, 0x00, a0, fa0, fa1);
+ /* INFINITY == INFINITY -> 1 */
+ TESTINST_1_2_FCMP(4, "feq.s a0, fa0, fa1", 0xffffffff7f800000,
+ 0xffffffff7f800000, 0x00, a0, fa0, fa1);
+ /* 0.0 == qNAN -> 0 */
+ TESTINST_1_2_FCMP(4, "feq.s a0, fa0, fa1", 0xffffffff00000000,
+ 0xffffffff7fc00000, 0x00, a0, fa0, fa1);
+ /* 0.0 == sNAN -> 0 (NV) */
+ TESTINST_1_2_FCMP(4, "feq.s a0, fa0, fa1", 0xffffffff00000000,
+ 0xffffffff7fa00000, 0x00, a0, fa0, fa1);
+
+ /* sNAN == sNAN (rd=zero) -> 0 (NV) */
+ TESTINST_1_2_FCMP(4, "feq.s zero, fa0, fa1", 0xffffffff7fa00000,
+ 0xffffffff7fa00000, 0x00, zero, fa0, fa1);
+
+ /* ----------------- flt.s rd, rs1, rs2 ------------------ */
+ /* 0.0 < 0.0 -> 0 */
+ TESTINST_1_2_FCMP(4, "flt.s a0, fa0, fa1", 0xffffffff00000000,
+ 0xffffffff00000000, 0x00, a0, fa0, fa1);
+ /* 0.0 < 1.0 -> 1 */
+ TESTINST_1_2_FCMP(4, "flt.s a0, fa0, fa1", 0xffffffff00000000,
+ 0xffffffff3f800000, 0x00, a0, fa0, fa1);
+ /* 0.0 < -0.0 -> 0 */
+ TESTINST_1_2_FCMP(4, "flt.s a0, fa0, fa1", 0xffffffff00000000,
+ 0xffffffff80000000, 0x00, a0, fa0, fa1);
+ /* -0.0 < 0.0 -> 0 */
+ TESTINST_1_2_FCMP(4, "flt.s a0, fa0, fa1", 0xffffffff80000000,
+ 0xffffffff00000000, 0x00, a0, fa0, fa1);
+ /* INFINITY < INFINITY -> 0 */
+ TESTINST_1_2_FCMP(4, "flt.s a0, fa0, fa1", 0xffffffff7f800000,
+ 0xffffffff7f800000, 0x00, a0, fa0, fa1);
+ /* 0.0 < qNAN -> 0 (NV) */
+ TESTINST_1_2_FCMP(4, "flt.s a0, fa0, fa1", 0xffffffff00000000,
+ 0xffffffff7fc00000, 0x00, a0, fa0, fa1);
+ /* 0.0 < sNAN -> 0 (NV) */
+ TESTINST_1_2_FCMP(4, "flt.s a0, fa0, fa1", 0xffffffff00000000,
+ 0xffffffff7fa00000, 0x00, a0, fa0, fa1);
+
+ /* sNAN < sNAN (rd=zero) -> 0 (NV) */
+ TESTINST_1_2_FCMP(4, "flt.s zero, fa0, fa1", 0xffffffff7fa00000,
+ 0xffffffff7fa00000, 0x00, zero, fa0, fa1);
+
+ /* ----------------- fle.s rd, rs1, rs2 ------------------ */
+ /* 1.0 < 0.0 -> 0 */
+ TESTINST_1_2_FCMP(4, "fle.s a0, fa0, fa1", 0xffffffff3f800000,
+ 0xffffffff00000000, 0x00, a0, fa0, fa1);
+ /* 0.0 <= 0.0 -> 1 */
+ TESTINST_1_2_FCMP(4, "fle.s a0, fa0, fa1", 0xffffffff00000000,
+ 0xffffffff00000000, 0x00, a0, fa0, fa1);
+ /* 0.0 <= 1.0 -> 1 */
+ TESTINST_1_2_FCMP(4, "fle.s a0, fa0, fa1", 0xffffffff00000000,
+ 0xffffffff3f800000, 0x00, a0, fa0, fa1);
+ /* 0.0 <= -0.0 -> 1 */
+ TESTINST_1_2_FCMP(4, "fle.s a0, fa0, fa1", 0xffffffff00000000,
+ 0xffffffff80000000, 0x00, a0, fa0, fa1);
+ /* -0.0 <= 0.0 -> 1 */
+ TESTINST_1_2_FCMP(4, "fle.s a0, fa0, fa1", 0xffffffff80000000,
+ 0xffffffff00000000, 0x00, a0, fa0, fa1);
+ /* INFINITY <= INFINITY -> 1 */
+ TESTINST_1_2_FCMP(4, "fle.s a0, fa0, fa1", 0xffffffff7f800000,
+ 0xffffffff7f800000, 0x00, a0, fa0, fa1);
+ /* 0.0 <= qNAN -> 0 (NV) */
+ TESTINST_1_2_FCMP(4, "fle.s a0, fa0, fa1", 0xffffffff00000000,
+ 0xffffffff7fc00000, 0x00, a0, fa0, fa1);
+ /* 0.0 <= sNAN -> 0 (NV) */
+ TESTINST_1_2_FCMP(4, "fle.s a0, fa0, fa1", 0xffffffff7fa00000,
+ 0x7ff4000000000000, 0x00, a0, fa0, fa1);
+
+ /* sNAN <= sNAN (rd=zero) -> 0 (NV) */
+ TESTINST_1_2_FCMP(4, "fle.s zero, fa0, fa1", 0xffffffff7fa00000,
+ 0xffffffff7fa00000, 0x00, zero, fa0, fa1);
+
+ /* ------------------ fclass.s rd, rs1 ------------------- */
+ /* fclass(-INFINITY) -> 0x001 */
+ TESTINST_1_1_IF(4, "fclass.s a0, fa0", 0xffffffffff800000, 0x00, a0, fa0);
+ /* fclass(-1.0) -> 0x002 */
+ TESTINST_1_1_IF(4, "fclass.s a0, fa0", 0xffffffffbf800000, 0x00, a0, fa0);
+ /* fclass(-FLT_TRUE_MIN) -> 0x004 */
+ TESTINST_1_1_IF(4, "fclass.s a0, fa0", 0xffffffff80000001, 0x00, a0, fa0);
+ /* fclass(-0.0) -> 0x008 */
+ TESTINST_1_1_IF(4, "fclass.s a0, fa0", 0xffffffff80000000, 0x00, a0, fa0);
+ /* fclass(0.0) -> 0x010 */
+ TESTINST_1_1_IF(4, "fclass.s a0, fa0", 0xffffffff00000000, 0x00, a0, fa0);
+ /* fclass(FLT_TRUE_MIN) -> 0x020 */
+ TESTINST_1_1_IF(4, "fclass.s a0, fa0", 0xffffffff00000001, 0x00, a0, fa0);
+ /* fclass(1.0) -> 0x040 */
+ TESTINST_1_1_IF(4, "fclass.s a0, fa0", 0xffffffff3f800000, 0x00, a0, fa0);
+ /* fclass(INFINITY) -> 0x080 */
+ TESTINST_1_1_IF(4, "fclass.s a0, fa0", 0xffffffff7f800000, 0x00, a0, fa0);
+ /* fclass(sNAN) -> 0x100 */
+ TESTINST_1_1_IF(4, "fclass.s a0, fa0", 0xffffffff7fa00000, 0x00, a0, fa0);
+ /* fclass(qNAN) -> 0x200 */
+ TESTINST_1_1_IF(4, "fclass.s a0, fa0", 0xffffffff7fc00000, 0x00, a0, fa0);
+
+ /* fclass(-INFINITY) (rd=zero) -> 0x000 */
+ TESTINST_1_1_IF(4, "fclass.s zero, fa0", 0xffffffffff800000, 0x00, zero,
+ fa0);
+
+ /* ---------------- fcvt.s.w rd, rs1, rm ----------------- */
+ /* 0 -> 0.0 */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0", 0x0000000000000000, 0x00, fa0, a0);
+ /* 2**31-128 -> nextafterf(2**31, 0.0) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0", 0x000000007fffff80, 0x00, fa0, a0);
+ /* 2**31-1 aka INT_MAX -> 2**31 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0", 0x000000007fffffff, 0x00, fa0, a0);
+ /* -2**31 aka INT_MIN -> -2**31 */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0", 0x0000000080000000, 0x00, fa0, a0);
+
+ /* 2**24+1 (RNE) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0, rne", 0x0000000001000001, 0x00, fa0,
+ a0);
+ /* 2**24+3 (RNE) -> 2**24+4 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0, rne", 0x0000000001000003, 0x00, fa0,
+ a0);
+ /* 2**24+1 (RTZ) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0, rtz", 0x0000000001000001, 0x00, fa0,
+ a0);
+ /* -2**24-1 (RTZ) -> -2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0, rtz", 0xfffffffffeffffff, 0x00, fa0,
+ a0);
+ /* 2**24+1 (RDN) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0, rdn", 0x0000000001000001, 0x00, fa0,
+ a0);
+ /* -2**24-1 (RDN) -> -2**24-2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0, rdn", 0xfffffffffeffffff, 0x00, fa0,
+ a0);
+ /* 2**24+1 (RUP) -> 2**24+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0, rup", 0x0000000001000001, 0x00, fa0,
+ a0);
+ /* -2**24-1 (RUP) -> -2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0, rup", 0xfffffffffeffffff, 0x00, fa0,
+ a0);
+ /* 2**24+1 (RMM) -> 2**24+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0, rmm", 0x0000000001000001, 0x00, fa0,
+ a0);
+ /* -2**24-1 (RMM) -> -2**24-2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0, rmm", 0xfffffffffeffffff, 0x00, fa0,
+ a0);
+
+ /* 2**24+1 (DYN-RNE) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0", 0x0000000001000001, 0x00, fa0, a0);
+ /* 2**24+3 (DYN-RNE) -> 2**24+4 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0", 0x0000000001000003, 0x00, fa0, a0);
+ /* 2**24+1 (DYN-RTZ) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0", 0x0000000001000001, 0x20, fa0, a0);
+ /* -2**24-1 (DYN-RTZ) -> -2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0", 0xfffffffffeffffff, 0x20, fa0, a0);
+ /* 2**24+1 (DYN-RDN) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0", 0x0000000001000001, 0x40, fa0, a0);
+ /* -2**24-1 (DYN-RDN) -> -2**24-2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0", 0xfffffffffeffffff, 0x40, fa0, a0);
+ /* 2**24+1 (DYN-RUP) -> 2**24+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0", 0x0000000001000001, 0x60, fa0, a0);
+ /* -2**24-1 (DYN-RUP) -> -2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0", 0xfffffffffeffffff, 0x60, fa0, a0);
+ /* 2**24+1 (DYN-RMM) -> 2**24+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0", 0x0000000001000001, 0x80, fa0, a0);
+ /* -2**24-1 (DYN-RMM) -> -2**24-2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.w fa0, a0", 0xfffffffffeffffff, 0x80, fa0, a0);
+
+ /* ---------------- fcvt.s.wu rd, rs1, rm ---------------- */
+ /* 0 -> 0.0 */
+ TESTINST_1_1_FI(4, "fcvt.s.wu fa0, a0", 0x0000000000000000, 0x00, fa0, a0);
+ /* 2**32-256 -> nextafterf(2**32, 0.0) */
+ TESTINST_1_1_FI(4, "fcvt.s.wu fa0, a0", 0x00000000ffffff00, 0x00, fa0, a0);
+ /* 2**32-1 aka UINT_MAX -> 2**32 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.wu fa0, a0", 0x00000000ffffffff, 0x00, fa0, a0);
+
+ /* 2**24+1 (RNE) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.wu fa0, a0, rne", 0x0000000001000001, 0x00, fa0,
+ a0);
+ /* 2**24+3 (RNE) -> 2**24+4 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.wu fa0, a0, rne", 0x0000000001000003, 0x00, fa0,
+ a0);
+ /* 2**24+1 (RTZ) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.wu fa0, a0, rtz", 0x0000000001000001, 0x00, fa0,
+ a0);
+ /* 2**24+1 (RDN) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.wu fa0, a0, rdn", 0x0000000001000001, 0x00, fa0,
+ a0);
+ /* 2**24+1 (RUP) -> 2**24+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.wu fa0, a0, rup", 0x0000000001000001, 0x00, fa0,
+ a0);
+ /* 2**24+1 (RMM) -> 2**24+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.wu fa0, a0, rmm", 0x0000000001000001, 0x00, fa0,
+ a0);
+
+ /* 2**24+1 (DYN-RNE) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.wu fa0, a0", 0x0000000001000001, 0x00, fa0, a0);
+ /* 2**24+3 (DYN-RNE) -> 2**24+4 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.wu fa0, a0", 0x0000000001000003, 0x00, fa0, a0);
+ /* 2**24+1 (DYN-RTZ) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.wu fa0, a0", 0x0000000001000001, 0x20, fa0, a0);
+ /* 2**24+1 (DYN-RDN) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.wu fa0, a0", 0x0000000001000001, 0x40, fa0, a0);
+ /* 2**24+1 (DYN-RUP) -> 2**24+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.wu fa0, a0", 0x0000000001000001, 0x60, fa0, a0);
+ /* 2**24+1 (DYN-RMM) -> 2**24+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.wu fa0, a0", 0x0000000001000001, 0x80, fa0, a0);
+
+ /* ------------------- fmv.w.x rd, rs1 ------------------- */
+ TESTINST_1_1_FI(4, "fmv.w.x fa0, a0", 0xabcdef0123456789, 0x00, fa0, a0);
+
+ printf("\n");
+}
+
+static void test_float32_additions(void)
+{
+ printf("RV64F single-precision FP instruction set, additions\n");
+
+ /* ---------------- fcvt.l.s rd, rs1, rm ----------------- */
+ /* 0.0 -> 0 */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0", 0xffffffff00000000, 0x00, a0, fa0);
+ /* FLT_TRUE_MIN -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0", 0xffffffff00000001, 0x00, a0, fa0);
+ /* INFINITY -> 2**63-1 aka LONG_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0", 0xffffffff7f800000, 0x00, a0, fa0);
+ /* qNAN -> 2**63-1 aka LONG_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0", 0xffffffff7fc00000, 0x00, a0, fa0);
+ /* nextafterf(2**63, 0.0) -> 2**63-2**39 */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0", 0xffffffff5effffff, 0x00, a0, fa0);
+ /* -2**63 -> -2**63 aka LONG_MIN */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0", 0xffffffffdf000000, 0x00, a0, fa0);
+ /* 2**63 -> 2**63-1 aka LONG_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0", 0xffffffff5f000000, 0x00, a0, fa0);
+ /* -nextafterf(2**63) -> -2**63 aka LONG_MIN (NV) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0", 0xffffffffdf000001, 0x00, a0, fa0);
+
+ /* 1.0 (rd=zero) -> 0 */
+ TESTINST_1_1_IF(4, "fcvt.l.s zero, fa0", 0xffffffff3f800000, 0x00, zero,
+ fa0);
+
+ /* 0.5 (RNE) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0, rne", 0xffffffff3f000000, 0x00, a0,
+ fa0);
+ /* 1.5 (RNE) -> 2 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0, rne", 0xffffffff3fc00000, 0x00, a0,
+ fa0);
+ /* 0.5 (RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0, rtz", 0xffffffff3f000000, 0x00, a0,
+ fa0);
+ /* -0.5 (RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0, rtz", 0xffffffffbf000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RDN) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0, rdn", 0xffffffff3f000000, 0x00, a0,
+ fa0);
+ /* -0.5 (RDN) -> -1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0, rdn", 0xffffffffbf000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RUP) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0, rup", 0xffffffff3f000000, 0x00, a0,
+ fa0);
+ /* -0.5 (RUP) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0, rup", 0xffffffffbf000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RMM) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0, rmm", 0xffffffff3f000000, 0x00, a0,
+ fa0);
+ /* -0.5 (RMM) -> -1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0, rmm", 0xffffffffbf000000, 0x00, a0,
+ fa0);
+
+ /* 0.5 (DYN-RNE) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0", 0xffffffff3f000000, 0x00, a0, fa0);
+ /* 1.5 (DYN-RNE) -> 2 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0", 0xffffffff3fc00000, 0x00, a0, fa0);
+ /* 0.5 (DYN-RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0", 0xffffffff3f000000, 0x20, a0, fa0);
+ /* -0.5 (DYN-RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0", 0xffffffffbf000000, 0x20, a0, fa0);
+ /* 0.5 (DYN-RDN) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0", 0xffffffff3f000000, 0x40, a0, fa0);
+ /* -0.5 (DYN-RDN) -> -1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0", 0xffffffffbf000000, 0x40, a0, fa0);
+ /* 0.5 (DYN-RUP) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0", 0xffffffff3f000000, 0x60, a0, fa0);
+ /* -0.5 (DYN-RUP) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0", 0xffffffffbf000000, 0x60, a0, fa0);
+ /* 0.5 (DYN-RMM) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0", 0xffffffff3f000000, 0x80, a0, fa0);
+ /* -0.5 (DYN-RMM) -> -1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.s a0, fa0", 0xffffffffbf000000, 0x80, a0, fa0);
+
+ /* ---------------- fcvt.lu.s rd, rs1, rm ---------------- */
+ /* 0.0 -> 0 */
+ TESTINST_1_1_IF(4, "fcvt.lu.s a0, fa0", 0xffffffff00000000, 0x00, a0, fa0);
+ /* FLT_TRUE_MIN -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.s a0, fa0", 0xffffffff00000001, 0x00, a0, fa0);
+ /* INFINITY -> 2**64-1 aka ULONG_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.lu.s a0, fa0", 0xffffffff7f800000, 0x00, a0, fa0);
+ /* qNAN -> 2**64-1 aka ULONG_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.lu.s a0, fa0", 0xffffffff7fc00000, 0x00, a0, fa0);
+ /* nextafterf(2**64, 0.0) -> 2**64-2**40 */
+ TESTINST_1_1_IF(4, "fcvt.lu.s a0, fa0", 0xffffffff5f7fffff, 0x00, a0, fa0);
+ /* 2**64 -> 2**64-1 aka ULONG_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.lu.s a0, fa0", 0xffffffff5f800000, 0x00, a0, fa0);
+ /* -1.0 -> 0 (NV) */
+ TESTINST_1_1_IF(4, "fcvt.lu.s a0, fa0", 0xffffffffbf800000, 0x00, a0, fa0);
+
+ /* 1.0 (rd=zero) -> 0 */
+ TESTINST_1_1_IF(4, "fcvt.lu.s zero, fa0", 0xffffffff3f800000, 0x00, zero,
+ fa0);
+
+ /* 0.5 (RNE) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.s a0, fa0, rne", 0xffffffff3f000000, 0x00, a0,
+ fa0);
+ /* 1.5 (RNE) -> 2 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.s a0, fa0, rne", 0xffffffff3fc00000, 0x00, a0,
+ fa0);
+ /* 0.5 (RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.s a0, fa0, rtz", 0xffffffff3f000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RDN) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.s a0, fa0, rdn", 0xffffffff3f000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RUP) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.s a0, fa0, rup", 0xffffffff3f000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RMM) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.s a0, fa0, rmm", 0xffffffff3f000000, 0x00, a0,
+ fa0);
+
+ /* 0.5 (DYN-RNE) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.s a0, fa0", 0xffffffff3f000000, 0x00, a0, fa0);
+ /* 1.5 (DYN-RNE) -> 2 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.s a0, fa0", 0xffffffff3fc00000, 0x00, a0, fa0);
+ /* 0.5 (DYN-RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.s a0, fa0", 0xffffffff3f000000, 0x20, a0, fa0);
+ /* 0.5 (DYN-RDN) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.s a0, fa0", 0xffffffff3f000000, 0x40, a0, fa0);
+ /* 0.5 (DYN-RUP) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.s a0, fa0", 0xffffffff3f000000, 0x60, a0, fa0);
+ /* 0.5 (DYN-RMM) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.s a0, fa0", 0xffffffff3f000000, 0x80, a0, fa0);
+
+ /* ---------------- fcvt.s.l rd, rs1, rm ----------------- */
+ /* 0 -> 0.0 */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0", 0x0000000000000000, 0x00, fa0, a0);
+ /* 2**63-2**39 -> nextafterf(2**63, 0.0) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0", 0x7fffff8000000000, 0x00, fa0, a0);
+ /* 2**63-1 aka LONG_MAX -> 2**63 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0", 0x7fffffffffffffff, 0x00, fa0, a0);
+ /* -2**63 aka LONG_MIN -> -2**63 */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0", 0x8000000000000000, 0x00, fa0, a0);
+
+ /* 2**24+1 (RNE) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0, rne", 0x0000000001000001, 0x00, fa0,
+ a0);
+ /* 2**24+3 (RNE) -> 2**24+4 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0, rne", 0x0000000001000003, 0x00, fa0,
+ a0);
+ /* 2**24+1 (RTZ) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0, rtz", 0x0000000001000001, 0x00, fa0,
+ a0);
+ /* -2**24-1 (RTZ) -> -2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0, rtz", 0xfffffffffeffffff, 0x00, fa0,
+ a0);
+ /* 2**24+1 (RDN) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0, rdn", 0x0000000001000001, 0x00, fa0,
+ a0);
+ /* -2**24-1 (RDN) -> -2**24-2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0, rdn", 0xfffffffffeffffff, 0x00, fa0,
+ a0);
+ /* 2**24+1 (RUP) -> 2**24+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0, rup", 0x0000000001000001, 0x00, fa0,
+ a0);
+ /* -2**24-1 (RUP) -> -2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0, rup", 0xfffffffffeffffff, 0x00, fa0,
+ a0);
+ /* 2**24+1 (RMM) -> 2**24+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0, rmm", 0x0000000001000001, 0x00, fa0,
+ a0);
+ /* -2**24-1 (RMM) -> -2**24-2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0, rmm", 0xfffffffffeffffff, 0x00, fa0,
+ a0);
+
+ /* 2**24+1 (DYN-RNE) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0", 0x0000000001000001, 0x00, fa0, a0);
+ /* 2**24+3 (DYN-RNE) -> 2**24+4 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0", 0x0000000001000003, 0x00, fa0, a0);
+ /* 2**24+1 (DYN-RTZ) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0", 0x0000000001000001, 0x20, fa0, a0);
+ /* -2**24-1 (DYN-RTZ) -> -2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0", 0xfffffffffeffffff, 0x20, fa0, a0);
+ /* 2**24+1 (DYN-RDN) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0", 0x0000000001000001, 0x40, fa0, a0);
+ /* -2**24-1 (DYN-RDN) -> -2**24-2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0", 0xfffffffffeffffff, 0x40, fa0, a0);
+ /* 2**24+1 (DYN-RUP) -> 2**24+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0", 0x0000000001000001, 0x60, fa0, a0);
+ /* -2**24-1 (DYN-RUP) -> -2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0", 0xfffffffffeffffff, 0x60, fa0, a0);
+ /* 2**24+1 (DYN-RMM) -> 2**24+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0", 0x0000000001000001, 0x80, fa0, a0);
+ /* -2**24-1 (DYN-RMM) -> -2**24-2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.l fa0, a0", 0xfffffffffeffffff, 0x80, fa0, a0);
+
+ /* ---------------- fcvt.s.lu rd, rs1, rm ---------------- */
+ /* 0 -> 0.0 */
+ TESTINST_1_1_FI(4, "fcvt.s.lu fa0, a0", 0x0000000000000000, 0x00, fa0, a0);
+ /* 2**64-2**40 -> nextafterf(2**64, 0.0) */
+ TESTINST_1_1_FI(4, "fcvt.s.lu fa0, a0", 0xffffff0000000000, 0x00, fa0, a0);
+ /* 2**64-1 aka ULONG_MAX -> 2**64 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.lu fa0, a0", 0xffffffffffffffff, 0x00, fa0, a0);
+
+ /* 2**24+1 (RNE) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.lu fa0, a0, rne", 0x0000000001000001, 0x00, fa0,
+ a0);
+ /* 2**24+3 (RNE) -> 2**24+4 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.lu fa0, a0, rne", 0x0000000001000003, 0x00, fa0,
+ a0);
+ /* 2**24+1 (RTZ) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.lu fa0, a0, rtz", 0x0000000001000001, 0x00, fa0,
+ a0);
+ /* 2**24+1 (RDN) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.lu fa0, a0, rdn", 0x0000000001000001, 0x00, fa0,
+ a0);
+ /* 2**24+1 (RUP) -> 2**24+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.lu fa0, a0, rup", 0x0000000001000001, 0x00, fa0,
+ a0);
+ /* 2**24+1 (RMM) -> 2**24+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.lu fa0, a0, rmm", 0x0000000001000001, 0x00, fa0,
+ a0);
+
+ /* 2**24+1 (DYN-RNE) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.lu fa0, a0", 0x0000000001000001, 0x00, fa0, a0);
+ /* 2**24+3 (DYN-RNE) -> 2**24+4 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.lu fa0, a0", 0x0000000001000003, 0x00, fa0, a0);
+ /* 2**24+1 (DYN-RTZ) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.lu fa0, a0", 0x0000000001000001, 0x20, fa0, a0);
+ /* 2**24+1 (DYN-RDN) -> 2**24 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.lu fa0, a0", 0x0000000001000001, 0x40, fa0, a0);
+ /* 2**24+1 (DYN-RUP) -> 2**24+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.lu fa0, a0", 0x0000000001000001, 0x60, fa0, a0);
+ /* 2**24+1 (DYN-RMM) -> 2**24+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.s.lu fa0, a0", 0x0000000001000001, 0x80, fa0, a0);
+}
+
+int main(void)
+{
+ test_float32_shared();
+ test_float32_additions();
+ return 0;
+}
--- /dev/null
+RV64F single-precision FP instruction set, shared operations
+flw fa0, 0(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xffffffff41dc8da0
+ no memory changes
+flw fa0, 4(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xffffffff8aa9987b
+ no memory changes
+flw fa0, 8(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xffffffff355229e8
+ no memory changes
+flw fa0, 16(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xfffffffffeb20cc3
+ no memory changes
+flw fa0, 32(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xffffffffdb9b22c9
+ no memory changes
+flw fa0, 64(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xffffffff879ff2e1
+ no memory changes
+flw fa0, 128(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xffffffff593a2a60
+ no memory changes
+flw fa0, 256(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xffffffffec73d785
+ no memory changes
+flw fa0, 512(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xffffffff622d87cb
+ no memory changes
+flw fa0, 1024(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xffffffffad1b44c8
+ no memory changes
+flw fa0, 2040(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xfffffffff39743f9
+ no memory changes
+flw fa0, -4(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xffffffff70a54ae6
+ no memory changes
+flw fa0, -2048(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xffffffff2d7e670a
+ no memory changes
+flw fa4, 0(a5) ::
+ inputs: a5=&area_mid
+ output: fa4=0xffffffffe24b896b
+ no memory changes
+fsw fa0, 0(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+000] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+fsw fa0, 4(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+000] .. .. .. .. 89 67 45 23 .. .. .. .. .. .. .. ..
+fsw fa0, 8(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+000] .. .. .. .. .. .. .. .. 89 67 45 23 .. .. .. ..
+fsw fa0, 16(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+016] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+fsw fa0, 32(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+032] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+fsw fa0, 64(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+064] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+fsw fa0, 128(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+128] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+fsw fa0, 256(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+256] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+fsw fa0, 512(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+512] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+fsw fa0, 1024(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+1024] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+fsw fa0, 2040(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+2032] .. .. .. .. .. .. .. .. 89 67 45 23 .. .. .. ..
+fsw fa0, -4(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [-016] .. .. .. .. .. .. .. .. .. .. .. .. 89 67 45 23
+fsw fa0, -2048(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [-2048] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+fsw fa4, 0(a5) ::
+ inputs: fa4=0xabcdef0123456789, a5=&area_mid
+ [+000] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+fmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff40400000, fa2=0xffffffff40000000, fa3=0xffffffff3f800000, fcsr=0x00000000
+ output: fa0=0xffffffff40e00000, fcsr=0x00000000
+fmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffffbf800000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000000
+fmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff40000000, fa2=0xffffffff00000001, fa3=0xffffffff80000001, fcsr=0x00000000
+ output: fa0=0xffffffff00000001, fcsr=0x00000000
+fmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff40000000, fa2=0xffffffff7f7fffff, fa3=0xffffffffff7fffff, fcsr=0x00000000
+ output: fa0=0xffffffff7f7fffff, fcsr=0x00000000
+fmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff40000000, fa2=0xffffffff7f7fffff, fa3=0xffffffff00000000, fcsr=0x00000000
+ output: fa0=0xffffffff7f800000, fcsr=0x00000005
+fmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff40000000, fa2=0xffffffff7f800000, fa3=0xffffffffff800000, fcsr=0x00000000
+ output: fa0=0xffffffff7fc00000, fcsr=0x00000010
+fmadd.s fa0, fa1, fa2, fa3, rne ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fmadd.s fa0, fa1, fa2, fa3, rne ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800002, fcsr=0x00000001
+fmadd.s fa0, fa1, fa2, fa3, rtz ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fmadd.s fa0, fa1, fa2, fa3, rtz ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffffbf800000, fa3=0xffffffffb3800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000001
+fmadd.s fa0, fa1, fa2, fa3, rdn ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fmadd.s fa0, fa1, fa2, fa3, rdn ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffffbf800000, fa3=0xffffffffb3800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800001, fcsr=0x00000001
+fmadd.s fa0, fa1, fa2, fa3, rup ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800001, fcsr=0x00000001
+fmadd.s fa0, fa1, fa2, fa3, rup ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffffbf800000, fa3=0xffffffffb3800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000001
+fmadd.s fa0, fa1, fa2, fa3, rmm ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800001, fcsr=0x00000001
+fmadd.s fa0, fa1, fa2, fa3, rmm ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffffbf800000, fa3=0xffffffffb3800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800001, fcsr=0x00000001
+fmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800002, fcsr=0x00000001
+fmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000020
+ output: fa0=0xffffffff3f800000, fcsr=0x00000021
+fmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffffbf800000, fa3=0xffffffffb3800000, fcsr=0x00000020
+ output: fa0=0xffffffffbf800000, fcsr=0x00000021
+fmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000040
+ output: fa0=0xffffffff3f800000, fcsr=0x00000041
+fmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffffbf800000, fa3=0xffffffffb3800000, fcsr=0x00000040
+ output: fa0=0xffffffffbf800001, fcsr=0x00000041
+fmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000060
+ output: fa0=0xffffffff3f800001, fcsr=0x00000061
+fmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffffbf800000, fa3=0xffffffffb3800000, fcsr=0x00000060
+ output: fa0=0xffffffffbf800000, fcsr=0x00000061
+fmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000080
+ output: fa0=0xffffffff3f800001, fcsr=0x00000081
+fmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffffbf800000, fa3=0xffffffffb3800000, fcsr=0x00000080
+ output: fa0=0xffffffffbf800001, fcsr=0x00000081
+fmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff40400000, fa2=0xffffffff40000000, fa3=0xffffffff3f800000, fcsr=0x00000000
+ output: fa0=0xffffffff40a00000, fcsr=0x00000000
+fmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffff3f800000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000000
+fmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff40000000, fa2=0xffffffff00000001, fa3=0xffffffff00000001, fcsr=0x00000000
+ output: fa0=0xffffffff00000001, fcsr=0x00000000
+fmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff40000000, fa2=0xffffffff7f7fffff, fa3=0xffffffff7f7fffff, fcsr=0x00000000
+ output: fa0=0xffffffff7f7fffff, fcsr=0x00000000
+fmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff40000000, fa2=0xffffffff7f7fffff, fa3=0xffffffff00000000, fcsr=0x00000000
+ output: fa0=0xffffffff7f800000, fcsr=0x00000005
+fmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff40000000, fa2=0xffffffff7f800000, fa3=0xffffffff7f800000, fcsr=0x00000000
+ output: fa0=0xffffffff7fc00000, fcsr=0x00000010
+fmsub.s fa0, fa1, fa2, fa3, rne ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fmsub.s fa0, fa1, fa2, fa3, rne ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800002, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800002, fcsr=0x00000001
+fmsub.s fa0, fa1, fa2, fa3, rtz ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fmsub.s fa0, fa1, fa2, fa3, rtz ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffffbf800000, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000001
+fmsub.s fa0, fa1, fa2, fa3, rdn ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fmsub.s fa0, fa1, fa2, fa3, rdn ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffffbf800000, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800001, fcsr=0x00000001
+fmsub.s fa0, fa1, fa2, fa3, rup ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800001, fcsr=0x00000001
+fmsub.s fa0, fa1, fa2, fa3, rup ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffffbf800000, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000001
+fmsub.s fa0, fa1, fa2, fa3, rmm ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800001, fcsr=0x00000001
+fmsub.s fa0, fa1, fa2, fa3, rmm ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffffbf800000, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800001, fcsr=0x00000001
+fmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800002, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800002, fcsr=0x00000001
+fmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000020
+ output: fa0=0xffffffff3f800000, fcsr=0x00000021
+fmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffffbf800000, fa3=0xffffffff33800000, fcsr=0x00000020
+ output: fa0=0xffffffffbf800000, fcsr=0x00000021
+fmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000040
+ output: fa0=0xffffffff3f800000, fcsr=0x00000041
+fmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffffbf800000, fa3=0xffffffff33800000, fcsr=0x00000040
+ output: fa0=0xffffffffbf800001, fcsr=0x00000041
+fmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000060
+ output: fa0=0xffffffff3f800001, fcsr=0x00000061
+fmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffffbf800000, fa3=0xffffffff33800000, fcsr=0x00000060
+ output: fa0=0xffffffffbf800000, fcsr=0x00000061
+fmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000080
+ output: fa0=0xffffffff3f800001, fcsr=0x00000081
+fmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffffbf800000, fa3=0xffffffff33800000, fcsr=0x00000080
+ output: fa0=0xffffffffbf800001, fcsr=0x00000081
+fnmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff40400000, fa2=0xffffffff40000000, fa3=0xffffffff3f800000, fcsr=0x00000000
+ output: fa0=0xffffffffc0a00000, fcsr=0x00000000
+fnmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffff3f800000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000000
+fnmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff40000000, fa2=0xffffffff00000001, fa3=0xffffffff00000001, fcsr=0x00000000
+ output: fa0=0xffffffff80000001, fcsr=0x00000000
+fnmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff40000000, fa2=0xffffffff7f7fffff, fa3=0xffffffff7f7fffff, fcsr=0x00000000
+ output: fa0=0xffffffffff7fffff, fcsr=0x00000000
+fnmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff40000000, fa2=0xffffffff7f7fffff, fa3=0xffffffff00000000, fcsr=0x00000000
+ output: fa0=0xffffffffff800000, fcsr=0x00000005
+fnmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff40000000, fa2=0xffffffff7f800000, fa3=0xffffffff7f800000, fcsr=0x00000000
+ output: fa0=0xffffffff7fc00000, fcsr=0x00000010
+fnmsub.s fa0, fa1, fa2, fa3, rne ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fnmsub.s fa0, fa1, fa2, fa3, rne ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800002, fcsr=0x00000001
+fnmsub.s fa0, fa1, fa2, fa3, rtz ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fnmsub.s fa0, fa1, fa2, fa3, rtz ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffffb3800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000001
+fnmsub.s fa0, fa1, fa2, fa3, rdn ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fnmsub.s fa0, fa1, fa2, fa3, rdn ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffffb3800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800001, fcsr=0x00000001
+fnmsub.s fa0, fa1, fa2, fa3, rup ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800001, fcsr=0x00000001
+fnmsub.s fa0, fa1, fa2, fa3, rup ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffffb3800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000001
+fnmsub.s fa0, fa1, fa2, fa3, rmm ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800001, fcsr=0x00000001
+fnmsub.s fa0, fa1, fa2, fa3, rmm ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffffb3800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800001, fcsr=0x00000001
+fnmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fnmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800002, fcsr=0x00000001
+fnmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000020
+ output: fa0=0xffffffff3f800000, fcsr=0x00000021
+fnmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffffb3800000, fcsr=0x00000020
+ output: fa0=0xffffffffbf800000, fcsr=0x00000021
+fnmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000040
+ output: fa0=0xffffffff3f800000, fcsr=0x00000041
+fnmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffffb3800000, fcsr=0x00000040
+ output: fa0=0xffffffffbf800001, fcsr=0x00000041
+fnmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000060
+ output: fa0=0xffffffff3f800001, fcsr=0x00000061
+fnmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffffb3800000, fcsr=0x00000060
+ output: fa0=0xffffffffbf800000, fcsr=0x00000061
+fnmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000080
+ output: fa0=0xffffffff3f800001, fcsr=0x00000081
+fnmsub.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffffb3800000, fcsr=0x00000080
+ output: fa0=0xffffffffbf800001, fcsr=0x00000081
+fnmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff40400000, fa2=0xffffffff40000000, fa3=0xffffffff3f800000, fcsr=0x00000000
+ output: fa0=0xffffffffc0e00000, fcsr=0x00000000
+fnmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffffbf800000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000000
+fnmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff40000000, fa2=0xffffffff00000001, fa3=0xffffffff80000001, fcsr=0x00000000
+ output: fa0=0xffffffff80000001, fcsr=0x00000000
+fnmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff40000000, fa2=0xffffffff7f7fffff, fa3=0xffffffffff7fffff, fcsr=0x00000000
+ output: fa0=0xffffffffff7fffff, fcsr=0x00000000
+fnmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff40000000, fa2=0xffffffff7f7fffff, fa3=0xffffffff00000000, fcsr=0x00000000
+ output: fa0=0xffffffffff800000, fcsr=0x00000005
+fnmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff40000000, fa2=0xffffffff7f800000, fa3=0xffffffffff800000, fcsr=0x00000000
+ output: fa0=0xffffffff7fc00000, fcsr=0x00000010
+fnmadd.s fa0, fa1, fa2, fa3, rne ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fnmadd.s fa0, fa1, fa2, fa3, rne ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800002, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800002, fcsr=0x00000001
+fnmadd.s fa0, fa1, fa2, fa3, rtz ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fnmadd.s fa0, fa1, fa2, fa3, rtz ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000001
+fnmadd.s fa0, fa1, fa2, fa3, rdn ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fnmadd.s fa0, fa1, fa2, fa3, rdn ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800001, fcsr=0x00000001
+fnmadd.s fa0, fa1, fa2, fa3, rup ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800001, fcsr=0x00000001
+fnmadd.s fa0, fa1, fa2, fa3, rup ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000001
+fnmadd.s fa0, fa1, fa2, fa3, rmm ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800001, fcsr=0x00000001
+fnmadd.s fa0, fa1, fa2, fa3, rmm ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800001, fcsr=0x00000001
+fnmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fnmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800002, fa3=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800002, fcsr=0x00000001
+fnmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000020
+ output: fa0=0xffffffff3f800000, fcsr=0x00000021
+fnmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000020
+ output: fa0=0xffffffffbf800000, fcsr=0x00000021
+fnmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000040
+ output: fa0=0xffffffff3f800000, fcsr=0x00000041
+fnmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000040
+ output: fa0=0xffffffffbf800001, fcsr=0x00000041
+fnmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000060
+ output: fa0=0xffffffff3f800001, fcsr=0x00000061
+fnmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000060
+ output: fa0=0xffffffffbf800000, fcsr=0x00000061
+fnmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff3f800001, fa3=0xffffffff33800000, fcsr=0x00000080
+ output: fa0=0xffffffff3f800001, fcsr=0x00000081
+fnmadd.s fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fa3=0xffffffff33800000, fcsr=0x00000080
+ output: fa0=0xffffffffbf800001, fcsr=0x00000081
+fadd.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff40000000, fa2=0xffffffff3f800000, fcsr=0x00000000
+ output: fa0=0xffffffff40400000, fcsr=0x00000000
+fadd.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffffbf800000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000000
+fadd.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff00000001, fcsr=0x00000000
+ output: fa0=0xffffffff00000002, fcsr=0x00000000
+fadd.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff7f7fffff, fa2=0xffffffff7f7fffff, fcsr=0x00000000
+ output: fa0=0xffffffff7f800000, fcsr=0x00000005
+fadd.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffffff7fffff, fa2=0xffffffffff7fffff, fcsr=0x00000000
+ output: fa0=0xffffffffff800000, fcsr=0x00000005
+fadd.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00800001, fa2=0xffffffff80800000, fcsr=0x00000000
+ output: fa0=0xffffffff00000001, fcsr=0x00000000
+fadd.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff7f800000, fa2=0xffffffffff800000, fcsr=0x00000000
+ output: fa0=0xffffffff7fc00000, fcsr=0x00000010
+fadd.s fa0, fa1, fa2, rne ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fadd.s fa0, fa1, fa2, rne ::
+ inputs: fa1=0xffffffff3f800001, fa2=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800002, fcsr=0x00000001
+fadd.s fa0, fa1, fa2, rtz ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fadd.s fa0, fa1, fa2, rtz ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffffb3800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000001
+fadd.s fa0, fa1, fa2, rdn ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fadd.s fa0, fa1, fa2, rdn ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffffb3800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800001, fcsr=0x00000001
+fadd.s fa0, fa1, fa2, rup ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800001, fcsr=0x00000001
+fadd.s fa0, fa1, fa2, rup ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffffb3800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000001
+fadd.s fa0, fa1, fa2, rmm ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800001, fcsr=0x00000001
+fadd.s fa0, fa1, fa2, rmm ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffffb3800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800001, fcsr=0x00000001
+fadd.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fadd.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800001, fa2=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800002, fcsr=0x00000001
+fadd.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff33800000, fcsr=0x00000020
+ output: fa0=0xffffffff3f800000, fcsr=0x00000021
+fadd.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffffb3800000, fcsr=0x00000020
+ output: fa0=0xffffffffbf800000, fcsr=0x00000021
+fadd.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff33800000, fcsr=0x00000040
+ output: fa0=0xffffffff3f800000, fcsr=0x00000041
+fadd.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffffb3800000, fcsr=0x00000040
+ output: fa0=0xffffffffbf800001, fcsr=0x00000041
+fadd.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff33800000, fcsr=0x00000060
+ output: fa0=0xffffffff3f800001, fcsr=0x00000061
+fadd.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffffb3800000, fcsr=0x00000060
+ output: fa0=0xffffffffbf800000, fcsr=0x00000061
+fadd.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff33800000, fcsr=0x00000080
+ output: fa0=0xffffffff3f800001, fcsr=0x00000081
+fadd.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffffb3800000, fcsr=0x00000080
+ output: fa0=0xffffffffbf800001, fcsr=0x00000081
+fsub.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff40000000, fa2=0xffffffff3f800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000000
+fsub.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff3f800000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000000
+fsub.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff80000001, fcsr=0x00000000
+ output: fa0=0xffffffff00000002, fcsr=0x00000000
+fsub.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff7f7fffff, fa2=0xffffffffff7fffff, fcsr=0x00000000
+ output: fa0=0xffffffff7f800000, fcsr=0x00000005
+fsub.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffffff7fffff, fa2=0xffffffff7f7fffff, fcsr=0x00000000
+ output: fa0=0xffffffffff800000, fcsr=0x00000005
+fsub.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00800001, fa2=0xffffffff00800000, fcsr=0x00000000
+ output: fa0=0xffffffff00000001, fcsr=0x00000000
+fsub.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff7f800000, fa2=0xffffffff7f800000, fcsr=0x00000000
+ output: fa0=0xffffffff7fc00000, fcsr=0x00000010
+fsub.s fa0, fa1, fa2, rne ::
+ inputs: fa1=0xffffffff3f800001, fa2=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fsub.s fa0, fa1, fa2, rne ::
+ inputs: fa1=0xffffffff3f800002, fa2=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800002, fcsr=0x00000001
+fsub.s fa0, fa1, fa2, rtz ::
+ inputs: fa1=0xffffffff3f800001, fa2=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fsub.s fa0, fa1, fa2, rtz ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000001
+fsub.s fa0, fa1, fa2, rdn ::
+ inputs: fa1=0xffffffff3f800001, fa2=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fsub.s fa0, fa1, fa2, rdn ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800001, fcsr=0x00000001
+fsub.s fa0, fa1, fa2, rup ::
+ inputs: fa1=0xffffffff3f800001, fa2=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800001, fcsr=0x00000001
+fsub.s fa0, fa1, fa2, rup ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000001
+fsub.s fa0, fa1, fa2, rmm ::
+ inputs: fa1=0xffffffff3f800001, fa2=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800001, fcsr=0x00000001
+fsub.s fa0, fa1, fa2, rmm ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800001, fcsr=0x00000001
+fsub.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800001, fa2=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fsub.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800002, fa2=0xffffffff33800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800002, fcsr=0x00000001
+fsub.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800001, fa2=0xffffffff33800000, fcsr=0x00000020
+ output: fa0=0xffffffff3f800000, fcsr=0x00000021
+fsub.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff33800000, fcsr=0x00000020
+ output: fa0=0xffffffffbf800000, fcsr=0x00000021
+fsub.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800001, fa2=0xffffffff33800000, fcsr=0x00000040
+ output: fa0=0xffffffff3f800000, fcsr=0x00000041
+fsub.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff33800000, fcsr=0x00000040
+ output: fa0=0xffffffffbf800001, fcsr=0x00000041
+fsub.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800001, fa2=0xffffffff33800000, fcsr=0x00000060
+ output: fa0=0xffffffff3f800001, fcsr=0x00000061
+fsub.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff33800000, fcsr=0x00000060
+ output: fa0=0xffffffffbf800000, fcsr=0x00000061
+fsub.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800001, fa2=0xffffffff33800000, fcsr=0x00000080
+ output: fa0=0xffffffff3f800001, fcsr=0x00000081
+fsub.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff33800000, fcsr=0x00000080
+ output: fa0=0xffffffffbf800001, fcsr=0x00000081
+fmul.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff40000000, fa2=0xffffffff3f800000, fcsr=0x00000000
+ output: fa0=0xffffffff40000000, fcsr=0x00000000
+fmul.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff00000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000000
+fmul.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff1a800000, fa2=0xffffffff1a000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000001, fcsr=0x00000000
+fmul.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff7f7fffff, fa2=0xffffffff7f7fffff, fcsr=0x00000000
+ output: fa0=0xffffffff7f800000, fcsr=0x00000005
+fmul.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff7f7fffff, fa2=0xffffffffff7fffff, fcsr=0x00000000
+ output: fa0=0xffffffffff800000, fcsr=0x00000005
+fmul.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff7f800000, fcsr=0x00000000
+ output: fa0=0xffffffff7f800000, fcsr=0x00000000
+fmul.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000000, fa2=0xffffffff7f800000, fcsr=0x00000000
+ output: fa0=0xffffffff7fc00000, fcsr=0x00000010
+fmul.s fa0, fa1, fa2, rne ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff3f000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000003
+fmul.s fa0, fa1, fa2, rne ::
+ inputs: fa1=0xffffffff00000003, fa2=0xffffffff3f000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000002, fcsr=0x00000003
+fmul.s fa0, fa1, fa2, rtz ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff3f000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000003
+fmul.s fa0, fa1, fa2, rtz ::
+ inputs: fa1=0xffffffff80000001, fa2=0xffffffff3f000000, fcsr=0x00000000
+ output: fa0=0xffffffff80000000, fcsr=0x00000003
+fmul.s fa0, fa1, fa2, rdn ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff3f000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000003
+fmul.s fa0, fa1, fa2, rdn ::
+ inputs: fa1=0xffffffff80000001, fa2=0xffffffff3f000000, fcsr=0x00000000
+ output: fa0=0xffffffff80000001, fcsr=0x00000003
+fmul.s fa0, fa1, fa2, rup ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff3f000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000001, fcsr=0x00000003
+fmul.s fa0, fa1, fa2, rup ::
+ inputs: fa1=0xffffffff80000001, fa2=0xffffffff3f000000, fcsr=0x00000000
+ output: fa0=0xffffffff80000000, fcsr=0x00000003
+fmul.s fa0, fa1, fa2, rmm ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff3f000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000001, fcsr=0x00000003
+fmul.s fa0, fa1, fa2, rmm ::
+ inputs: fa1=0xffffffff80000001, fa2=0xffffffff3f000000, fcsr=0x00000000
+ output: fa0=0xffffffff80000001, fcsr=0x00000003
+fmul.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff3f000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000003
+fmul.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000003, fa2=0xffffffff3f000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000002, fcsr=0x00000003
+fmul.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff3f000000, fcsr=0x00000020
+ output: fa0=0xffffffff00000000, fcsr=0x00000023
+fmul.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff80000001, fa2=0xffffffff3f000000, fcsr=0x00000020
+ output: fa0=0xffffffff80000000, fcsr=0x00000023
+fmul.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff3f000000, fcsr=0x00000040
+ output: fa0=0xffffffff00000000, fcsr=0x00000043
+fmul.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff80000001, fa2=0xffffffff3f000000, fcsr=0x00000040
+ output: fa0=0xffffffff80000001, fcsr=0x00000043
+fmul.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff3f000000, fcsr=0x00000060
+ output: fa0=0xffffffff00000001, fcsr=0x00000063
+fmul.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff80000001, fa2=0xffffffff3f000000, fcsr=0x00000060
+ output: fa0=0xffffffff80000000, fcsr=0x00000063
+fmul.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff3f000000, fcsr=0x00000080
+ output: fa0=0xffffffff00000001, fcsr=0x00000083
+fmul.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff80000001, fa2=0xffffffff3f000000, fcsr=0x00000080
+ output: fa0=0xffffffff80000001, fcsr=0x00000083
+fdiv.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff40000000, fa2=0xffffffff3f800000, fcsr=0x00000000
+ output: fa0=0xffffffff40000000, fcsr=0x00000000
+fdiv.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000000, fa2=0xffffffff3f800000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000000
+fdiv.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff7f000000, fcsr=0x00000000
+ output: fa0=0xffffffff00400000, fcsr=0x00000000
+fdiv.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff7f7fffff, fa2=0xffffffff3f000000, fcsr=0x00000000
+ output: fa0=0xffffffff7f800000, fcsr=0x00000005
+fdiv.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff7f7fffff, fa2=0xffffffffbf000000, fcsr=0x00000000
+ output: fa0=0xffffffffff800000, fcsr=0x00000005
+fdiv.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff7f800000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000000
+fdiv.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff00000000, fcsr=0x00000000
+ output: fa0=0xffffffff7f800000, fcsr=0x00000008
+fdiv.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000000, fa2=0xffffffff00000000, fcsr=0x00000000
+ output: fa0=0xffffffff7fc00000, fcsr=0x00000010
+fdiv.s fa0, fa1, fa2, rne ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff40000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000003
+fdiv.s fa0, fa1, fa2, rne ::
+ inputs: fa1=0xffffffff00000003, fa2=0xffffffff40000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000002, fcsr=0x00000003
+fdiv.s fa0, fa1, fa2, rtz ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff40000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000003
+fdiv.s fa0, fa1, fa2, rtz ::
+ inputs: fa1=0xffffffff80000001, fa2=0xffffffff40000000, fcsr=0x00000000
+ output: fa0=0xffffffff80000000, fcsr=0x00000003
+fdiv.s fa0, fa1, fa2, rdn ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff40000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000003
+fdiv.s fa0, fa1, fa2, rdn ::
+ inputs: fa1=0xffffffff80000001, fa2=0xffffffff40000000, fcsr=0x00000000
+ output: fa0=0xffffffff80000001, fcsr=0x00000003
+fdiv.s fa0, fa1, fa2, rup ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff40000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000001, fcsr=0x00000003
+fdiv.s fa0, fa1, fa2, rup ::
+ inputs: fa1=0xffffffff80000001, fa2=0xffffffff40000000, fcsr=0x00000000
+ output: fa0=0xffffffff80000000, fcsr=0x00000003
+fdiv.s fa0, fa1, fa2, rmm ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff40000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000001, fcsr=0x00000003
+fdiv.s fa0, fa1, fa2, rmm ::
+ inputs: fa1=0xffffffff80000001, fa2=0xffffffff40000000, fcsr=0x00000000
+ output: fa0=0xffffffff80000001, fcsr=0x00000003
+fdiv.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff40000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000003
+fdiv.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000003, fa2=0xffffffff40000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000002, fcsr=0x00000003
+fdiv.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff40000000, fcsr=0x00000020
+ output: fa0=0xffffffff00000000, fcsr=0x00000023
+fdiv.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff80000001, fa2=0xffffffff40000000, fcsr=0x00000020
+ output: fa0=0xffffffff80000000, fcsr=0x00000023
+fdiv.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff40000000, fcsr=0x00000040
+ output: fa0=0xffffffff00000000, fcsr=0x00000043
+fdiv.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff80000001, fa2=0xffffffff40000000, fcsr=0x00000040
+ output: fa0=0xffffffff80000001, fcsr=0x00000043
+fdiv.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff40000000, fcsr=0x00000060
+ output: fa0=0xffffffff00000001, fcsr=0x00000063
+fdiv.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff80000001, fa2=0xffffffff40000000, fcsr=0x00000060
+ output: fa0=0xffffffff80000000, fcsr=0x00000063
+fdiv.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000001, fa2=0xffffffff40000000, fcsr=0x00000080
+ output: fa0=0xffffffff00000001, fcsr=0x00000083
+fdiv.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff80000001, fa2=0xffffffff40000000, fcsr=0x00000080
+ output: fa0=0xffffffff80000001, fcsr=0x00000083
+fsqrt.s fa0, fa1 ::
+ inputs: fa1=0xffffffff00000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000000
+fsqrt.s fa0, fa1 ::
+ inputs: fa1=0xffffffff7f800000, fcsr=0x00000000
+ output: fa0=0xffffffff7f800000, fcsr=0x00000000
+fsqrt.s fa0, fa1 ::
+ inputs: fa1=0xffffffff00000002, fcsr=0x00000000
+ output: fa0=0xffffffff1a800000, fcsr=0x00000000
+fsqrt.s fa0, fa1 ::
+ inputs: fa1=0xffffffff7fc00000, fcsr=0x00000000
+ output: fa0=0xffffffff7fc00000, fcsr=0x00000000
+fsqrt.s fa0, fa1 ::
+ inputs: fa1=0xffffffffbf800000, fcsr=0x00000000
+ output: fa0=0xffffffff7fc00000, fcsr=0x00000010
+fsqrt.s fa0, fa1, rne ::
+ inputs: fa1=0xffffffff3f800001, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fsqrt.s fa0, fa1, rne ::
+ inputs: fa1=0xffffffff3f800002, fcsr=0x00000000
+ output: fa0=0xffffffff3f800001, fcsr=0x00000001
+fsqrt.s fa0, fa1, rtz ::
+ inputs: fa1=0xffffffff3f800001, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fsqrt.s fa0, fa1, rtz ::
+ inputs: fa1=0xffffffff3f800002, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fsqrt.s fa0, fa1, rdn ::
+ inputs: fa1=0xffffffff3f800001, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fsqrt.s fa0, fa1, rdn ::
+ inputs: fa1=0xffffffff3f800002, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fsqrt.s fa0, fa1, rup ::
+ inputs: fa1=0xffffffff3f800001, fcsr=0x00000000
+ output: fa0=0xffffffff3f800001, fcsr=0x00000001
+fsqrt.s fa0, fa1, rup ::
+ inputs: fa1=0xffffffff3f800002, fcsr=0x00000000
+ output: fa0=0xffffffff3f800001, fcsr=0x00000001
+fsqrt.s fa0, fa1, rmm ::
+ inputs: fa1=0xffffffff3f800001, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fsqrt.s fa0, fa1, rmm ::
+ inputs: fa1=0xffffffff3f800002, fcsr=0x00000000
+ output: fa0=0xffffffff3f800001, fcsr=0x00000001
+fsqrt.s fa0, fa1 ::
+ inputs: fa1=0xffffffff3f800001, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fsqrt.s fa0, fa1 ::
+ inputs: fa1=0xffffffff3f800002, fcsr=0x00000000
+ output: fa0=0xffffffff3f800001, fcsr=0x00000001
+fsqrt.s fa0, fa1 ::
+ inputs: fa1=0xffffffff3f800001, fcsr=0x00000020
+ output: fa0=0xffffffff3f800000, fcsr=0x00000021
+fsqrt.s fa0, fa1 ::
+ inputs: fa1=0xffffffff3f800002, fcsr=0x00000020
+ output: fa0=0xffffffff3f800000, fcsr=0x00000021
+fsqrt.s fa0, fa1 ::
+ inputs: fa1=0xffffffff3f800001, fcsr=0x00000040
+ output: fa0=0xffffffff3f800000, fcsr=0x00000041
+fsqrt.s fa0, fa1 ::
+ inputs: fa1=0xffffffff3f800002, fcsr=0x00000040
+ output: fa0=0xffffffff3f800000, fcsr=0x00000041
+fsqrt.s fa0, fa1 ::
+ inputs: fa1=0xffffffff3f800001, fcsr=0x00000060
+ output: fa0=0xffffffff3f800001, fcsr=0x00000061
+fsqrt.s fa0, fa1 ::
+ inputs: fa1=0xffffffff3f800002, fcsr=0x00000060
+ output: fa0=0xffffffff3f800001, fcsr=0x00000061
+fsqrt.s fa0, fa1 ::
+ inputs: fa1=0xffffffff3f800001, fcsr=0x00000080
+ output: fa0=0xffffffff3f800000, fcsr=0x00000081
+fsqrt.s fa0, fa1 ::
+ inputs: fa1=0xffffffff3f800002, fcsr=0x00000080
+ output: fa0=0xffffffff3f800001, fcsr=0x00000081
+fsgnj.s fa0, fa1, fa1 ::
+ inputs: fa1=0xffffffff3f800000, fa1=0xffffffff3f800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000000
+fsgnj.s fa0, fa1, fa1 ::
+ inputs: fa1=0xffffffffbf800000, fa1=0xffffffffbf800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000000
+fsgnj.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff7fffffff, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000000
+fsgnj.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff80000000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000000
+fsgnj.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff7fffffff, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000000
+fsgnj.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff80000000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000000
+fsgnjn.s fa0, fa1, fa1 ::
+ inputs: fa1=0xffffffff3f800000, fa1=0xffffffff3f800000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000000
+fsgnjn.s fa0, fa1, fa1 ::
+ inputs: fa1=0xffffffffbf800000, fa1=0xffffffffbf800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000000
+fsgnjn.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff7fffffff, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000000
+fsgnjn.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff80000000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000000
+fsgnjn.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff7fffffff, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000000
+fsgnjn.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff80000000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000000
+fsgnjx.s fa0, fa1, fa1 ::
+ inputs: fa1=0xffffffff3f800000, fa1=0xffffffff3f800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000000
+fsgnjx.s fa0, fa1, fa1 ::
+ inputs: fa1=0xffffffffbf800000, fa1=0xffffffffbf800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000000
+fsgnjx.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff7fffffff, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000000
+fsgnjx.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff3f800000, fa2=0xffffffff80000000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000000
+fsgnjx.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff7fffffff, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000000
+fsgnjx.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffffbf800000, fa2=0xffffffff80000000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000000
+fmin.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000000, fa2=0xffffffff3f800000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000000
+fmin.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000000, fa2=0xffffffff80000000, fcsr=0x00000000
+ output: fa0=0xffffffff80000000, fcsr=0x00000000
+fmin.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff80000000, fa2=0xffffffff00000000, fcsr=0x00000000
+ output: fa0=0xffffffff80000000, fcsr=0x00000000
+fmin.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff7f800000, fa2=0xffffffff7f800000, fcsr=0x00000000
+ output: fa0=0xffffffff7f800000, fcsr=0x00000000
+fmin.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000000, fa2=0xffffffff7fc00000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000000
+fmin.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000000, fa2=0xffffffff7fa00000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000010
+fmax.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000000, fa2=0xffffffff3f800000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000000
+fmax.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000000, fa2=0xffffffff80000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000000
+fmax.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff80000000, fa2=0xffffffff00000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000000
+fmax.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff7f800000, fa2=0xffffffff7f800000, fcsr=0x00000000
+ output: fa0=0xffffffff7f800000, fcsr=0x00000000
+fmax.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000000, fa2=0xffffffff7fc00000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000000
+fmax.s fa0, fa1, fa2 ::
+ inputs: fa1=0xffffffff00000000, fa2=0xffffffff7fa00000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000010
+fcvt.w.s a0, fa0 ::
+ inputs: fa0=0xffffffff00000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+fcvt.w.s a0, fa0 ::
+ inputs: fa0=0xffffffff00000001, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.w.s a0, fa0 ::
+ inputs: fa0=0xffffffff7f800000, fcsr=0x00000000
+ output: a0=0x000000007fffffff, fcsr=0x00000010
+fcvt.w.s a0, fa0 ::
+ inputs: fa0=0xffffffff7fc00000, fcsr=0x00000000
+ output: a0=0x000000007fffffff, fcsr=0x00000010
+fcvt.w.s a0, fa0 ::
+ inputs: fa0=0xffffffff4effffff, fcsr=0x00000000
+ output: a0=0x000000007fffff80, fcsr=0x00000000
+fcvt.w.s a0, fa0 ::
+ inputs: fa0=0xffffffffcf000000, fcsr=0x00000000
+ output: a0=0xffffffff80000000, fcsr=0x00000000
+fcvt.w.s a0, fa0 ::
+ inputs: fa0=0xffffffff4f000000, fcsr=0x00000000
+ output: a0=0x000000007fffffff, fcsr=0x00000010
+fcvt.w.s a0, fa0 ::
+ inputs: fa0=0xffffffffcf000001, fcsr=0x00000000
+ output: a0=0xffffffff80000000, fcsr=0x00000010
+fcvt.w.s zero, fa0 ::
+ inputs: fa0=0xffffffff3f800000, fcsr=0x00000000
+ output: zero=0x0000000000000000, fcsr=0x00000000
+fcvt.w.s a0, fa0, rne ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.w.s a0, fa0, rne ::
+ inputs: fa0=0xffffffff3fc00000, fcsr=0x00000000
+ output: a0=0x0000000000000002, fcsr=0x00000001
+fcvt.w.s a0, fa0, rtz ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.w.s a0, fa0, rtz ::
+ inputs: fa0=0xffffffffbf000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.w.s a0, fa0, rdn ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.w.s a0, fa0, rdn ::
+ inputs: fa0=0xffffffffbf000000, fcsr=0x00000000
+ output: a0=0xffffffffffffffff, fcsr=0x00000001
+fcvt.w.s a0, fa0, rup ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000001
+fcvt.w.s a0, fa0, rup ::
+ inputs: fa0=0xffffffffbf000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.w.s a0, fa0, rmm ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000001
+fcvt.w.s a0, fa0, rmm ::
+ inputs: fa0=0xffffffffbf000000, fcsr=0x00000000
+ output: a0=0xffffffffffffffff, fcsr=0x00000001
+fcvt.w.s a0, fa0 ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.w.s a0, fa0 ::
+ inputs: fa0=0xffffffff3fc00000, fcsr=0x00000000
+ output: a0=0x0000000000000002, fcsr=0x00000001
+fcvt.w.s a0, fa0 ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000020
+ output: a0=0x0000000000000000, fcsr=0x00000021
+fcvt.w.s a0, fa0 ::
+ inputs: fa0=0xffffffffbf000000, fcsr=0x00000020
+ output: a0=0x0000000000000000, fcsr=0x00000021
+fcvt.w.s a0, fa0 ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000040
+ output: a0=0x0000000000000000, fcsr=0x00000041
+fcvt.w.s a0, fa0 ::
+ inputs: fa0=0xffffffffbf000000, fcsr=0x00000040
+ output: a0=0xffffffffffffffff, fcsr=0x00000041
+fcvt.w.s a0, fa0 ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000060
+ output: a0=0x0000000000000001, fcsr=0x00000061
+fcvt.w.s a0, fa0 ::
+ inputs: fa0=0xffffffffbf000000, fcsr=0x00000060
+ output: a0=0x0000000000000000, fcsr=0x00000061
+fcvt.w.s a0, fa0 ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000080
+ output: a0=0x0000000000000001, fcsr=0x00000081
+fcvt.w.s a0, fa0 ::
+ inputs: fa0=0xffffffffbf000000, fcsr=0x00000080
+ output: a0=0xffffffffffffffff, fcsr=0x00000081
+fcvt.wu.s a0, fa0 ::
+ inputs: fa0=0xffffffff00000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+fcvt.wu.s a0, fa0 ::
+ inputs: fa0=0xffffffff00000001, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.wu.s a0, fa0 ::
+ inputs: fa0=0xffffffff7f800000, fcsr=0x00000000
+ output: a0=0xffffffffffffffff, fcsr=0x00000010
+fcvt.wu.s a0, fa0 ::
+ inputs: fa0=0xffffffff7fc00000, fcsr=0x00000000
+ output: a0=0xffffffffffffffff, fcsr=0x00000010
+fcvt.wu.s a0, fa0 ::
+ inputs: fa0=0xffffffff4f7fffff, fcsr=0x00000000
+ output: a0=0xffffffffffffff00, fcsr=0x00000000
+fcvt.wu.s a0, fa0 ::
+ inputs: fa0=0xffffffff4f800000, fcsr=0x00000000
+ output: a0=0xffffffffffffffff, fcsr=0x00000010
+fcvt.wu.s a0, fa0 ::
+ inputs: fa0=0xffffffffbf800000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000010
+fcvt.wu.s zero, fa0 ::
+ inputs: fa0=0xffffffff3f800000, fcsr=0x00000000
+ output: zero=0x0000000000000000, fcsr=0x00000000
+fcvt.wu.s a0, fa0, rne ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.wu.s a0, fa0, rne ::
+ inputs: fa0=0xffffffff3fc00000, fcsr=0x00000000
+ output: a0=0x0000000000000002, fcsr=0x00000001
+fcvt.wu.s a0, fa0, rtz ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.wu.s a0, fa0, rdn ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.wu.s a0, fa0, rup ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000001
+fcvt.wu.s a0, fa0, rmm ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000001
+fcvt.wu.s a0, fa0 ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.wu.s a0, fa0 ::
+ inputs: fa0=0xffffffff3fc00000, fcsr=0x00000000
+ output: a0=0x0000000000000002, fcsr=0x00000001
+fcvt.wu.s a0, fa0 ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000020
+ output: a0=0x0000000000000000, fcsr=0x00000021
+fcvt.wu.s a0, fa0 ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000040
+ output: a0=0x0000000000000000, fcsr=0x00000041
+fcvt.wu.s a0, fa0 ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000060
+ output: a0=0x0000000000000001, fcsr=0x00000061
+fcvt.wu.s a0, fa0 ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000080
+ output: a0=0x0000000000000001, fcsr=0x00000081
+fmv.x.w a0, fa0 ::
+ inputs: fa0=0xabcdef0123456789, fcsr=0x00000000
+ output: a0=0x0000000023456789, fcsr=0x00000000
+fmv.x.w a0, fa0 ::
+ inputs: fa0=0xffffffff7fffffff, fcsr=0x00000000
+ output: a0=0x000000007fffffff, fcsr=0x00000000
+fmv.x.w a0, fa0 ::
+ inputs: fa0=0x0000000080000000, fcsr=0x00000000
+ output: a0=0xffffffff80000000, fcsr=0x00000000
+fmv.x.w zero, fa0 ::
+ inputs: fa0=0xffffffff3f800000, fcsr=0x00000000
+ output: zero=0x0000000000000000, fcsr=0x00000000
+feq.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff00000000, fa1=0xffffffff3f800000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+feq.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff00000000, fa1=0xffffffff00000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+feq.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff00000000, fa1=0xffffffff80000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+feq.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff80000000, fa1=0xffffffff00000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+feq.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff7f800000, fa1=0xffffffff7f800000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+feq.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff00000000, fa1=0xffffffff7fc00000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+feq.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff00000000, fa1=0xffffffff7fa00000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000010
+feq.s zero, fa0, fa1 ::
+ inputs: fa0=0xffffffff7fa00000, fa1=0xffffffff7fa00000, fcsr=0x00000000
+ output: zero=0x0000000000000000, fcsr=0x00000010
+flt.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff00000000, fa1=0xffffffff00000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+flt.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff00000000, fa1=0xffffffff3f800000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+flt.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff00000000, fa1=0xffffffff80000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+flt.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff80000000, fa1=0xffffffff00000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+flt.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff7f800000, fa1=0xffffffff7f800000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+flt.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff00000000, fa1=0xffffffff7fc00000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000010
+flt.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff00000000, fa1=0xffffffff7fa00000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000010
+flt.s zero, fa0, fa1 ::
+ inputs: fa0=0xffffffff7fa00000, fa1=0xffffffff7fa00000, fcsr=0x00000000
+ output: zero=0x0000000000000000, fcsr=0x00000010
+fle.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff3f800000, fa1=0xffffffff00000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+fle.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff00000000, fa1=0xffffffff00000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+fle.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff00000000, fa1=0xffffffff3f800000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+fle.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff00000000, fa1=0xffffffff80000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+fle.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff80000000, fa1=0xffffffff00000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+fle.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff7f800000, fa1=0xffffffff7f800000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+fle.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff00000000, fa1=0xffffffff7fc00000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000010
+fle.s a0, fa0, fa1 ::
+ inputs: fa0=0xffffffff7fa00000, fa1=0x7ff4000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000010
+fle.s zero, fa0, fa1 ::
+ inputs: fa0=0xffffffff7fa00000, fa1=0xffffffff7fa00000, fcsr=0x00000000
+ output: zero=0x0000000000000000, fcsr=0x00000010
+fclass.s a0, fa0 ::
+ inputs: fa0=0xffffffffff800000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+fclass.s a0, fa0 ::
+ inputs: fa0=0xffffffffbf800000, fcsr=0x00000000
+ output: a0=0x0000000000000002, fcsr=0x00000000
+fclass.s a0, fa0 ::
+ inputs: fa0=0xffffffff80000001, fcsr=0x00000000
+ output: a0=0x0000000000000004, fcsr=0x00000000
+fclass.s a0, fa0 ::
+ inputs: fa0=0xffffffff80000000, fcsr=0x00000000
+ output: a0=0x0000000000000008, fcsr=0x00000000
+fclass.s a0, fa0 ::
+ inputs: fa0=0xffffffff00000000, fcsr=0x00000000
+ output: a0=0x0000000000000010, fcsr=0x00000000
+fclass.s a0, fa0 ::
+ inputs: fa0=0xffffffff00000001, fcsr=0x00000000
+ output: a0=0x0000000000000020, fcsr=0x00000000
+fclass.s a0, fa0 ::
+ inputs: fa0=0xffffffff3f800000, fcsr=0x00000000
+ output: a0=0x0000000000000040, fcsr=0x00000000
+fclass.s a0, fa0 ::
+ inputs: fa0=0xffffffff7f800000, fcsr=0x00000000
+ output: a0=0x0000000000000080, fcsr=0x00000000
+fclass.s a0, fa0 ::
+ inputs: fa0=0xffffffff7fa00000, fcsr=0x00000000
+ output: a0=0x0000000000000100, fcsr=0x00000000
+fclass.s a0, fa0 ::
+ inputs: fa0=0xffffffff7fc00000, fcsr=0x00000000
+ output: a0=0x0000000000000200, fcsr=0x00000000
+fclass.s zero, fa0 ::
+ inputs: fa0=0xffffffffff800000, fcsr=0x00000000
+ output: zero=0x0000000000000000, fcsr=0x00000000
+fcvt.s.w fa0, a0 ::
+ inputs: a0=0x0000000000000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000000
+fcvt.s.w fa0, a0 ::
+ inputs: a0=0x000000007fffff80, fcsr=0x00000000
+ output: fa0=0xffffffff4effffff, fcsr=0x00000000
+fcvt.s.w fa0, a0 ::
+ inputs: a0=0x000000007fffffff, fcsr=0x00000000
+ output: fa0=0xffffffff4f000000, fcsr=0x00000001
+fcvt.s.w fa0, a0 ::
+ inputs: a0=0x0000000080000000, fcsr=0x00000000
+ output: fa0=0xffffffffcf000000, fcsr=0x00000000
+fcvt.s.w fa0, a0, rne ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800000, fcsr=0x00000001
+fcvt.s.w fa0, a0, rne ::
+ inputs: a0=0x0000000001000003, fcsr=0x00000000
+ output: fa0=0xffffffff4b800002, fcsr=0x00000001
+fcvt.s.w fa0, a0, rtz ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800000, fcsr=0x00000001
+fcvt.s.w fa0, a0, rtz ::
+ inputs: a0=0xfffffffffeffffff, fcsr=0x00000000
+ output: fa0=0xffffffffcb800000, fcsr=0x00000001
+fcvt.s.w fa0, a0, rdn ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800000, fcsr=0x00000001
+fcvt.s.w fa0, a0, rdn ::
+ inputs: a0=0xfffffffffeffffff, fcsr=0x00000000
+ output: fa0=0xffffffffcb800001, fcsr=0x00000001
+fcvt.s.w fa0, a0, rup ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800001, fcsr=0x00000001
+fcvt.s.w fa0, a0, rup ::
+ inputs: a0=0xfffffffffeffffff, fcsr=0x00000000
+ output: fa0=0xffffffffcb800000, fcsr=0x00000001
+fcvt.s.w fa0, a0, rmm ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800001, fcsr=0x00000001
+fcvt.s.w fa0, a0, rmm ::
+ inputs: a0=0xfffffffffeffffff, fcsr=0x00000000
+ output: fa0=0xffffffffcb800001, fcsr=0x00000001
+fcvt.s.w fa0, a0 ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800000, fcsr=0x00000001
+fcvt.s.w fa0, a0 ::
+ inputs: a0=0x0000000001000003, fcsr=0x00000000
+ output: fa0=0xffffffff4b800002, fcsr=0x00000001
+fcvt.s.w fa0, a0 ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000020
+ output: fa0=0xffffffff4b800000, fcsr=0x00000021
+fcvt.s.w fa0, a0 ::
+ inputs: a0=0xfffffffffeffffff, fcsr=0x00000020
+ output: fa0=0xffffffffcb800000, fcsr=0x00000021
+fcvt.s.w fa0, a0 ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000040
+ output: fa0=0xffffffff4b800000, fcsr=0x00000041
+fcvt.s.w fa0, a0 ::
+ inputs: a0=0xfffffffffeffffff, fcsr=0x00000040
+ output: fa0=0xffffffffcb800001, fcsr=0x00000041
+fcvt.s.w fa0, a0 ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000060
+ output: fa0=0xffffffff4b800001, fcsr=0x00000061
+fcvt.s.w fa0, a0 ::
+ inputs: a0=0xfffffffffeffffff, fcsr=0x00000060
+ output: fa0=0xffffffffcb800000, fcsr=0x00000061
+fcvt.s.w fa0, a0 ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000080
+ output: fa0=0xffffffff4b800001, fcsr=0x00000081
+fcvt.s.w fa0, a0 ::
+ inputs: a0=0xfffffffffeffffff, fcsr=0x00000080
+ output: fa0=0xffffffffcb800001, fcsr=0x00000081
+fcvt.s.wu fa0, a0 ::
+ inputs: a0=0x0000000000000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000000
+fcvt.s.wu fa0, a0 ::
+ inputs: a0=0x00000000ffffff00, fcsr=0x00000000
+ output: fa0=0xffffffff4f7fffff, fcsr=0x00000000
+fcvt.s.wu fa0, a0 ::
+ inputs: a0=0x00000000ffffffff, fcsr=0x00000000
+ output: fa0=0xffffffff4f800000, fcsr=0x00000001
+fcvt.s.wu fa0, a0, rne ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800000, fcsr=0x00000001
+fcvt.s.wu fa0, a0, rne ::
+ inputs: a0=0x0000000001000003, fcsr=0x00000000
+ output: fa0=0xffffffff4b800002, fcsr=0x00000001
+fcvt.s.wu fa0, a0, rtz ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800000, fcsr=0x00000001
+fcvt.s.wu fa0, a0, rdn ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800000, fcsr=0x00000001
+fcvt.s.wu fa0, a0, rup ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800001, fcsr=0x00000001
+fcvt.s.wu fa0, a0, rmm ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800001, fcsr=0x00000001
+fcvt.s.wu fa0, a0 ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800000, fcsr=0x00000001
+fcvt.s.wu fa0, a0 ::
+ inputs: a0=0x0000000001000003, fcsr=0x00000000
+ output: fa0=0xffffffff4b800002, fcsr=0x00000001
+fcvt.s.wu fa0, a0 ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000020
+ output: fa0=0xffffffff4b800000, fcsr=0x00000021
+fcvt.s.wu fa0, a0 ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000040
+ output: fa0=0xffffffff4b800000, fcsr=0x00000041
+fcvt.s.wu fa0, a0 ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000060
+ output: fa0=0xffffffff4b800001, fcsr=0x00000061
+fcvt.s.wu fa0, a0 ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000080
+ output: fa0=0xffffffff4b800001, fcsr=0x00000081
+fmv.w.x fa0, a0 ::
+ inputs: a0=0xabcdef0123456789, fcsr=0x00000000
+ output: fa0=0xffffffff23456789, fcsr=0x00000000
+
+RV64F single-precision FP instruction set, additions
+fcvt.l.s a0, fa0 ::
+ inputs: fa0=0xffffffff00000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+fcvt.l.s a0, fa0 ::
+ inputs: fa0=0xffffffff00000001, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.l.s a0, fa0 ::
+ inputs: fa0=0xffffffff7f800000, fcsr=0x00000000
+ output: a0=0x7fffffffffffffff, fcsr=0x00000010
+fcvt.l.s a0, fa0 ::
+ inputs: fa0=0xffffffff7fc00000, fcsr=0x00000000
+ output: a0=0x7fffffffffffffff, fcsr=0x00000010
+fcvt.l.s a0, fa0 ::
+ inputs: fa0=0xffffffff5effffff, fcsr=0x00000000
+ output: a0=0x7fffff8000000000, fcsr=0x00000000
+fcvt.l.s a0, fa0 ::
+ inputs: fa0=0xffffffffdf000000, fcsr=0x00000000
+ output: a0=0x8000000000000000, fcsr=0x00000000
+fcvt.l.s a0, fa0 ::
+ inputs: fa0=0xffffffff5f000000, fcsr=0x00000000
+ output: a0=0x7fffffffffffffff, fcsr=0x00000010
+fcvt.l.s a0, fa0 ::
+ inputs: fa0=0xffffffffdf000001, fcsr=0x00000000
+ output: a0=0x8000000000000000, fcsr=0x00000010
+fcvt.l.s zero, fa0 ::
+ inputs: fa0=0xffffffff3f800000, fcsr=0x00000000
+ output: zero=0x0000000000000000, fcsr=0x00000000
+fcvt.l.s a0, fa0, rne ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.l.s a0, fa0, rne ::
+ inputs: fa0=0xffffffff3fc00000, fcsr=0x00000000
+ output: a0=0x0000000000000002, fcsr=0x00000001
+fcvt.l.s a0, fa0, rtz ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.l.s a0, fa0, rtz ::
+ inputs: fa0=0xffffffffbf000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.l.s a0, fa0, rdn ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.l.s a0, fa0, rdn ::
+ inputs: fa0=0xffffffffbf000000, fcsr=0x00000000
+ output: a0=0xffffffffffffffff, fcsr=0x00000001
+fcvt.l.s a0, fa0, rup ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000001
+fcvt.l.s a0, fa0, rup ::
+ inputs: fa0=0xffffffffbf000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.l.s a0, fa0, rmm ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000001
+fcvt.l.s a0, fa0, rmm ::
+ inputs: fa0=0xffffffffbf000000, fcsr=0x00000000
+ output: a0=0xffffffffffffffff, fcsr=0x00000001
+fcvt.l.s a0, fa0 ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.l.s a0, fa0 ::
+ inputs: fa0=0xffffffff3fc00000, fcsr=0x00000000
+ output: a0=0x0000000000000002, fcsr=0x00000001
+fcvt.l.s a0, fa0 ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000020
+ output: a0=0x0000000000000000, fcsr=0x00000021
+fcvt.l.s a0, fa0 ::
+ inputs: fa0=0xffffffffbf000000, fcsr=0x00000020
+ output: a0=0x0000000000000000, fcsr=0x00000021
+fcvt.l.s a0, fa0 ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000040
+ output: a0=0x0000000000000000, fcsr=0x00000041
+fcvt.l.s a0, fa0 ::
+ inputs: fa0=0xffffffffbf000000, fcsr=0x00000040
+ output: a0=0xffffffffffffffff, fcsr=0x00000041
+fcvt.l.s a0, fa0 ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000060
+ output: a0=0x0000000000000001, fcsr=0x00000061
+fcvt.l.s a0, fa0 ::
+ inputs: fa0=0xffffffffbf000000, fcsr=0x00000060
+ output: a0=0x0000000000000000, fcsr=0x00000061
+fcvt.l.s a0, fa0 ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000080
+ output: a0=0x0000000000000001, fcsr=0x00000081
+fcvt.l.s a0, fa0 ::
+ inputs: fa0=0xffffffffbf000000, fcsr=0x00000080
+ output: a0=0xffffffffffffffff, fcsr=0x00000081
+fcvt.lu.s a0, fa0 ::
+ inputs: fa0=0xffffffff00000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+fcvt.lu.s a0, fa0 ::
+ inputs: fa0=0xffffffff00000001, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.lu.s a0, fa0 ::
+ inputs: fa0=0xffffffff7f800000, fcsr=0x00000000
+ output: a0=0xffffffffffffffff, fcsr=0x00000010
+fcvt.lu.s a0, fa0 ::
+ inputs: fa0=0xffffffff7fc00000, fcsr=0x00000000
+ output: a0=0xffffffffffffffff, fcsr=0x00000010
+fcvt.lu.s a0, fa0 ::
+ inputs: fa0=0xffffffff5f7fffff, fcsr=0x00000000
+ output: a0=0xffffff0000000000, fcsr=0x00000000
+fcvt.lu.s a0, fa0 ::
+ inputs: fa0=0xffffffff5f800000, fcsr=0x00000000
+ output: a0=0xffffffffffffffff, fcsr=0x00000010
+fcvt.lu.s a0, fa0 ::
+ inputs: fa0=0xffffffffbf800000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000010
+fcvt.lu.s zero, fa0 ::
+ inputs: fa0=0xffffffff3f800000, fcsr=0x00000000
+ output: zero=0x0000000000000000, fcsr=0x00000000
+fcvt.lu.s a0, fa0, rne ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.lu.s a0, fa0, rne ::
+ inputs: fa0=0xffffffff3fc00000, fcsr=0x00000000
+ output: a0=0x0000000000000002, fcsr=0x00000001
+fcvt.lu.s a0, fa0, rtz ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.lu.s a0, fa0, rdn ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.lu.s a0, fa0, rup ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000001
+fcvt.lu.s a0, fa0, rmm ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000001
+fcvt.lu.s a0, fa0 ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.lu.s a0, fa0 ::
+ inputs: fa0=0xffffffff3fc00000, fcsr=0x00000000
+ output: a0=0x0000000000000002, fcsr=0x00000001
+fcvt.lu.s a0, fa0 ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000020
+ output: a0=0x0000000000000000, fcsr=0x00000021
+fcvt.lu.s a0, fa0 ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000040
+ output: a0=0x0000000000000000, fcsr=0x00000041
+fcvt.lu.s a0, fa0 ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000060
+ output: a0=0x0000000000000001, fcsr=0x00000061
+fcvt.lu.s a0, fa0 ::
+ inputs: fa0=0xffffffff3f000000, fcsr=0x00000080
+ output: a0=0x0000000000000001, fcsr=0x00000081
+fcvt.s.l fa0, a0 ::
+ inputs: a0=0x0000000000000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000000
+fcvt.s.l fa0, a0 ::
+ inputs: a0=0x7fffff8000000000, fcsr=0x00000000
+ output: fa0=0xffffffff5effffff, fcsr=0x00000000
+fcvt.s.l fa0, a0 ::
+ inputs: a0=0x7fffffffffffffff, fcsr=0x00000000
+ output: fa0=0xffffffff5f000000, fcsr=0x00000001
+fcvt.s.l fa0, a0 ::
+ inputs: a0=0x8000000000000000, fcsr=0x00000000
+ output: fa0=0xffffffffdf000000, fcsr=0x00000000
+fcvt.s.l fa0, a0, rne ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800000, fcsr=0x00000001
+fcvt.s.l fa0, a0, rne ::
+ inputs: a0=0x0000000001000003, fcsr=0x00000000
+ output: fa0=0xffffffff4b800002, fcsr=0x00000001
+fcvt.s.l fa0, a0, rtz ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800000, fcsr=0x00000001
+fcvt.s.l fa0, a0, rtz ::
+ inputs: a0=0xfffffffffeffffff, fcsr=0x00000000
+ output: fa0=0xffffffffcb800000, fcsr=0x00000001
+fcvt.s.l fa0, a0, rdn ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800000, fcsr=0x00000001
+fcvt.s.l fa0, a0, rdn ::
+ inputs: a0=0xfffffffffeffffff, fcsr=0x00000000
+ output: fa0=0xffffffffcb800001, fcsr=0x00000001
+fcvt.s.l fa0, a0, rup ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800001, fcsr=0x00000001
+fcvt.s.l fa0, a0, rup ::
+ inputs: a0=0xfffffffffeffffff, fcsr=0x00000000
+ output: fa0=0xffffffffcb800000, fcsr=0x00000001
+fcvt.s.l fa0, a0, rmm ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800001, fcsr=0x00000001
+fcvt.s.l fa0, a0, rmm ::
+ inputs: a0=0xfffffffffeffffff, fcsr=0x00000000
+ output: fa0=0xffffffffcb800001, fcsr=0x00000001
+fcvt.s.l fa0, a0 ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800000, fcsr=0x00000001
+fcvt.s.l fa0, a0 ::
+ inputs: a0=0x0000000001000003, fcsr=0x00000000
+ output: fa0=0xffffffff4b800002, fcsr=0x00000001
+fcvt.s.l fa0, a0 ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000020
+ output: fa0=0xffffffff4b800000, fcsr=0x00000021
+fcvt.s.l fa0, a0 ::
+ inputs: a0=0xfffffffffeffffff, fcsr=0x00000020
+ output: fa0=0xffffffffcb800000, fcsr=0x00000021
+fcvt.s.l fa0, a0 ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000040
+ output: fa0=0xffffffff4b800000, fcsr=0x00000041
+fcvt.s.l fa0, a0 ::
+ inputs: a0=0xfffffffffeffffff, fcsr=0x00000040
+ output: fa0=0xffffffffcb800001, fcsr=0x00000041
+fcvt.s.l fa0, a0 ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000060
+ output: fa0=0xffffffff4b800001, fcsr=0x00000061
+fcvt.s.l fa0, a0 ::
+ inputs: a0=0xfffffffffeffffff, fcsr=0x00000060
+ output: fa0=0xffffffffcb800000, fcsr=0x00000061
+fcvt.s.l fa0, a0 ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000080
+ output: fa0=0xffffffff4b800001, fcsr=0x00000081
+fcvt.s.l fa0, a0 ::
+ inputs: a0=0xfffffffffeffffff, fcsr=0x00000080
+ output: fa0=0xffffffffcb800001, fcsr=0x00000081
+fcvt.s.lu fa0, a0 ::
+ inputs: a0=0x0000000000000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000000
+fcvt.s.lu fa0, a0 ::
+ inputs: a0=0xffffff0000000000, fcsr=0x00000000
+ output: fa0=0xffffffff5f7fffff, fcsr=0x00000000
+fcvt.s.lu fa0, a0 ::
+ inputs: a0=0xffffffffffffffff, fcsr=0x00000000
+ output: fa0=0xffffffff5f800000, fcsr=0x00000001
+fcvt.s.lu fa0, a0, rne ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800000, fcsr=0x00000001
+fcvt.s.lu fa0, a0, rne ::
+ inputs: a0=0x0000000001000003, fcsr=0x00000000
+ output: fa0=0xffffffff4b800002, fcsr=0x00000001
+fcvt.s.lu fa0, a0, rtz ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800000, fcsr=0x00000001
+fcvt.s.lu fa0, a0, rdn ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800000, fcsr=0x00000001
+fcvt.s.lu fa0, a0, rup ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800001, fcsr=0x00000001
+fcvt.s.lu fa0, a0, rmm ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800001, fcsr=0x00000001
+fcvt.s.lu fa0, a0 ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000000
+ output: fa0=0xffffffff4b800000, fcsr=0x00000001
+fcvt.s.lu fa0, a0 ::
+ inputs: a0=0x0000000001000003, fcsr=0x00000000
+ output: fa0=0xffffffff4b800002, fcsr=0x00000001
+fcvt.s.lu fa0, a0 ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000020
+ output: fa0=0xffffffff4b800000, fcsr=0x00000021
+fcvt.s.lu fa0, a0 ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000040
+ output: fa0=0xffffffff4b800000, fcsr=0x00000041
+fcvt.s.lu fa0, a0 ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000060
+ output: fa0=0xffffffff4b800001, fcsr=0x00000061
+fcvt.s.lu fa0, a0 ::
+ inputs: a0=0x0000000001000001, fcsr=0x00000080
+ output: fa0=0xffffffff4b800001, fcsr=0x00000081
--- /dev/null
+prog: float32
+vgopts: -q
--- /dev/null
+/* Tests for the RV64D standard double-precision floating-point instruction-set
+ extension. */
+
+#include "testinst.h"
+
+static void test_float64_shared(void)
+{
+ printf("RV64D double-precision FP instruction set, shared operations\n");
+
+ /* --------------- fld rd, imm[11:0](rs1) ---------------- */
+ TESTINST_1_1_FLOAD(4, "fld fa0, 0(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "fld fa0, 4(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "fld fa0, 8(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "fld fa0, 16(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "fld fa0, 32(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "fld fa0, 64(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "fld fa0, 128(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "fld fa0, 256(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "fld fa0, 512(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "fld fa0, 1024(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "fld fa0, 2040(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "fld fa0, -4(a1)", fa0, a1);
+ TESTINST_1_1_FLOAD(4, "fld fa0, -2048(a1)", fa0, a1);
+
+ TESTINST_1_1_FLOAD(4, "fld fa4, 0(a5)", fa4, a5);
+
+ /* --------------- fsd rs2, imm[11:0](rs1) --------------- */
+ TESTINST_0_2_FSTORE(4, "fsd fa0, 0(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsd fa0, 4(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsd fa0, 8(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsd fa0, 16(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsd fa0, 32(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsd fa0, 64(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsd fa0, 128(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsd fa0, 256(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsd fa0, 512(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsd fa0, 1024(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsd fa0, 2040(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsd fa0, -4(a1)", 0xabcdef0123456789, fa0, a1);
+ TESTINST_0_2_FSTORE(4, "fsd fa0, -2048(a1)", 0xabcdef0123456789, fa0, a1);
+
+ TESTINST_0_2_FSTORE(4, "fsd fa4, 0(a5)", 0xabcdef0123456789, fa4, a5);
+
+ /* ------------ fmadd.d rd, rs1, rs2, rs3, rm ------------ */
+ /* 3.0 * 2.0 + 1.0 -> 7.0 */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3", 0x4008000000000000,
+ 0x4000000000000000, 0x3ff0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 1.0 + -1.0 -> 0.0 */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0xbff0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 2.0 * DBL_TRUE_MIN + -DBL_TRUE_MIN -> DBL_TRUE_MIN (no UF because exact)
+ */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3", 0x4000000000000000,
+ 0x0000000000000001, 0x8000000000000001, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 2.0 * DBL_MAX + -DBL_MAX -> DBL_MAX */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3", 0x4000000000000000,
+ 0x7fefffffffffffff, 0xffefffffffffffff, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 2.0 * DBL_MAX + 0.0 -> INFINITY (OF, NX) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3", 0x4000000000000000,
+ 0x7fefffffffffffff, 0x0000000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 2.0 * INFINITY + -INFINITY -> qNAN (NV) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3", 0x4000000000000000,
+ 0x7ff0000000000000, 0xfff0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+
+ /* 1.0 * 1.0 + DBL_EPSILON/2 (RNE) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3, rne", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * nextafter(1.0) + DBL_EPSILON/2 (RNE) -> 2nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3, rne", 0x3ff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 1.0 + DBL_EPSILON/2 (RTZ) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3, rtz", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 + -DBL_EPSILON/2 (RTZ) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3, rtz", 0x3ff0000000000000,
+ 0xbff0000000000000, 0xbca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 1.0 + DBL_EPSILON/2 (RDN) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3, rdn", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 + -DBL_EPSILON/2 (RDN) -> -nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3, rdn", 0x3ff0000000000000,
+ 0xbff0000000000000, 0xbca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 1.0 + DBL_EPSILON/2 (RUP) -> nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3, rup", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 + -DBL_EPSILON/2 (RUP) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3, rup", 0x3ff0000000000000,
+ 0xbff0000000000000, 0xbca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 1.0 + DBL_EPSILON/2 (RMM) -> nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3, rmm", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 + -DBL_EPSILON/2 (RMM) -> -nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3, rmm", 0x3ff0000000000000,
+ 0xbff0000000000000, 0xbca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+
+ /* 1.0 * 1.0 + DBL_EPSILON/2 (DYN-RNE) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * nextafter(1.0) + DBL_EPSILON/2 (DYN-RNE) -> 2nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 1.0 + DBL_EPSILON/2 (DYN-RTZ) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x20, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 + -DBL_EPSILON/2 (DYN-RTZ) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0xbff0000000000000, 0xbca0000000000000, 0x20, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 1.0 + DBL_EPSILON/2 (DYN-RDN) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x40, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 + -DBL_EPSILON/2 (DYN-RDN) -> -nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0xbff0000000000000, 0xbca0000000000000, 0x40, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 1.0 + DBL_EPSILON/2 (DYN-RUP) -> nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x60, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 + -DBL_EPSILON/2 (DYN-RUP) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0xbff0000000000000, 0xbca0000000000000, 0x60, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 1.0 + DBL_EPSILON/2 (DYN-RMM) -> nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x80, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 + -DBL_EPSILON/2 (DYN-RMM) -> -nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmadd.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0xbff0000000000000, 0xbca0000000000000, 0x80, fa0, fa1, fa2,
+ fa3);
+
+ /* ------------ fmsub.d rd, rs1, rs2, rs3, rm ------------ */
+ /* 3.0 * 2.0 - 1.0 -> 5.0 */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3", 0x4008000000000000,
+ 0x4000000000000000, 0x3ff0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 1.0 - 1.0 -> 0.0 */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x3ff0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 2.0 * DBL_TRUE_MIN - DBL_TRUE_MIN -> DBL_TRUE_MIN (no UF because exact)
+ */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3", 0x4000000000000000,
+ 0x0000000000000001, 0x0000000000000001, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 2.0 * DBL_MAX - DBL_MAX -> DBL_MAX */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3", 0x4000000000000000,
+ 0x7fefffffffffffff, 0x7fefffffffffffff, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 2.0 * DBL_MAX - 0.0 -> INFINITY (OF, NX) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3", 0x4000000000000000,
+ 0x7fefffffffffffff, 0x0000000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 2.0 * INFINITY - INFINITY -> qNAN (NV) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3", 0x4000000000000000,
+ 0x7ff0000000000000, 0x7ff0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+
+ /* 1.0 * nextafter(1.0) - DBL_EPSILON/2 (RNE) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3, rne", 0x3ff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 2nextafter(1.0) - DBL_EPSILON/2 (RNE) -> 2nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3, rne", 0x3ff0000000000000,
+ 0x3ff0000000000002, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * nextafter(1.0) - DBL_EPSILON/2 (RTZ) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3, rtz", 0x3ff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 - DBL_EPSILON/2 (RTZ) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3, rtz", 0x3ff0000000000000,
+ 0xbff0000000000000, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * nextafter(1.0) - DBL_EPSILON/2 (RDN) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3, rdn", 0x3ff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 - DBL_EPSILON/2 (RDN) -> -nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3, rdn", 0x3ff0000000000000,
+ 0xbff0000000000000, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * nextafter(1.0) - DBL_EPSILON/2 (RUP) -> nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3, rup", 0x3ff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 - DBL_EPSILON/2 (RUP) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3, rup", 0x3ff0000000000000,
+ 0xbff0000000000000, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * nextafter(1.0) - DBL_EPSILON/2 (RMM) -> nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3, rmm", 0x3ff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 - DBL_EPSILON/2 (RMM) -> -nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3, rmm", 0x3ff0000000000000,
+ 0xbff0000000000000, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+
+ /* 1.0 * nextafter(1.0) - DBL_EPSILON/2 (DYN-RNE) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * 2nextafter(1.0) - DBL_EPSILON/2 (DYN-RNE) -> 2nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000002, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * nextafter(1.0) - DBL_EPSILON/2 (DYN-RTZ) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x20, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 - DBL_EPSILON/2 (DYN-RTZ) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0xbff0000000000000, 0x3ca0000000000000, 0x20, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * nextafter(1.0) - DBL_EPSILON/2 (DYN-RDN) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x40, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 - DBL_EPSILON/2 (DYN-RDN) -> -nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0xbff0000000000000, 0x3ca0000000000000, 0x40, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * nextafter(1.0) - DBL_EPSILON/2 (DYN-RUP) -> nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x60, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 - DBL_EPSILON/2 (DYN-RUP) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0xbff0000000000000, 0x3ca0000000000000, 0x60, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * nextafter(1.0) - DBL_EPSILON/2 (DYN-RMM) -> nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x80, fa0, fa1, fa2,
+ fa3);
+ /* 1.0 * -1.0 - DBL_EPSILON/2 (DYN-RMM) -> -nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fmsub.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0xbff0000000000000, 0x3ca0000000000000, 0x80, fa0, fa1, fa2,
+ fa3);
+
+ /* ----------- fnmsub.d rd, rs1, rs2, rs3, rm ------------ */
+ /* -(3.0 * 2.0) + 1.0 -> -5.0 */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3", 0x4008000000000000,
+ 0x4000000000000000, 0x3ff0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) + 1.0 -> 0.0 */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x3ff0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(2.0 * DBL_TRUE_MIN) + DBL_TRUE_MIN -> -DBL_TRUE_MIN (no UF because
+ exact) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3", 0x4000000000000000,
+ 0x0000000000000001, 0x0000000000000001, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(2.0 * DBL_MAX) + DBL_MAX -> -DBL_MAX */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3", 0x4000000000000000,
+ 0x7fefffffffffffff, 0x7fefffffffffffff, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(2.0 * DBL_MAX) + 0.0 -> -INFINITY (OF, NX) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3", 0x4000000000000000,
+ 0x7fefffffffffffff, 0x0000000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(2.0 * INFINITY) + INFINITY -> qNAN (NV) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3", 0x4000000000000000,
+ 0x7ff0000000000000, 0x7ff0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+
+ /* -(-1.0 * 1.0) + DBL_EPSILON/2 (RNE) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3, rne", 0xbff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * nextafter(1.0)) + DBL_EPSILON/2 (RNE) -> 2nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3, rne", 0xbff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * 1.0) + DBL_EPSILON/2 (RTZ) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3, rtz", 0xbff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) + -DBL_EPSILON/2 (RTZ) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3, rtz", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0xbca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * 1.0) + DBL_EPSILON/2 (RDN) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3, rdn", 0xbff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) + -DBL_EPSILON/2 (RDN) -> -nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3, rdn", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0xbca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * 1.0) + DBL_EPSILON/2 (RUP) -> nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3, rup", 0xbff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) + -DBL_EPSILON/2 (RUP) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3, rup", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0xbca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * 1.0) + DBL_EPSILON/2 (RMM) -> nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3, rmm", 0xbff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) + -DBL_EPSILON/2 (RMM) -> -nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3, rmm", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0xbca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+
+ /* -(-1.0 * 1.0) + DBL_EPSILON/2 (DYN-RNE) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3", 0xbff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * nextafter(1.0)) + DBL_EPSILON/2 (DYN-RNE) -> 2nextafter(1.0) (NX)
+ */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3", 0xbff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * 1.0) + DBL_EPSILON/2 (DYN-RTZ) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3", 0xbff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x20, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) + -DBL_EPSILON/2 (DYN-RTZ) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0xbca0000000000000, 0x20, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * 1.0) + DBL_EPSILON/2 (DYN-RDN) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3", 0xbff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x40, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) + -DBL_EPSILON/2 (DYN-RDN) -> -nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0xbca0000000000000, 0x40, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * 1.0) + DBL_EPSILON/2 (DYN-RUP) -> nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3", 0xbff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x60, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) + -DBL_EPSILON/2 (DYN-RUP) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0xbca0000000000000, 0x60, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * 1.0) + DBL_EPSILON/2 (DYN-RMM) -> nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3", 0xbff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x80, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) + -DBL_EPSILON/2 (DYN-RMM) -> -nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmsub.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0xbca0000000000000, 0x80, fa0, fa1, fa2,
+ fa3);
+
+ /* ----------- fnmadd.d rd, rs1, rs2, rs3, rm ------------ */
+ /* -(3.0 * 2.0) - 1.0 -> -7.0 */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3", 0x4008000000000000,
+ 0x4000000000000000, 0x3ff0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) - -1.0 -> 0.0 */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0xbff0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(2.0 * DBL_TRUE_MIN) - -DBL_TRUE_MIN -> -DBL_TRUE_MIN (no UF because
+ exact) */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3", 0x4000000000000000,
+ 0x0000000000000001, 0x8000000000000001, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(2.0 * DBL_MAX) - -DBL_MAX -> -DBL_MAX */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3", 0x4000000000000000,
+ 0x7fefffffffffffff, 0xffefffffffffffff, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(2.0 * DBL_MAX) - 0.0 -> -INFINITY (OF, NX) */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3", 0x4000000000000000,
+ 0x7fefffffffffffff, 0x0000000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(2.0 * INFINITY) - -INFINITY -> qNAN (NV) */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3", 0x4000000000000000,
+ 0x7ff0000000000000, 0xfff0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+
+ /* -(-1.0 * nextafter(1.0)) - DBL_EPSILON/2 (RNE) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3, rne", 0xbff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * 2nextafter(1.0)) - DBL_EPSILON/2 (RNE) -> 2nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3, rne", 0xbff0000000000000,
+ 0x3ff0000000000002, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * nextafter(1.0)) - DBL_EPSILON/2 (RTZ) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3, rtz", 0xbff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) - DBL_EPSILON/2 (RTZ) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3, rtz", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * nextafter(1.0)) - DBL_EPSILON/2 (RDN) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3, rdn", 0xbff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) - DBL_EPSILON/2 (RDN) -> -nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3, rdn", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * nextafter(1.0)) - DBL_EPSILON/2 (RUP) -> nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3, rup", 0xbff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) - DBL_EPSILON/2 (RUP) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3, rup", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * nextafter(1.0)) - DBL_EPSILON/2 (RMM) -> nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3, rmm", 0xbff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) - DBL_EPSILON/2 (RMM) -> -nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3, rmm", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+
+ /* -(-1.0 * nextafter(1.0)) - DBL_EPSILON/2 (DYN-RNE) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3", 0xbff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * 2nextafter(1.0)) - DBL_EPSILON/2 (DYN-RNE) -> 2nextafter(1.0)
+ (NX) */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3", 0xbff0000000000000,
+ 0x3ff0000000000002, 0x3ca0000000000000, 0x00, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * nextafter(1.0)) - DBL_EPSILON/2 (DYN-RTZ) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3", 0xbff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x20, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) - DBL_EPSILON/2 (DYN-RTZ) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x20, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * nextafter(1.0)) - DBL_EPSILON/2 (DYN-RDN) -> 1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3", 0xbff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x40, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) - DBL_EPSILON/2 (DYN-RDN) -> -nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x40, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * nextafter(1.0)) - DBL_EPSILON/2 (DYN-RUP) -> nextafter(1.0) (NX)
+ */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3", 0xbff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x60, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) - DBL_EPSILON/2 (DYN-RUP) -> -1.0 (NX) */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x60, fa0, fa1, fa2,
+ fa3);
+ /* -(-1.0 * nextafter(1.0)) - DBL_EPSILON/2 (DYN-RMM) -> nextafter(1.0) (NX)
+ */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3", 0xbff0000000000000,
+ 0x3ff0000000000001, 0x3ca0000000000000, 0x80, fa0, fa1, fa2,
+ fa3);
+ /* -(1.0 * 1.0) - DBL_EPSILON/2 (DYN-RMM) -> -nextafter(1.0) (NX) */
+ TESTINST_1_3_F(4, "fnmadd.d fa0, fa1, fa2, fa3", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x3ca0000000000000, 0x80, fa0, fa1, fa2,
+ fa3);
+
+ /* --------------- fadd.d rd, rs1, rs2, rm --------------- */
+ /* 2.0 + 1.0 -> 3.0 */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2", 0x4000000000000000,
+ 0x3ff0000000000000, 0x00, fa0, fa1, fa2);
+ /* 1.0 + -1.0 -> 0.0 */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2", 0x3ff0000000000000,
+ 0xbff0000000000000, 0x00, fa0, fa1, fa2);
+ /* DBL_TRUE_MIN + DBL_TRUE_MIN -> 2*DBL_TRUE_MIN (no UF because exact) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2", 0x0000000000000001,
+ 0x0000000000000001, 0x00, fa0, fa1, fa2);
+ /* DBL_MAX + DBL_MAX -> INFINITY (OF, NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2", 0x7fefffffffffffff,
+ 0x7fefffffffffffff, 0x00, fa0, fa1, fa2);
+ /* -DBL_MAX + -DBL_MAX -> -INFINITY (OF, NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2", 0xffefffffffffffff,
+ 0xffefffffffffffff, 0x00, fa0, fa1, fa2);
+ /* nextafter(DBL_MIN) + -DBL_MIN -> DBL_TRUE_MIN (no UF because exact) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2", 0x0010000000000001,
+ 0x8010000000000000, 0x00, fa0, fa1, fa2);
+ /* INFINITY + -INFINITY -> qNAN (NV) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2", 0x7ff0000000000000,
+ 0xfff0000000000000, 0x00, fa0, fa1, fa2);
+
+ /* 1.0 + DBL_EPSILON/2 (RNE) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2, rne", 0x3ff0000000000000,
+ 0x3ca0000000000000, 0x00, fa0, fa1, fa2);
+ /* nextafter(1.0) + DBL_EPSILON/2 (RNE) -> 2nextafter(1.0) (NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2, rne", 0x3ff0000000000001,
+ 0x3ca0000000000000, 0x00, fa0, fa1, fa2);
+ /* 1.0 + DBL_EPSILON/2 (RTZ) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2, rtz", 0x3ff0000000000000,
+ 0x3ca0000000000000, 0x00, fa0, fa1, fa2);
+ /* -1.0 + -DBL_EPSILON/2 (RTZ) -> -1.0 (NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2, rtz", 0xbff0000000000000,
+ 0xbca0000000000000, 0x00, fa0, fa1, fa2);
+ /* 1.0 + DBL_EPSILON/2 (RDN) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2, rdn", 0x3ff0000000000000,
+ 0x3ca0000000000000, 0x00, fa0, fa1, fa2);
+ /* -1.0 + -DBL_EPSILON/2 (RDN) -> -nextafter(1.0) (NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2, rdn", 0xbff0000000000000,
+ 0xbca0000000000000, 0x00, fa0, fa1, fa2);
+ /* 1.0 + DBL_EPSILON/2 (RUP) -> nextafter(1.0) (NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2, rup", 0x3ff0000000000000,
+ 0x3ca0000000000000, 0x00, fa0, fa1, fa2);
+ /* -1.0 + -DBL_EPSILON/2 (RUP) -> -1.0 (NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2, rup", 0xbff0000000000000,
+ 0xbca0000000000000, 0x00, fa0, fa1, fa2);
+ /* 1.0 + DBL_EPSILON/2 (RMM) -> nextafter(1.0) (NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2, rmm", 0x3ff0000000000000,
+ 0x3ca0000000000000, 0x00, fa0, fa1, fa2);
+ /* -1.0 + -DBL_EPSILON/2 (RMM) -> -nextafter(1.0) (NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2, rmm", 0xbff0000000000000,
+ 0xbca0000000000000, 0x00, fa0, fa1, fa2);
+
+ /* 1.0 + DBL_EPSILON/2 (DYN-RNE) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2", 0x3ff0000000000000,
+ 0x3ca0000000000000, 0x00, fa0, fa1, fa2);
+ /* nextafter(1.0) + DBL_EPSILON/2 (DYN-RNE) -> 2nextafter(1.0) (NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2", 0x3ff0000000000001,
+ 0x3ca0000000000000, 0x00, fa0, fa1, fa2);
+ /* 1.0 + DBL_EPSILON/2 (DYN-RTZ) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2", 0x3ff0000000000000,
+ 0x3ca0000000000000, 0x20, fa0, fa1, fa2);
+ /* -1.0 + -DBL_EPSILON/2 (DYN-RTZ) -> -1.0 (NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2", 0xbff0000000000000,
+ 0xbca0000000000000, 0x20, fa0, fa1, fa2);
+ /* 1.0 + DBL_EPSILON/2 (DYN-RDN) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2", 0x3ff0000000000000,
+ 0x3ca0000000000000, 0x40, fa0, fa1, fa2);
+ /* -1.0 + -DBL_EPSILON/2 (DYN-RDN) -> -nextafter(1.0) (NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2", 0xbff0000000000000,
+ 0xbca0000000000000, 0x40, fa0, fa1, fa2);
+ /* 1.0 + DBL_EPSILON/2 (DYN-RUP) -> nextafter(1.0) (NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2", 0x3ff0000000000000,
+ 0x3ca0000000000000, 0x60, fa0, fa1, fa2);
+ /* -1.0 + -DBL_EPSILON/2 (DYN-RUP) -> -1.0 (NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2", 0xbff0000000000000,
+ 0xbca0000000000000, 0x60, fa0, fa1, fa2);
+ /* 1.0 + DBL_EPSILON/2 (DYN-RMM) -> nextafter(1.0) (NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2", 0x3ff0000000000000,
+ 0x3ca0000000000000, 0x80, fa0, fa1, fa2);
+ /* -1.0 + -DBL_EPSILON/2 (DYN-RMM) -> -nextafter(1.0) (NX) */
+ TESTINST_1_2_F(4, "fadd.d fa0, fa1, fa2", 0xbff0000000000000,
+ 0xbca0000000000000, 0x80, fa0, fa1, fa2);
+
+ /* --------------- fsub.d rd, rs1, rs2, rm --------------- */
+ /* 2.0 - 1.0 -> 1.0 */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2", 0x4000000000000000,
+ 0x3ff0000000000000, 0x00, fa0, fa1, fa2);
+ /* 1.0 - 1.0 -> 0.0 */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x00, fa0, fa1, fa2);
+ /* DBL_TRUE_MIN - -DBL_TRUE_MIN -> 2*DBL_TRUE_MIN (no UF because exact) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2", 0x0000000000000001,
+ 0x8000000000000001, 0x00, fa0, fa1, fa2);
+ /* DBL_MAX - -DBL_MAX -> INFINITY (OF, NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2", 0x7fefffffffffffff,
+ 0xffefffffffffffff, 0x00, fa0, fa1, fa2);
+ /* -DBL_MAX - DBL_MAX -> -INFINITY (OF, NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2", 0xffefffffffffffff,
+ 0x7fefffffffffffff, 0x00, fa0, fa1, fa2);
+ /* nextafter(DBL_MIN) - DBL_MIN -> DBL_TRUE_MIN (no UF because exact) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2", 0x0010000000000001,
+ 0x0010000000000000, 0x00, fa0, fa1, fa2);
+ /* INFINITY - INFINITY -> qNAN (NV) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2", 0x7ff0000000000000,
+ 0x7ff0000000000000, 0x00, fa0, fa1, fa2);
+
+ /* nextafter(1.0) - DBL_EPSILON/2 (RNE) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2, rne", 0x3ff0000000000001,
+ 0x3ca0000000000000, 0x00, fa0, fa1, fa2);
+ /* 2nextafter(1.0) - DBL_EPSILON/2 (RNE) -> 2nextafter(1.0) (NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2, rne", 0x3ff0000000000002,
+ 0x3ca0000000000000, 0x00, fa0, fa1, fa2);
+ /* nextafter(1.0) - DBL_EPSILON/2 (RTZ) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2, rtz", 0x3ff0000000000001,
+ 0x3ca0000000000000, 0x00, fa0, fa1, fa2);
+ /* -1.0 - DBL_EPSILON/2 (RTZ) -> -1.0 (NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2, rtz", 0xbff0000000000000,
+ 0x3ca0000000000000, 0x00, fa0, fa1, fa2);
+ /* nextafter(1.0) - DBL_EPSILON/2 (RDN) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2, rdn", 0x3ff0000000000001,
+ 0x3ca0000000000000, 0x00, fa0, fa1, fa2);
+ /* -1.0 - DBL_EPSILON/2 (RDN) -> -nextafter(1.0) (NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2, rdn", 0xbff0000000000000,
+ 0x3ca0000000000000, 0x00, fa0, fa1, fa2);
+ /* nextafter(1.0) - DBL_EPSILON/2 (RUP) -> nextafter(1.0) (NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2, rup", 0x3ff0000000000001,
+ 0x3ca0000000000000, 0x00, fa0, fa1, fa2);
+ /* -1.0 - DBL_EPSILON/2 (RUP) -> -1.0 (NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2, rup", 0xbff0000000000000,
+ 0x3ca0000000000000, 0x00, fa0, fa1, fa2);
+ /* nextafter(1.0) - DBL_EPSILON/2 (RMM) -> nextafter(1.0) (NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2, rmm", 0x3ff0000000000001,
+ 0x3ca0000000000000, 0x00, fa0, fa1, fa2);
+ /* -1.0 - DBL_EPSILON/2 (RMM) -> -nextafter(1.0) (NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2, rmm", 0xbff0000000000000,
+ 0x3ca0000000000000, 0x00, fa0, fa1, fa2);
+
+ /* nextafter(1.0) - DBL_EPSILON/2 (DYN-RNE) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2", 0x3ff0000000000001,
+ 0x3ca0000000000000, 0x00, fa0, fa1, fa2);
+ /* 2nextafter(1.0) - DBL_EPSILON/2 (DYN-RNE) -> 2nextafter(1.0) (NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2", 0x3ff0000000000002,
+ 0x3ca0000000000000, 0x00, fa0, fa1, fa2);
+ /* nextafter(1.0) - DBL_EPSILON/2 (DYN-RTZ) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2", 0x3ff0000000000001,
+ 0x3ca0000000000000, 0x20, fa0, fa1, fa2);
+ /* -1.0 - DBL_EPSILON/2 (DYN-RTZ) -> -1.0 (NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2", 0xbff0000000000000,
+ 0x3ca0000000000000, 0x20, fa0, fa1, fa2);
+ /* nextafter(1.0) - DBL_EPSILON/2 (DYN-RDN) -> 1.0 (NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2", 0x3ff0000000000001,
+ 0x3ca0000000000000, 0x40, fa0, fa1, fa2);
+ /* -1.0 - DBL_EPSILON/2 (DYN-RDN) -> -nextafter(1.0) (NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2", 0xbff0000000000000,
+ 0x3ca0000000000000, 0x40, fa0, fa1, fa2);
+ /* nextafter(1.0) - DBL_EPSILON/2 (DYN-RUP) -> nextafter(1.0) (NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2", 0x3ff0000000000001,
+ 0x3ca0000000000000, 0x60, fa0, fa1, fa2);
+ /* -1.0 - DBL_EPSILON/2 (DYN-RUP) -> -1.0 (NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2", 0xbff0000000000000,
+ 0x3ca0000000000000, 0x60, fa0, fa1, fa2);
+ /* nextafter(1.0) - DBL_EPSILON/2 (DYN-RMM) -> nextafter(1.0) (NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2", 0x3ff0000000000001,
+ 0x3ca0000000000000, 0x80, fa0, fa1, fa2);
+ /* -1.0 - DBL_EPSILON/2 (DYN-RMM) -> -nextafter(1.0) (NX) */
+ TESTINST_1_2_F(4, "fsub.d fa0, fa1, fa2", 0xbff0000000000000,
+ 0x3ca0000000000000, 0x80, fa0, fa1, fa2);
+
+ /* --------------- fmul.d rd, rs1, rs2, rm --------------- */
+ /* 2.0 * 1.0 -> 2.0 */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2", 0x4000000000000000,
+ 0x3ff0000000000000, 0x00, fa0, fa1, fa2);
+ /* 1.0 * 0.0 -> 0.0 */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2", 0x3ff0000000000000,
+ 0x0000000000000000, 0x00, fa0, fa1, fa2);
+ /* 2**-537 * 2**-537 -> 2**-1074 aka DBL_TRUE_MIN (no UF because exact) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2", 0x1e60000000000000,
+ 0x1e60000000000000, 0x00, fa0, fa1, fa2);
+ /* DBL_MAX * DBL_MAX -> INFINITY (OF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2", 0x7fefffffffffffff,
+ 0x7fefffffffffffff, 0x00, fa0, fa1, fa2);
+ /* DBL_MAX * -DBL_MAX -> -INFINITY (OF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2", 0x7fefffffffffffff,
+ 0xffefffffffffffff, 0x00, fa0, fa1, fa2);
+ /* 1.0 * INFINITY -> INFINITY */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2", 0x3ff0000000000000,
+ 0x7ff0000000000000, 0x00, fa0, fa1, fa2);
+ /* 0.0 * INFINITY -> qNAN (NV) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2", 0x0000000000000000,
+ 0x7ff0000000000000, 0x00, fa0, fa1, fa2);
+
+ /* DBL_TRUE_MIN * 0.5 (RNE) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2, rne", 0x0000000000000001,
+ 0x3fe0000000000000, 0x00, fa0, fa1, fa2);
+ /* 3*DBL_TRUE_MIN * 0.5 (RNE) -> 2*DBL_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2, rne", 0x0000000000000003,
+ 0x3fe0000000000000, 0x00, fa0, fa1, fa2);
+ /* DBL_TRUE_MIN * 0.5 (RTZ) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2, rtz", 0x0000000000000001,
+ 0x3fe0000000000000, 0x00, fa0, fa1, fa2);
+ /* -DBL_TRUE_MIN * 0.5 (RTZ) -> -0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2, rtz", 0x8000000000000001,
+ 0x3fe0000000000000, 0x00, fa0, fa1, fa2);
+ /* DBL_TRUE_MIN * 0.5 (RDN) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2, rdn", 0x0000000000000001,
+ 0x3fe0000000000000, 0x00, fa0, fa1, fa2);
+ /* -DBL_TRUE_MIN * 0.5 (RDN) -> -DBL_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2, rdn", 0x8000000000000001,
+ 0x3fe0000000000000, 0x00, fa0, fa1, fa2);
+ /* DBL_TRUE_MIN * 0.5 (RUP) -> DBL_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2, rup", 0x0000000000000001,
+ 0x3fe0000000000000, 0x00, fa0, fa1, fa2);
+ /* -DBL_TRUE_MIN * 0.5 (RUP) -> -0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2, rup", 0x8000000000000001,
+ 0x3fe0000000000000, 0x00, fa0, fa1, fa2);
+ /* DBL_TRUE_MIN * 0.5 (RMM) -> DBL_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2, rmm", 0x0000000000000001,
+ 0x3fe0000000000000, 0x00, fa0, fa1, fa2);
+ /* -DBL_TRUE_MIN * 0.5 (RMM) -> -DBL_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2, rmm", 0x8000000000000001,
+ 0x3fe0000000000000, 0x00, fa0, fa1, fa2);
+
+ /* DBL_TRUE_MIN * 0.5 (DYN-RNE) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2", 0x0000000000000001,
+ 0x3fe0000000000000, 0x00, fa0, fa1, fa2);
+ /* 3*DBL_TRUE_MIN * 0.5 (DYN-RNE) -> 2*DBL_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2", 0x0000000000000003,
+ 0x3fe0000000000000, 0x00, fa0, fa1, fa2);
+ /* DBL_TRUE_MIN * 0.5 (DYN-RTZ) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2", 0x0000000000000001,
+ 0x3fe0000000000000, 0x20, fa0, fa1, fa2);
+ /* -DBL_TRUE_MIN * 0.5 (DYN-RTZ) -> -0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2", 0x8000000000000001,
+ 0x3fe0000000000000, 0x20, fa0, fa1, fa2);
+ /* DBL_TRUE_MIN * 0.5 (DYN-RDN) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2", 0x0000000000000001,
+ 0x3fe0000000000000, 0x40, fa0, fa1, fa2);
+ /* -DBL_TRUE_MIN * 0.5 (DYN-RDN) -> -DBL_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2", 0x8000000000000001,
+ 0x3fe0000000000000, 0x40, fa0, fa1, fa2);
+ /* DBL_TRUE_MIN * 0.5 (DYN-RUP) -> DBL_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2", 0x0000000000000001,
+ 0x3fe0000000000000, 0x60, fa0, fa1, fa2);
+ /* -DBL_TRUE_MIN * 0.5 (DYN-RUP) -> -0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2", 0x8000000000000001,
+ 0x3fe0000000000000, 0x60, fa0, fa1, fa2);
+ /* DBL_TRUE_MIN * 0.5 (DYN-RMM) -> DBL_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2", 0x0000000000000001,
+ 0x3fe0000000000000, 0x80, fa0, fa1, fa2);
+ /* -DBL_TRUE_MIN * 0.5 (DYN-RMM) -> -DBL_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fmul.d fa0, fa1, fa2", 0x8000000000000001,
+ 0x3fe0000000000000, 0x80, fa0, fa1, fa2);
+
+ /* --------------- fdiv.d rd, rs1, rs2, rm --------------- */
+ /* 2.0 / 1.0 -> 2.0 */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2", 0x4000000000000000,
+ 0x3ff0000000000000, 0x00, fa0, fa1, fa2);
+ /* 0.0 / 1.0 -> 0.0 */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2", 0x0000000000000000,
+ 0x3ff0000000000000, 0x00, fa0, fa1, fa2);
+ /* 1.0 / 2**1023 -> 1**-1023 (no UF because exact) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2", 0x3ff0000000000000,
+ 0x7fe0000000000000, 0x00, fa0, fa1, fa2);
+ /* DBL_MAX / 0.5 -> INFINITY (OF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2", 0x7fefffffffffffff,
+ 0x3fe0000000000000, 0x00, fa0, fa1, fa2);
+ /* DBL_MAX / -0.5 -> -INFINITY (OF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2", 0x7fefffffffffffff,
+ 0xbfe0000000000000, 0x00, fa0, fa1, fa2);
+ /* 1.0 / INFINITY -> 0.0 */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2", 0x3ff0000000000000,
+ 0x7ff0000000000000, 0x00, fa0, fa1, fa2);
+ /* 1.0 / 0.0 -> INFINITY (DZ) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2", 0x3ff0000000000000,
+ 0x0000000000000000, 0x00, fa0, fa1, fa2);
+ /* 0.0 / 0.0 -> qNAN (NV) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2", 0x0000000000000000,
+ 0x0000000000000000, 0x00, fa0, fa1, fa2);
+
+ /* DBL_TRUE_MIN / 2.0 (RNE) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2, rne", 0x0000000000000001,
+ 0x4000000000000000, 0x00, fa0, fa1, fa2);
+ /* 3*DBL_TRUE_MIN / 2.0 (RNE) -> 2*DBL_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2, rne", 0x0000000000000003,
+ 0x4000000000000000, 0x00, fa0, fa1, fa2);
+ /* DBL_TRUE_MIN / 2.0 (RTZ) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2, rtz", 0x0000000000000001,
+ 0x4000000000000000, 0x00, fa0, fa1, fa2);
+ /* -DBL_TRUE_MIN / 2.0 (RTZ) -> -0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2, rtz", 0x8000000000000001,
+ 0x4000000000000000, 0x00, fa0, fa1, fa2);
+ /* DBL_TRUE_MIN / 2.0 (RDN) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2, rdn", 0x0000000000000001,
+ 0x4000000000000000, 0x00, fa0, fa1, fa2);
+ /* -DBL_TRUE_MIN / 2.0 (RDN) -> -DBL_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2, rdn", 0x8000000000000001,
+ 0x4000000000000000, 0x00, fa0, fa1, fa2);
+ /* DBL_TRUE_MIN / 2.0 (RUP) -> DBL_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2, rup", 0x0000000000000001,
+ 0x4000000000000000, 0x00, fa0, fa1, fa2);
+ /* -DBL_TRUE_MIN / 2.0 (RUP) -> -0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2, rup", 0x8000000000000001,
+ 0x4000000000000000, 0x00, fa0, fa1, fa2);
+ /* DBL_TRUE_MIN / 2.0 (RMM) -> DBL_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2, rmm", 0x0000000000000001,
+ 0x4000000000000000, 0x00, fa0, fa1, fa2);
+ /* -DBL_TRUE_MIN / 2.0 (RMM) -> -DBL_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2, rmm", 0x8000000000000001,
+ 0x4000000000000000, 0x00, fa0, fa1, fa2);
+
+ /* DBL_TRUE_MIN / 2.0 (DYN-RNE) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2", 0x0000000000000001,
+ 0x4000000000000000, 0x00, fa0, fa1, fa2);
+ /* 3*DBL_TRUE_MIN / 2.0 (DYN-RNE) -> 2*DBL_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2", 0x0000000000000003,
+ 0x4000000000000000, 0x00, fa0, fa1, fa2);
+ /* DBL_TRUE_MIN / 2.0 (DYN-RTZ) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2", 0x0000000000000001,
+ 0x4000000000000000, 0x20, fa0, fa1, fa2);
+ /* -DBL_TRUE_MIN / 2.0 (DYN-RTZ) -> -0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2", 0x8000000000000001,
+ 0x4000000000000000, 0x20, fa0, fa1, fa2);
+ /* DBL_TRUE_MIN / 2.0 (DYN-RDN) -> 0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2", 0x0000000000000001,
+ 0x4000000000000000, 0x40, fa0, fa1, fa2);
+ /* -DBL_TRUE_MIN / 2.0 (DYN-RDN) -> -DBL_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2", 0x8000000000000001,
+ 0x4000000000000000, 0x40, fa0, fa1, fa2);
+ /* DBL_TRUE_MIN / 2.0 (DYN-RUP) -> DBL_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2", 0x0000000000000001,
+ 0x4000000000000000, 0x60, fa0, fa1, fa2);
+ /* -DBL_TRUE_MIN / 2.0 (DYN-RUP) -> -0.0 (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2", 0x8000000000000001,
+ 0x4000000000000000, 0x60, fa0, fa1, fa2);
+ /* DBL_TRUE_MIN / 2.0 (DYN-RMM) -> DBL_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2", 0x0000000000000001,
+ 0x4000000000000000, 0x80, fa0, fa1, fa2);
+ /* -DBL_TRUE_MIN / 2.0 (DYN-RMM) -> -DBL_TRUE_MIN (UF, NX) */
+ TESTINST_1_2_F(4, "fdiv.d fa0, fa1, fa2", 0x8000000000000001,
+ 0x4000000000000000, 0x80, fa0, fa1, fa2);
+
+ /* ----------------- fsqrt.d rd, rs1, rm ----------------- */
+ /* sqrt(0.0) -> 0.0 */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1", 0x0000000000000000, 0x00, fa0, fa1);
+ /* sqrt(INFINITY) -> INFINITY */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1", 0x7ff0000000000000, 0x00, fa0, fa1);
+ /* sqrt(DBL_TRUE_MIN) -> 2**-537 */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1", 0x0000000000000001, 0x00, fa0, fa1);
+ /* sqrt(qNAN) -> qNAN */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1", 0x7ff8000000000000, 0x00, fa0, fa1);
+ /* sqrt(-1.0) -> qNAN (NV) */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1", 0xbff0000000000000, 0x00, fa0, fa1);
+
+ /* sqrt(nextafter(1.0)) (RNE) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1, rne", 0x3ff0000000000001, 0x00, fa0,
+ fa1);
+ /* sqrt(2nextafter(1.0)) (RNE) -> nextafter(1.0) (NX) */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1, rne", 0x3ff0000000000002, 0x00, fa0,
+ fa1);
+ /* sqrt(nextafter(1.0)) (RTZ) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1, rtz", 0x3ff0000000000001, 0x00, fa0,
+ fa1);
+ /* sqrt(2nextafter(1.0)) (RTZ) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1, rtz", 0x3ff0000000000002, 0x00, fa0,
+ fa1);
+ /* sqrt(nextafter(1.0)) (RDN) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1, rdn", 0x3ff0000000000001, 0x00, fa0,
+ fa1);
+ /* sqrt(2nextafter(1.0)) (RDN) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1, rdn", 0x3ff0000000000002, 0x00, fa0,
+ fa1);
+ /* sqrt(nextafter(1.0)) (RUP) -> nextafter(1.0) (NX) */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1, rup", 0x3ff0000000000001, 0x00, fa0,
+ fa1);
+ /* sqrt(2nextafter(1.0)) (RUP) -> nextafter(1.0) (NX) */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1, rup", 0x3ff0000000000002, 0x00, fa0,
+ fa1);
+ /* sqrt(nextafter(1.0)) (RMM) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1, rmm", 0x3ff0000000000001, 0x00, fa0,
+ fa1);
+ /* sqrt(2nextafter(1.0)) (RMM) -> nextafter(1.0) (NX) */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1, rmm", 0x3ff0000000000002, 0x00, fa0,
+ fa1);
+
+ /* sqrt(nextafter(1.0)) (DYN-RNE) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1", 0x3ff0000000000001, 0x00, fa0, fa1);
+ /* sqrt(2nextafter(1.0)) (DYN-RNE) -> nextafter(1.0) (NX) */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1", 0x3ff0000000000002, 0x00, fa0, fa1);
+ /* sqrt(nextafter(1.0)) (DYN-RTZ) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1", 0x3ff0000000000001, 0x20, fa0, fa1);
+ /* sqrt(2nextafter(1.0)) (DYN-RTZ) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1", 0x3ff0000000000002, 0x20, fa0, fa1);
+ /* sqrt(nextafter(1.0)) (DYN-RDN) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1", 0x3ff0000000000001, 0x40, fa0, fa1);
+ /* sqrt(2nextafter(1.0)) (DYN-RDN) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1", 0x3ff0000000000002, 0x40, fa0, fa1);
+ /* sqrt(nextafter(1.0)) (DYN-RUP) -> nextafter(1.0) (NX) */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1", 0x3ff0000000000001, 0x60, fa0, fa1);
+ /* sqrt(2nextafter(1.0)) (DYN-RUP) -> nextafter(1.0) (NX) */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1", 0x3ff0000000000002, 0x60, fa0, fa1);
+ /* sqrt(nextafter(1.0)) (DYN-RMM) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1", 0x3ff0000000000001, 0x80, fa0, fa1);
+ /* sqrt(2nextafter(1.0)) (DYN-RMM) -> nextafter(1.0) (NX) */
+ TESTINST_1_1_F(4, "fsqrt.d fa0, fa1", 0x3ff0000000000002, 0x80, fa0, fa1);
+
+ /* ---------------- fsgnj.d rd, rs1, rs2 ----------------- */
+ /* fmv.d rd, rs1 */
+ TESTINST_1_2_F(4, "fsgnj.d fa0, fa1, fa1", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x00, fa0, fa1, fa1);
+ TESTINST_1_2_F(4, "fsgnj.d fa0, fa1, fa1", 0xbff0000000000000,
+ 0xbff0000000000000, 0x00, fa0, fa1, fa1);
+
+ /* fsgnj(1.0, +) -> 1.0 */
+ TESTINST_1_2_F(4, "fsgnj.d fa0, fa1, fa2", 0x3ff0000000000000,
+ 0x7fffffffffffffff, 0x00, fa0, fa1, fa2);
+ /* fsgnj(1.0, -) -> -1.0 */
+ TESTINST_1_2_F(4, "fsgnj.d fa0, fa1, fa2", 0x3ff0000000000000,
+ 0x8000000000000000, 0x00, fa0, fa1, fa2);
+ /* fsgnj(-1.0, +) -> 1.0 */
+ TESTINST_1_2_F(4, "fsgnj.d fa0, fa1, fa2", 0xbff0000000000000,
+ 0x7fffffffffffffff, 0x00, fa0, fa1, fa2);
+ /* fsgnj(-1.0, -) -> -1.0 */
+ TESTINST_1_2_F(4, "fsgnj.d fa0, fa1, fa2", 0xbff0000000000000,
+ 0x8000000000000000, 0x00, fa0, fa1, fa2);
+
+ /* ---------------- fsgnjn.d rd, rs1, rs2 ---------------- */
+ /* fneg.d rd, rs1 */
+ TESTINST_1_2_F(4, "fsgnjn.d fa0, fa1, fa1", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x00, fa0, fa1, fa1);
+ TESTINST_1_2_F(4, "fsgnjn.d fa0, fa1, fa1", 0xbff0000000000000,
+ 0xbff0000000000000, 0x00, fa0, fa1, fa1);
+
+ /* fsgnjn(1.0, +) -> -1.0 */
+ TESTINST_1_2_F(4, "fsgnjn.d fa0, fa1, fa2", 0x3ff0000000000000,
+ 0x7fffffffffffffff, 0x00, fa0, fa1, fa2);
+ /* fsgnjn(1.0, -) -> 1.0 */
+ TESTINST_1_2_F(4, "fsgnjn.d fa0, fa1, fa2", 0x3ff0000000000000,
+ 0x8000000000000000, 0x00, fa0, fa1, fa2);
+ /* fsgnjn(-1.0, +) -> -1.0 */
+ TESTINST_1_2_F(4, "fsgnjn.d fa0, fa1, fa2", 0xbff0000000000000,
+ 0x7fffffffffffffff, 0x00, fa0, fa1, fa2);
+ /* fsgnjn(-1.0, -) -> 1.0 */
+ TESTINST_1_2_F(4, "fsgnjn.d fa0, fa1, fa2", 0xbff0000000000000,
+ 0x8000000000000000, 0x00, fa0, fa1, fa2);
+
+ /* ---------------- fsgnjx.d rd, rs1, rs2 ---------------- */
+ /* fabs.d rd, rs1 */
+ TESTINST_1_2_F(4, "fsgnjx.d fa0, fa1, fa1", 0x3ff0000000000000,
+ 0x3ff0000000000000, 0x00, fa0, fa1, fa1);
+ TESTINST_1_2_F(4, "fsgnjx.d fa0, fa1, fa1", 0xbff0000000000000,
+ 0xbff0000000000000, 0x00, fa0, fa1, fa1);
+
+ /* fsgnjx(1.0, +) -> 1.0 */
+ TESTINST_1_2_F(4, "fsgnjx.d fa0, fa1, fa2", 0x3ff0000000000000,
+ 0x7fffffffffffffff, 0x00, fa0, fa1, fa2);
+ /* fsgnjx(1.0, -) -> -1.0 */
+ TESTINST_1_2_F(4, "fsgnjx.d fa0, fa1, fa2", 0x3ff0000000000000,
+ 0x8000000000000000, 0x00, fa0, fa1, fa2);
+ /* fsgnjx(-1.0, +) -> -1.0 */
+ TESTINST_1_2_F(4, "fsgnjx.d fa0, fa1, fa2", 0xbff0000000000000,
+ 0x7fffffffffffffff, 0x00, fa0, fa1, fa2);
+ /* fsgnjx(-1.0, -) -> 1.0 */
+ TESTINST_1_2_F(4, "fsgnjx.d fa0, fa1, fa2", 0xbff0000000000000,
+ 0x8000000000000000, 0x00, fa0, fa1, fa2);
+
+ /* ----------------- fmin.d rd, rs1, rs2 ----------------- */
+ /* min(0.0, 1.0) -> 0.0 */
+ TESTINST_1_2_F(4, "fmin.d fa0, fa1, fa2", 0x0000000000000000,
+ 0x3ff0000000000000, 0x00, fa0, fa1, fa2);
+ /* min(0.0, -0.0) -> -0.0 */
+ TESTINST_1_2_F(4, "fmin.d fa0, fa1, fa2", 0x0000000000000000,
+ 0x8000000000000000, 0x00, fa0, fa1, fa2);
+ /* min(-0.0, 0.0) -> -0.0 */
+ TESTINST_1_2_F(4, "fmin.d fa0, fa1, fa2", 0x8000000000000000,
+ 0x0000000000000000, 0x00, fa0, fa1, fa2);
+ /* min(INFINITY, INFINITY) -> INFINITY */
+ TESTINST_1_2_F(4, "fmin.d fa0, fa1, fa2", 0x7ff0000000000000,
+ 0x7ff0000000000000, 0x00, fa0, fa1, fa2);
+ /* min(0.0, qNAN) -> 0.0 */
+ TESTINST_1_2_F(4, "fmin.d fa0, fa1, fa2", 0x0000000000000000,
+ 0x7ff8000000000000, 0x00, fa0, fa1, fa2);
+ /* min(0.0, sNAN) -> 0.0 (NV) */
+ TESTINST_1_2_F(4, "fmin.d fa0, fa1, fa2", 0x0000000000000000,
+ 0x7ff4000000000000, 0x00, fa0, fa1, fa2);
+
+ /* ----------------- fmax.d rd, rs1, rs2 ----------------- */
+ /* max(0.0, 1.0) -> 1.0 */
+ TESTINST_1_2_F(4, "fmax.d fa0, fa1, fa2", 0x0000000000000000,
+ 0x3ff0000000000000, 0x00, fa0, fa1, fa2);
+ /* max(0.0, -0.0) -> 0.0 */
+ TESTINST_1_2_F(4, "fmax.d fa0, fa1, fa2", 0x0000000000000000,
+ 0x8000000000000000, 0x00, fa0, fa1, fa2);
+ /* max(-0.0, 0.0) -> 0.0 */
+ TESTINST_1_2_F(4, "fmax.d fa0, fa1, fa2", 0x8000000000000000,
+ 0x0000000000000000, 0x00, fa0, fa1, fa2);
+ /* max(INFINITY, INFINITY) -> INFINITY */
+ TESTINST_1_2_F(4, "fmax.d fa0, fa1, fa2", 0x7ff0000000000000,
+ 0x7ff0000000000000, 0x00, fa0, fa1, fa2);
+ /* max(0.0, qNAN) -> 0.0 */
+ TESTINST_1_2_F(4, "fmax.d fa0, fa1, fa2", 0x0000000000000000,
+ 0x7ff8000000000000, 0x00, fa0, fa1, fa2);
+ /* max(0.0, sNAN) -> 0.0 (NV) */
+ TESTINST_1_2_F(4, "fmax.d fa0, fa1, fa2", 0x0000000000000000,
+ 0x7ff4000000000000, 0x00, fa0, fa1, fa2);
+
+ /* ---------------- fcvt.s.d rd, rs1, rm ----------------- */
+ /* 0.0 -> 0.0 */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1", 0x0000000000000000, 0x00, fa0, fa1);
+ /* DBL_TRUE_MIN -> 0.0 (UF, NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1", 0x0000000000000001, 0x00, fa0, fa1);
+ /* INFINITY -> INFINITY */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1", 0x7ff0000000000000, 0x00, fa0, fa1);
+ /* qNAN -> qNAN */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1", 0x7ff8000000000000, 0x00, fa0, fa1);
+ /* FLT_MAX -> FLT_MAX */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1", 0x47efffffe0000000, 0x00, fa0, fa1);
+ /* -FLT_MAX -> -FLT_MAX */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1", 0xc7efffffe0000000, 0x00, fa0, fa1);
+ /* nextafter(FLT_MAX) -> FLT_MAX (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1", 0x47efffffe0000001, 0x00, fa0, fa1);
+ /* -nextafter(FLT_MAX) -> -FLT_MAX (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1", 0xc7efffffe0000001, 0x00, fa0, fa1);
+ /* DBL_MAX -> FLT_MAX (OF, NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1", 0x7fefffffffffffff, 0x00, fa0, fa1);
+
+ /* 1.0 + FLT_EPSILON/2 (RNE) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1, rne", 0x3ff0000010000000, 0x00, fa0,
+ fa1);
+ /* nextafterf(1.0) + FLT_EPSILON/2 (RNE) -> 2nextafterf(1.0) (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1, rne", 0x3ff0000030000000, 0x00, fa0,
+ fa1);
+ /* 1.0 + FLT_EPSILON/2 (RTZ) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1, rtz", 0x3ff0000010000000, 0x00, fa0,
+ fa1);
+ /* -1.0 + -FLT_EPSILON/2 (RTZ) -> -1.0 (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1, rtz", 0xbff0000010000000, 0x00, fa0,
+ fa1);
+ /* 1.0 + FLT_EPSILON/2 (RDN) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1, rdn", 0x3ff0000010000000, 0x00, fa0,
+ fa1);
+ /* -1.0 + -FLT_EPSILON/2 (RDN) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1, rdn", 0xbff0000010000000, 0x00, fa0,
+ fa1);
+ /* 1.0 + FLT_EPSILON/2 (RUP) -> nextafterf(1.0) (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1, rup", 0x3ff0000010000000, 0x00, fa0,
+ fa1);
+ /* -1.0 + -FLT_EPSILON/2 (RUP) -> -1.0 (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1, rup", 0xbff0000010000000, 0x00, fa0,
+ fa1);
+ /* 1.0 + FLT_EPSILON/2 (RMM) -> nextafterf(1.0) (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1, rmm", 0x3ff0000010000000, 0x00, fa0,
+ fa1);
+ /* -1.0 + -FLT_EPSILON/2 (RMM) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1, rmm", 0xbff0000010000000, 0x00, fa0,
+ fa1);
+
+ /* 1.0 + FLT_EPSILON/2 (DYN-RNE) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1", 0x3ff0000010000000, 0x00, fa0, fa1);
+ /* nextafterf(1.0) + FLT_EPSILON/2 (DYN-RNE) -> 2nextafterf(1.0) (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1", 0x3ff0000030000000, 0x00, fa0, fa1);
+ /* 1.0 + FLT_EPSILON/2 (DYN-RTZ) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1", 0x3ff0000010000000, 0x20, fa0, fa1);
+ /* -1.0 + -FLT_EPSILON/2 (DYN-RTZ) -> -1.0 (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1", 0xbff0000010000000, 0x20, fa0, fa1);
+ /* 1.0 + FLT_EPSILON/2 (DYN-RDN) -> 1.0 (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1", 0x3ff0000010000000, 0x40, fa0, fa1);
+ /* -1.0 + -FLT_EPSILON/2 (DYN-RDN) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1", 0xbff0000010000000, 0x40, fa0, fa1);
+ /* 1.0 + FLT_EPSILON/2 (DYN-RUP) -> nextafterf(1.0) (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1", 0x3ff0000010000000, 0x60, fa0, fa1);
+ /* -1.0 + -FLT_EPSILON/2 (DYN-RUP) -> -1.0 (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1", 0xbff0000010000000, 0x60, fa0, fa1);
+ /* 1.0 + FLT_EPSILON/2 (DYN-RMM) -> nextafterf(1.0) (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1", 0x3ff0000010000000, 0x80, fa0, fa1);
+ /* -1.0 + -FLT_EPSILON/2 (DYN-RMM) -> -nextafterf(1.0) (NX) */
+ TESTINST_1_1_F(4, "fcvt.s.d fa0, fa1", 0xbff0000010000000, 0x80, fa0, fa1);
+
+ /* ---------------- fcvt.d.s rd, rs1, rm ----------------- */
+ /* 0.0 -> 0.0 */
+ TESTINST_1_1_F(4, "fcvt.d.s fa0, fa1", 0xffffffff00000000, 0x00, fa0, fa1);
+ /* FLT_TRUE_MIN -> FLT_TRUE_MIN */
+ TESTINST_1_1_F(4, "fcvt.d.s fa0, fa1", 0xffffffff00000001, 0x00, fa0, fa1);
+ /* INFINITY -> INFINITY */
+ TESTINST_1_1_F(4, "fcvt.d.s fa0, fa1", 0xffffffff7f800000, 0x00, fa0, fa1);
+ /* qNAN -> qNAN */
+ TESTINST_1_1_F(4, "fcvt.d.s fa0, fa1", 0xffffffff7fc00000, 0x00, fa0, fa1);
+ /* FLT_MAX -> FLT_MAX */
+ TESTINST_1_1_F(4, "fcvt.d.s fa0, fa1", 0xffffffff7f7fffff, 0x00, fa0, fa1);
+ /* -FLT_MAX -> -FLT_MAX */
+ TESTINST_1_1_F(4, "fcvt.d.s fa0, fa1", 0xffffffffff7fffff, 0x00, fa0, fa1);
+#if 0
+ /* TODO Implement correctly. */
+ /* non-NaN-boxed 0.0 -> qNaN */
+ TESTINST_1_1_F(4, "fcvt.d.s fa0, fa1", 0x0000000000000000, 0x00, fa0, fa1);
+#endif
+
+ /* ----------------- feq.d rd, rs1, rs2 ------------------ */
+ /* 0.0 == 1.0 -> 0 */
+ TESTINST_1_2_FCMP(4, "feq.d a0, fa0, fa1", 0x0000000000000000,
+ 0x3ff0000000000000, 0x00, a0, fa0, fa1);
+ /* 0.0 == 0.0 -> 1 */
+ TESTINST_1_2_FCMP(4, "feq.d a0, fa0, fa1", 0x0000000000000000,
+ 0x0000000000000000, 0x00, a0, fa0, fa1);
+ /* 0.0 == -0.0 -> 1 */
+ TESTINST_1_2_FCMP(4, "feq.d a0, fa0, fa1", 0x0000000000000000,
+ 0x8000000000000000, 0x00, a0, fa0, fa1);
+ /* -0.0 == 0.0 -> 1 */
+ TESTINST_1_2_FCMP(4, "feq.d a0, fa0, fa1", 0x8000000000000000,
+ 0x0000000000000000, 0x00, a0, fa0, fa1);
+ /* INFINITY == INFINITY -> 1 */
+ TESTINST_1_2_FCMP(4, "feq.d a0, fa0, fa1", 0x7ff0000000000000,
+ 0x7ff0000000000000, 0x00, a0, fa0, fa1);
+ /* 0.0 == qNAN -> 0 */
+ TESTINST_1_2_FCMP(4, "feq.d a0, fa0, fa1", 0x0000000000000000,
+ 0x7ff8000000000000, 0x00, a0, fa0, fa1);
+ /* 0.0 == sNAN -> 0 (NV) */
+ TESTINST_1_2_FCMP(4, "feq.d a0, fa0, fa1", 0x0000000000000000,
+ 0x7ff4000000000000, 0x00, a0, fa0, fa1);
+
+ /* sNAN == sNAN (rd=zero) -> 0 (NV) */
+ TESTINST_1_2_FCMP(4, "feq.d zero, fa0, fa1", 0x7ff4000000000000,
+ 0x7ff4000000000000, 0x00, zero, fa0, fa1);
+
+ /* ----------------- flt.d rd, rs1, rs2 ------------------ */
+ /* 0.0 < 0.0 -> 0 */
+ TESTINST_1_2_FCMP(4, "flt.d a0, fa0, fa1", 0x0000000000000000,
+ 0x0000000000000000, 0x00, a0, fa0, fa1);
+ /* 0.0 < 1.0 -> 1 */
+ TESTINST_1_2_FCMP(4, "flt.d a0, fa0, fa1", 0x0000000000000000,
+ 0x3ff0000000000000, 0x00, a0, fa0, fa1);
+ /* 0.0 < -0.0 -> 0 */
+ TESTINST_1_2_FCMP(4, "flt.d a0, fa0, fa1", 0x0000000000000000,
+ 0x8000000000000000, 0x00, a0, fa0, fa1);
+ /* -0.0 < 0.0 -> 0 */
+ TESTINST_1_2_FCMP(4, "flt.d a0, fa0, fa1", 0x8000000000000000,
+ 0x0000000000000000, 0x00, a0, fa0, fa1);
+ /* INFINITY < INFINITY -> 0 */
+ TESTINST_1_2_FCMP(4, "flt.d a0, fa0, fa1", 0x7ff0000000000000,
+ 0x7ff0000000000000, 0x00, a0, fa0, fa1);
+ /* 0.0 < qNAN -> 0 (NV) */
+ TESTINST_1_2_FCMP(4, "flt.d a0, fa0, fa1", 0x0000000000000000,
+ 0x7ff8000000000000, 0x00, a0, fa0, fa1);
+ /* 0.0 < sNAN -> 0 (NV) */
+ TESTINST_1_2_FCMP(4, "flt.d a0, fa0, fa1", 0x0000000000000000,
+ 0x7ff4000000000000, 0x00, a0, fa0, fa1);
+
+ /* sNAN < sNAN (rd=zero) -> 0 (NV) */
+ TESTINST_1_2_FCMP(4, "flt.d zero, fa0, fa1", 0x7ff4000000000000,
+ 0x7ff4000000000000, 0x00, zero, fa0, fa1);
+
+ /* ----------------- fle.d rd, rs1, rs2 ------------------ */
+ /* 1.0 < 0.0 -> 0 */
+ TESTINST_1_2_FCMP(4, "fle.d a0, fa0, fa1", 0x3ff0000000000000,
+ 0x0000000000000000, 0x00, a0, fa0, fa1);
+ /* 0.0 <= 0.0 -> 1 */
+ TESTINST_1_2_FCMP(4, "fle.d a0, fa0, fa1", 0x0000000000000000,
+ 0x0000000000000000, 0x00, a0, fa0, fa1);
+ /* 0.0 <= 1.0 -> 1 */
+ TESTINST_1_2_FCMP(4, "fle.d a0, fa0, fa1", 0x0000000000000000,
+ 0x3ff0000000000000, 0x00, a0, fa0, fa1);
+ /* 0.0 <= -0.0 -> 1 */
+ TESTINST_1_2_FCMP(4, "fle.d a0, fa0, fa1", 0x0000000000000000,
+ 0x8000000000000000, 0x00, a0, fa0, fa1);
+ /* -0.0 <= 0.0 -> 1 */
+ TESTINST_1_2_FCMP(4, "fle.d a0, fa0, fa1", 0x8000000000000000,
+ 0x0000000000000000, 0x00, a0, fa0, fa1);
+ /* INFINITY <= INFINITY -> 1 */
+ TESTINST_1_2_FCMP(4, "fle.d a0, fa0, fa1", 0x7ff0000000000000,
+ 0x7ff0000000000000, 0x00, a0, fa0, fa1);
+ /* 0.0 <= qNAN -> 0 (NV) */
+ TESTINST_1_2_FCMP(4, "fle.d a0, fa0, fa1", 0x0000000000000000,
+ 0x7ff8000000000000, 0x00, a0, fa0, fa1);
+ /* 0.0 <= sNAN -> 0 (NV) */
+ TESTINST_1_2_FCMP(4, "fle.d a0, fa0, fa1", 0x0000000000000000,
+ 0x7ff4000000000000, 0x00, a0, fa0, fa1);
+
+ /* sNAN <= sNAN (rd=zero) -> 0 (NV) */
+ TESTINST_1_2_FCMP(4, "fle.d zero, fa0, fa1", 0x7ff4000000000000,
+ 0x7ff4000000000000, 0x00, zero, fa0, fa1);
+
+ /* ------------------ fclass.d rd, rs1 ------------------- */
+ /* fclass(-INFINITY) -> 0x001 */
+ TESTINST_1_1_IF(4, "fclass.d a0, fa0", 0xfff0000000000000, 0x00, a0, fa0);
+ /* fclass(-1.0) -> 0x002 */
+ TESTINST_1_1_IF(4, "fclass.d a0, fa0", 0xbff0000000000000, 0x00, a0, fa0);
+ /* fclass(-DBL_TRUE_MIN) -> 0x004 */
+ TESTINST_1_1_IF(4, "fclass.d a0, fa0", 0x8000000000000001, 0x00, a0, fa0);
+ /* fclass(-0.0) -> 0x008 */
+ TESTINST_1_1_IF(4, "fclass.d a0, fa0", 0x8000000000000000, 0x00, a0, fa0);
+ /* fclass(0.0) -> 0x010 */
+ TESTINST_1_1_IF(4, "fclass.d a0, fa0", 0x0000000000000000, 0x00, a0, fa0);
+ /* fclass(DBL_TRUE_MIN) -> 0x020 */
+ TESTINST_1_1_IF(4, "fclass.d a0, fa0", 0x0000000000000001, 0x00, a0, fa0);
+ /* fclass(1.0) -> 0x040 */
+ TESTINST_1_1_IF(4, "fclass.d a0, fa0", 0x3ff0000000000000, 0x00, a0, fa0);
+ /* fclass(INFINITY) -> 0x080 */
+ TESTINST_1_1_IF(4, "fclass.d a0, fa0", 0x7ff0000000000000, 0x00, a0, fa0);
+ /* fclass(sNAN) -> 0x100 */
+ TESTINST_1_1_IF(4, "fclass.d a0, fa0", 0x7ff4000000000000, 0x00, a0, fa0);
+ /* fclass(qNAN) -> 0x200 */
+ TESTINST_1_1_IF(4, "fclass.d a0, fa0", 0x7ff8000000000000, 0x00, a0, fa0);
+
+ /* fclass(-INFINITY) (rd=zero) -> 0x000 */
+ TESTINST_1_1_IF(4, "fclass.d zero, fa0", 0xfff0000000000000, 0x00, zero,
+ fa0);
+
+ /* ---------------- fcvt.w.d rd, rs1, rm ----------------- */
+ /* 0.0 -> 0 */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0", 0x0000000000000000, 0x00, a0, fa0);
+ /* DBL_TRUE_MIN -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0", 0x0000000000000001, 0x00, a0, fa0);
+ /* INFINITY -> 2**31-1 aka INT_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0", 0x7ff0000000000000, 0x00, a0, fa0);
+ /* qNAN -> 2**31-1 aka INT_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0", 0x7ff8000000000000, 0x00, a0, fa0);
+ /* 2**31-1 -> 2**31-1 aka INT_MAX */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0", 0x41dfffffffc00000, 0x00, a0, fa0);
+ /* -2**31 -> -2**31 aka INT_MIN */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0", 0xc1e0000000000000, 0x00, a0, fa0);
+ /* 2**31 -> 2**31-1 aka INT_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0", 0x41e0000000000000, 0x00, a0, fa0);
+ /* -2**31-1 -> -2**31 aka INT_MIN (NV) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0", 0xc1e0000000200000, 0x00, a0, fa0);
+
+ /* 1.0 (rd=zero) -> 0 */
+ TESTINST_1_1_IF(4, "fcvt.w.d zero, fa0", 0x3ff0000000000000, 0x00, zero,
+ fa0);
+
+ /* 0.5 (RNE) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0, rne", 0x3fe0000000000000, 0x00, a0,
+ fa0);
+ /* 1.5 (RNE) -> 2 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0, rne", 0x3ff8000000000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0, rtz", 0x3fe0000000000000, 0x00, a0,
+ fa0);
+ /* -0.5 (RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0, rtz", 0xbfe0000000000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RDN) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0, rdn", 0x3fe0000000000000, 0x00, a0,
+ fa0);
+ /* -0.5 (RDN) -> -1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0, rdn", 0xbfe0000000000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RUP) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0, rup", 0x3fe0000000000000, 0x00, a0,
+ fa0);
+ /* -0.5 (RUP) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0, rup", 0xbfe0000000000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RMM) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0, rmm", 0x3fe0000000000000, 0x00, a0,
+ fa0);
+ /* -0.5 (RMM) -> -1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0, rmm", 0xbfe0000000000000, 0x00, a0,
+ fa0);
+
+ /* 0.5 (DYN-RNE) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0", 0x3fe0000000000000, 0x00, a0, fa0);
+ /* 1.5 (DYN-RNE) -> 2 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0", 0x3ff8000000000000, 0x00, a0, fa0);
+ /* 0.5 (DYN-RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0", 0x3fe0000000000000, 0x20, a0, fa0);
+ /* -0.5 (DYN-RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0", 0xbfe0000000000000, 0x20, a0, fa0);
+ /* 0.5 (DYN-RDN) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0", 0x3fe0000000000000, 0x40, a0, fa0);
+ /* -0.5 (DYN-RDN) -> -1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0", 0xbfe0000000000000, 0x40, a0, fa0);
+ /* 0.5 (DYN-RUP) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0", 0x3fe0000000000000, 0x60, a0, fa0);
+ /* -0.5 (DYN-RUP) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0", 0xbfe0000000000000, 0x60, a0, fa0);
+ /* 0.5 (DYN-RMM) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0", 0x3fe0000000000000, 0x80, a0, fa0);
+ /* -0.5 (DYN-RMM) -> -1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.w.d a0, fa0", 0xbfe0000000000000, 0x80, a0, fa0);
+
+ /* ---------------- fcvt.wu.d rd, rs1, rm ---------------- */
+ /* 0.0 -> 0 */
+ TESTINST_1_1_IF(4, "fcvt.wu.d a0, fa0", 0x0000000000000000, 0x00, a0, fa0);
+ /* DBL_TRUE_MIN -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.d a0, fa0", 0x0000000000000001, 0x00, a0, fa0);
+ /* INFINITY -> 2**32-1 aka UINT_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.wu.d a0, fa0", 0x7ff0000000000000, 0x00, a0, fa0);
+ /* qNAN -> 2**32-1 aka UINT_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.wu.d a0, fa0", 0x7ff8000000000000, 0x00, a0, fa0);
+ /* 2**32-1 -> 2**32-1 aka UINT_MAX */
+ TESTINST_1_1_IF(4, "fcvt.wu.d a0, fa0", 0x41efffffffe00000, 0x00, a0, fa0);
+ /* -1.0 -> 0 (NV) */
+ TESTINST_1_1_IF(4, "fcvt.wu.d a0, fa0", 0xbff0000000000000, 0x00, a0, fa0);
+
+ /* 1.0 (rd=zero) -> 0 */
+ TESTINST_1_1_IF(4, "fcvt.wu.d zero, fa0", 0x3ff0000000000000, 0x00, zero,
+ fa0);
+
+ /* 0.5 (RNE) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.d a0, fa0, rne", 0x3fe0000000000000, 0x00, a0,
+ fa0);
+ /* 1.5 (RNE) -> 2 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.d a0, fa0, rne", 0x3ff8000000000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.d a0, fa0, rtz", 0x3fe0000000000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RDN) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.d a0, fa0, rdn", 0x3fe0000000000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RUP) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.d a0, fa0, rup", 0x3fe0000000000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RMM) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.d a0, fa0, rmm", 0x3fe0000000000000, 0x00, a0,
+ fa0);
+
+ /* 0.5 (DYN-RNE) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.d a0, fa0", 0x3fe0000000000000, 0x00, a0, fa0);
+ /* 1.5 (DYN-RNE) -> 2 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.d a0, fa0", 0x3ff8000000000000, 0x00, a0, fa0);
+ /* 0.5 (DYN-RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.d a0, fa0", 0x3fe0000000000000, 0x20, a0, fa0);
+ /* 0.5 (DYN-RDN) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.d a0, fa0", 0x3fe0000000000000, 0x40, a0, fa0);
+ /* 0.5 (DYN-RUP) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.d a0, fa0", 0x3fe0000000000000, 0x60, a0, fa0);
+ /* 0.5 (DYN-RMM) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.wu.d a0, fa0", 0x3fe0000000000000, 0x80, a0, fa0);
+
+ /* ---------------- fcvt.d.w rd, rs1, rm ----------------- */
+ /* 0 -> 0.0 */
+ TESTINST_1_1_FI(4, "fcvt.d.w fa0, a0", 0x0000000000000000, 0x00, fa0, a0);
+ /* 2**31-1 aka INT_MAX -> 2**31-1 */
+ TESTINST_1_1_FI(4, "fcvt.d.w fa0, a0", 0x000000007fffffff, 0x00, fa0, a0);
+ /* -2**31 aka INT_MIN -> -2**31 */
+ TESTINST_1_1_FI(4, "fcvt.d.w fa0, a0", 0xffffffff80000000, 0x00, fa0, a0);
+
+ /* ---------------- fcvt.d.wu rd, rs1, rm ---------------- */
+ /* 0 -> 0.0 */
+ TESTINST_1_1_FI(4, "fcvt.d.wu fa0, a0", 0x0000000000000000, 0x00, fa0, a0);
+ /* 2**32-1 aka UINT_MAX -> 2**32-1 */
+ TESTINST_1_1_FI(4, "fcvt.d.wu fa0, a0", 0x00000000ffffffff, 0x00, fa0, a0);
+
+ printf("\n");
+}
+
+static void test_float64_additions(void)
+{
+ printf("RV64D double-precision FP instruction set, additions\n");
+
+ /* ---------------- fcvt.l.d rd, rs1, rm ----------------- */
+ /* 0.0 -> 0 */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0", 0x0000000000000000, 0x00, a0, fa0);
+ /* DBL_TRUE_MIN -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0", 0x0000000000000001, 0x00, a0, fa0);
+ /* INFINITY -> 2**63-1 aka LONG_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0", 0x7ff0000000000000, 0x00, a0, fa0);
+ /* qNAN -> 2**63-1 aka LONG_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0", 0x7ff8000000000000, 0x00, a0, fa0);
+ /* nextafter(2**63, 0.0) -> 2**63-1024 */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0", 0x43dfffffffffffff, 0x00, a0, fa0);
+ /* -2**63 -> -2**63 aka LONG_MIN */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0", 0xc3e0000000000000, 0x00, a0, fa0);
+ /* 2**63 -> 2**63-1 aka LONG_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0", 0x43e0000000000000, 0x00, a0, fa0);
+ /* -nextafter(2**63) -> -2**63 aka LONG_MIN (NV) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0", 0xc3e0000000000001, 0x00, a0, fa0);
+
+ /* 1.0 (rd=zero) -> 0 */
+ TESTINST_1_1_IF(4, "fcvt.l.d zero, fa0", 0x3ff0000000000000, 0x00, zero,
+ fa0);
+
+ /* 0.5 (RNE) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0, rne", 0x3fe0000000000000, 0x00, a0,
+ fa0);
+ /* 1.5 (RNE) -> 2 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0, rne", 0x3ff8000000000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0, rtz", 0x3fe0000000000000, 0x00, a0,
+ fa0);
+ /* -0.5 (RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0, rtz", 0xbfe0000000000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RDN) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0, rdn", 0x3fe0000000000000, 0x00, a0,
+ fa0);
+ /* -0.5 (RDN) -> -1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0, rdn", 0xbfe0000000000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RUP) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0, rup", 0x3fe0000000000000, 0x00, a0,
+ fa0);
+ /* -0.5 (RUP) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0, rup", 0xbfe0000000000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RMM) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0, rmm", 0x3fe0000000000000, 0x00, a0,
+ fa0);
+ /* -0.5 (RMM) -> -1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0, rmm", 0xbfe0000000000000, 0x00, a0,
+ fa0);
+
+ /* 0.5 (DYN-RNE) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0", 0x3fe0000000000000, 0x00, a0, fa0);
+ /* 1.5 (DYN-RNE) -> 2 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0", 0x3ff8000000000000, 0x00, a0, fa0);
+ /* 0.5 (DYN-RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0", 0x3fe0000000000000, 0x20, a0, fa0);
+ /* -0.5 (DYN-RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0", 0xbfe0000000000000, 0x20, a0, fa0);
+ /* 0.5 (DYN-RDN) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0", 0x3fe0000000000000, 0x40, a0, fa0);
+ /* -0.5 (DYN-RDN) -> -1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0", 0xbfe0000000000000, 0x40, a0, fa0);
+ /* 0.5 (DYN-RUP) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0", 0x3fe0000000000000, 0x60, a0, fa0);
+ /* -0.5 (DYN-RUP) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0", 0xbfe0000000000000, 0x60, a0, fa0);
+ /* 0.5 (DYN-RMM) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0", 0x3fe0000000000000, 0x80, a0, fa0);
+ /* -0.5 (DYN-RMM) -> -1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.l.d a0, fa0", 0xbfe0000000000000, 0x80, a0, fa0);
+
+ /* ---------------- fcvt.lu.d rd, rs1, rm ---------------- */
+ /* 0.0 -> 0 */
+ TESTINST_1_1_IF(4, "fcvt.lu.d a0, fa0", 0x0000000000000000, 0x00, a0, fa0);
+ /* DBL_TRUE_MIN -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.d a0, fa0", 0x0000000000000001, 0x00, a0, fa0);
+ /* INFINITY -> 2**64-1 aka ULONG_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.lu.d a0, fa0", 0x7ff0000000000000, 0x00, a0, fa0);
+ /* qNAN -> 2**64-1 aka ULONG_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.lu.d a0, fa0", 0x7ff8000000000000, 0x00, a0, fa0);
+ /* nextafter(2**64, 0.0) -> 2**63-2048 */
+ TESTINST_1_1_IF(4, "fcvt.lu.d a0, fa0", 0x43efffffffffffff, 0x00, a0, fa0);
+ /* 2**64 -> 2**64-1 aka ULONG_MAX (NV) */
+ TESTINST_1_1_IF(4, "fcvt.lu.d a0, fa0", 0x43f0000000000000, 0x00, a0, fa0);
+ /* -1.0 -> 0 (NV) */
+ TESTINST_1_1_IF(4, "fcvt.lu.d a0, fa0", 0xbff0000000000000, 0x00, a0, fa0);
+
+ /* 1.0 (rd=zero) -> 0 */
+ TESTINST_1_1_IF(4, "fcvt.lu.d zero, fa0", 0x3ff0000000000000, 0x00, zero,
+ fa0);
+
+ /* 0.5 (RNE) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.d a0, fa0, rne", 0x3fe0000000000000, 0x00, a0,
+ fa0);
+ /* 1.5 (RNE) -> 2 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.d a0, fa0, rne", 0x3ff8000000000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.d a0, fa0, rtz", 0x3fe0000000000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RDN) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.d a0, fa0, rdn", 0x3fe0000000000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RUP) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.d a0, fa0, rup", 0x3fe0000000000000, 0x00, a0,
+ fa0);
+ /* 0.5 (RMM) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.d a0, fa0, rmm", 0x3fe0000000000000, 0x00, a0,
+ fa0);
+
+ /* 0.5 (DYN-RNE) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.d a0, fa0", 0x3fe0000000000000, 0x00, a0, fa0);
+ /* 1.5 (DYN-RNE) -> 2 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.d a0, fa0", 0x3ff8000000000000, 0x00, a0, fa0);
+ /* 0.5 (DYN-RTZ) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.d a0, fa0", 0x3fe0000000000000, 0x20, a0, fa0);
+ /* 0.5 (DYN-RDN) -> 0 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.d a0, fa0", 0x3fe0000000000000, 0x40, a0, fa0);
+ /* 0.5 (DYN-RUP) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.d a0, fa0", 0x3fe0000000000000, 0x60, a0, fa0);
+ /* 0.5 (DYN-RMM) -> 1 (NX) */
+ TESTINST_1_1_IF(4, "fcvt.lu.d a0, fa0", 0x3fe0000000000000, 0x80, a0, fa0);
+
+ /* ------------------- fmv.x.d rd, rs1 ------------------- */
+ TESTINST_1_1_IF(4, "fmv.x.d a0, fa0", 0xabcdef0123456789, 0x00, a0, fa0);
+
+ /* 1.0 (rd=zero) -> 0 */
+ TESTINST_1_1_IF(4, "fmv.x.d zero, fa0", 0x3ff0000000000000, 0x00, zero, fa0);
+
+ /* ---------------- fcvt.d.l rd, rs1, rm ----------------- */
+ /* 0 -> 0.0 */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0", 0x0000000000000000, 0x00, fa0, a0);
+ /* 2**63-1024 -> nextafter(2**63, 0.0) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0", 0x7ffffffffffffc00, 0x00, fa0, a0);
+ /* 2**63-1 aka LONG_MAX -> 2**63 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0", 0x7fffffffffffffff, 0x00, fa0, a0);
+ /* -2**63 aka LONG_MIN -> -2**63 */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0", 0x8000000000000000, 0x00, fa0, a0);
+
+ /* 2**53+1 (RNE) -> 2**53 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0, rne", 0x0020000000000001, 0x00, fa0,
+ a0);
+ /* 2**53+3 (RNE) -> 2**53+4 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0, rne", 0x0020000000000003, 0x00, fa0,
+ a0);
+ /* 2**53+1 (RTZ) -> 2**53 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0, rtz", 0x0020000000000001, 0x00, fa0,
+ a0);
+ /* -2**53-1 (RTZ) -> -2**53 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0, rtz", 0xffdfffffffffffff, 0x00, fa0,
+ a0);
+ /* 2**53+1 (RDN) -> 2**53 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0, rdn", 0x0020000000000001, 0x00, fa0,
+ a0);
+ /* -2**53-1 (RDN) -> -2**53-2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0, rdn", 0xffdfffffffffffff, 0x00, fa0,
+ a0);
+ /* 2**53+1 (RUP) -> 2**53+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0, rup", 0x0020000000000001, 0x00, fa0,
+ a0);
+ /* -2**53-1 (RUP) -> -2**53 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0, rup", 0xffdfffffffffffff, 0x00, fa0,
+ a0);
+ /* 2**53+1 (RMM) -> 2**53+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0, rmm", 0x0020000000000001, 0x00, fa0,
+ a0);
+ /* -2**53-1 (RMM) -> -2**53-2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0, rmm", 0xffdfffffffffffff, 0x00, fa0,
+ a0);
+
+ /* 2**53+1 (DYN-RNE) -> 2**53 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0", 0x0020000000000001, 0x00, fa0, a0);
+ /* 2**53+3 (DYN-RNE) -> 2**53+4 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0", 0x0020000000000003, 0x00, fa0, a0);
+ /* 2**53+1 (DYN-RTZ) -> 2**53 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0", 0x0020000000000001, 0x20, fa0, a0);
+ /* -2**53-1 (DYN-RTZ) -> -2**53 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0", 0xffdfffffffffffff, 0x20, fa0, a0);
+ /* 2**53+1 (DYN-RDN) -> 2**53 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0", 0x0020000000000001, 0x40, fa0, a0);
+ /* -2**53-1 (DYN-RDN) -> -2**53-2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0", 0xffdfffffffffffff, 0x40, fa0, a0);
+ /* 2**53+1 (DYN-RUP) -> 2**53+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0", 0x0020000000000001, 0x60, fa0, a0);
+ /* -2**53-1 (DYN-RUP) -> -2**53 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0", 0xffdfffffffffffff, 0x60, fa0, a0);
+ /* 2**53+1 (DYN-RMM) -> 2**53+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0", 0x0020000000000001, 0x80, fa0, a0);
+ /* -2**53-1 (DYN-RMM) -> -2**53-2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.l fa0, a0", 0xffdfffffffffffff, 0x80, fa0, a0);
+
+ /* ---------------- fcvt.d.lu rd, rs1, rm ---------------- */
+ /* 0 -> 0.0 */
+ TESTINST_1_1_FI(4, "fcvt.d.lu fa0, a0", 0x0000000000000000, 0x00, fa0, a0);
+ /* 2**64-2048 -> nextafter(2**64, 0.0) */
+ TESTINST_1_1_FI(4, "fcvt.d.lu fa0, a0", 0xfffffffffffff800, 0x00, fa0, a0);
+ /* 2**64-1 aka ULONG_MAX -> 2**64 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.lu fa0, a0", 0xffffffffffffffff, 0x00, fa0, a0);
+
+ /* 2**53+1 (RNE) -> 2**53 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.lu fa0, a0, rne", 0x0020000000000001, 0x00, fa0,
+ a0);
+ /* 2**53+3 (RNE) -> 2**53+4 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.lu fa0, a0, rne", 0x0020000000000003, 0x00, fa0,
+ a0);
+ /* 2**53+1 (RTZ) -> 2**53 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.lu fa0, a0, rtz", 0x0020000000000001, 0x00, fa0,
+ a0);
+ /* 2**53+1 (RDN) -> 2**53 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.lu fa0, a0, rdn", 0x0020000000000001, 0x00, fa0,
+ a0);
+ /* 2**53+1 (RUP) -> 2**53+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.lu fa0, a0, rup", 0x0020000000000001, 0x00, fa0,
+ a0);
+ /* 2**53+1 (RMM) -> 2**53+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.lu fa0, a0, rmm", 0x0020000000000001, 0x00, fa0,
+ a0);
+
+ /* 2**53+1 (DYN-RNE) -> 2**53 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.lu fa0, a0", 0x0020000000000001, 0x00, fa0, a0);
+ /* 2**53+3 (DYN-RNE) -> 2**53+4 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.lu fa0, a0", 0x0020000000000003, 0x00, fa0, a0);
+ /* 2**53+1 (DYN-RTZ) -> 2**53 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.lu fa0, a0", 0x0020000000000001, 0x20, fa0, a0);
+ /* 2**53+1 (DYN-RDN) -> 2**53 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.lu fa0, a0", 0x0020000000000001, 0x40, fa0, a0);
+ /* 2**53+1 (DYN-RUP) -> 2**53+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.lu fa0, a0", 0x0020000000000001, 0x60, fa0, a0);
+ /* 2**53+1 (DYN-RMM) -> 2**53+2 (NX) */
+ TESTINST_1_1_FI(4, "fcvt.d.lu fa0, a0", 0x0020000000000001, 0x80, fa0, a0);
+
+ /* ------------------- fmv.d.x rd, rs1 ------------------- */
+ TESTINST_1_1_FI(4, "fmv.d.x fa0, a0", 0xabcdef0123456789, 0x00, fa0, a0);
+}
+
+int main(void)
+{
+ test_float64_shared();
+ test_float64_additions();
+ return 0;
+}
--- /dev/null
+RV64D double-precision FP instruction set, shared operations
+fld fa0, 0(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xbeafe48541dc8da0
+ no memory changes
+fld fa0, 4(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xddcfb6e48aa9987b
+ no memory changes
+fld fa0, 8(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xd592cd65355229e8
+ no memory changes
+fld fa0, 16(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0x2debefbafeb20cc3
+ no memory changes
+fld fa0, 32(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xcc833e0bdb9b22c9
+ no memory changes
+fld fa0, 64(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xb055d150879ff2e1
+ no memory changes
+fld fa0, 128(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xde42c04b593a2a60
+ no memory changes
+fld fa0, 256(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0x4fd0ff83ec73d785
+ no memory changes
+fld fa0, 512(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0x95cbb202622d87cb
+ no memory changes
+fld fa0, 1024(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0x4f68505bad1b44c8
+ no memory changes
+fld fa0, 2040(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0x02cebbb5f39743f9
+ no memory changes
+fld fa0, -4(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0xf13ab1ea70a54ae6
+ no memory changes
+fld fa0, -2048(a1) ::
+ inputs: a1=&area_mid
+ output: fa0=0x2babb4d62d7e670a
+ no memory changes
+fld fa4, 0(a5) ::
+ inputs: a5=&area_mid
+ output: fa4=0x1d620107e24b896b
+ no memory changes
+fsd fa0, 0(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+000] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+fsd fa0, 4(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+000] .. .. .. .. 89 67 45 23 01 ef cd ab .. .. .. ..
+fsd fa0, 8(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+000] .. .. .. .. .. .. .. .. 89 67 45 23 01 ef cd ab
+fsd fa0, 16(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+016] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+fsd fa0, 32(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+032] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+fsd fa0, 64(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+064] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+fsd fa0, 128(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+128] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+fsd fa0, 256(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+256] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+fsd fa0, 512(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+512] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+fsd fa0, 1024(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+1024] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+fsd fa0, 2040(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [+2032] .. .. .. .. .. .. .. .. 89 67 45 23 01 ef cd ab
+fsd fa0, -4(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [-016] .. .. .. .. .. .. .. .. .. .. .. .. 89 67 45 23
+ [+000] 01 ef cd ab .. .. .. .. .. .. .. .. .. .. .. ..
+fsd fa0, -2048(a1) ::
+ inputs: fa0=0xabcdef0123456789, a1=&area_mid
+ [-2048] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+fsd fa4, 0(a5) ::
+ inputs: fa4=0xabcdef0123456789, a5=&area_mid
+ [+000] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+fmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x4008000000000000, fa2=0x4000000000000000, fa3=0x3ff0000000000000, fcsr=0x00000000
+ output: fa0=0x401c000000000000, fcsr=0x00000000
+fmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0xbff0000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000000
+fmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x4000000000000000, fa2=0x0000000000000001, fa3=0x8000000000000001, fcsr=0x00000000
+ output: fa0=0x0000000000000001, fcsr=0x00000000
+fmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x4000000000000000, fa2=0x7fefffffffffffff, fa3=0xffefffffffffffff, fcsr=0x00000000
+ output: fa0=0x7fefffffffffffff, fcsr=0x00000000
+fmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x4000000000000000, fa2=0x7fefffffffffffff, fa3=0x0000000000000000, fcsr=0x00000000
+ output: fa0=0x7ff0000000000000, fcsr=0x00000005
+fmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x4000000000000000, fa2=0x7ff0000000000000, fa3=0xfff0000000000000, fcsr=0x00000000
+ output: fa0=0x7ff8000000000000, fcsr=0x00000010
+fmadd.d fa0, fa1, fa2, fa3, rne ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fmadd.d fa0, fa1, fa2, fa3, rne ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000002, fcsr=0x00000001
+fmadd.d fa0, fa1, fa2, fa3, rtz ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fmadd.d fa0, fa1, fa2, fa3, rtz ::
+ inputs: fa1=0x3ff0000000000000, fa2=0xbff0000000000000, fa3=0xbca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000000, fcsr=0x00000001
+fmadd.d fa0, fa1, fa2, fa3, rdn ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fmadd.d fa0, fa1, fa2, fa3, rdn ::
+ inputs: fa1=0x3ff0000000000000, fa2=0xbff0000000000000, fa3=0xbca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000001, fcsr=0x00000001
+fmadd.d fa0, fa1, fa2, fa3, rup ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000001, fcsr=0x00000001
+fmadd.d fa0, fa1, fa2, fa3, rup ::
+ inputs: fa1=0x3ff0000000000000, fa2=0xbff0000000000000, fa3=0xbca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000000, fcsr=0x00000001
+fmadd.d fa0, fa1, fa2, fa3, rmm ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000001, fcsr=0x00000001
+fmadd.d fa0, fa1, fa2, fa3, rmm ::
+ inputs: fa1=0x3ff0000000000000, fa2=0xbff0000000000000, fa3=0xbca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000001, fcsr=0x00000001
+fmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000002, fcsr=0x00000001
+fmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000020
+ output: fa0=0x3ff0000000000000, fcsr=0x00000021
+fmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0xbff0000000000000, fa3=0xbca0000000000000, fcsr=0x00000020
+ output: fa0=0xbff0000000000000, fcsr=0x00000021
+fmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000040
+ output: fa0=0x3ff0000000000000, fcsr=0x00000041
+fmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0xbff0000000000000, fa3=0xbca0000000000000, fcsr=0x00000040
+ output: fa0=0xbff0000000000001, fcsr=0x00000041
+fmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000060
+ output: fa0=0x3ff0000000000001, fcsr=0x00000061
+fmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0xbff0000000000000, fa3=0xbca0000000000000, fcsr=0x00000060
+ output: fa0=0xbff0000000000000, fcsr=0x00000061
+fmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000080
+ output: fa0=0x3ff0000000000001, fcsr=0x00000081
+fmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0xbff0000000000000, fa3=0xbca0000000000000, fcsr=0x00000080
+ output: fa0=0xbff0000000000001, fcsr=0x00000081
+fmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x4008000000000000, fa2=0x4000000000000000, fa3=0x3ff0000000000000, fcsr=0x00000000
+ output: fa0=0x4014000000000000, fcsr=0x00000000
+fmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ff0000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000000
+fmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x4000000000000000, fa2=0x0000000000000001, fa3=0x0000000000000001, fcsr=0x00000000
+ output: fa0=0x0000000000000001, fcsr=0x00000000
+fmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x4000000000000000, fa2=0x7fefffffffffffff, fa3=0x7fefffffffffffff, fcsr=0x00000000
+ output: fa0=0x7fefffffffffffff, fcsr=0x00000000
+fmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x4000000000000000, fa2=0x7fefffffffffffff, fa3=0x0000000000000000, fcsr=0x00000000
+ output: fa0=0x7ff0000000000000, fcsr=0x00000005
+fmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x4000000000000000, fa2=0x7ff0000000000000, fa3=0x7ff0000000000000, fcsr=0x00000000
+ output: fa0=0x7ff8000000000000, fcsr=0x00000010
+fmsub.d fa0, fa1, fa2, fa3, rne ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fmsub.d fa0, fa1, fa2, fa3, rne ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000002, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000002, fcsr=0x00000001
+fmsub.d fa0, fa1, fa2, fa3, rtz ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fmsub.d fa0, fa1, fa2, fa3, rtz ::
+ inputs: fa1=0x3ff0000000000000, fa2=0xbff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000000, fcsr=0x00000001
+fmsub.d fa0, fa1, fa2, fa3, rdn ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fmsub.d fa0, fa1, fa2, fa3, rdn ::
+ inputs: fa1=0x3ff0000000000000, fa2=0xbff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000001, fcsr=0x00000001
+fmsub.d fa0, fa1, fa2, fa3, rup ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000001, fcsr=0x00000001
+fmsub.d fa0, fa1, fa2, fa3, rup ::
+ inputs: fa1=0x3ff0000000000000, fa2=0xbff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000000, fcsr=0x00000001
+fmsub.d fa0, fa1, fa2, fa3, rmm ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000001, fcsr=0x00000001
+fmsub.d fa0, fa1, fa2, fa3, rmm ::
+ inputs: fa1=0x3ff0000000000000, fa2=0xbff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000001, fcsr=0x00000001
+fmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000002, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000002, fcsr=0x00000001
+fmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000020
+ output: fa0=0x3ff0000000000000, fcsr=0x00000021
+fmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0xbff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000020
+ output: fa0=0xbff0000000000000, fcsr=0x00000021
+fmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000040
+ output: fa0=0x3ff0000000000000, fcsr=0x00000041
+fmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0xbff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000040
+ output: fa0=0xbff0000000000001, fcsr=0x00000041
+fmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000060
+ output: fa0=0x3ff0000000000001, fcsr=0x00000061
+fmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0xbff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000060
+ output: fa0=0xbff0000000000000, fcsr=0x00000061
+fmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000080
+ output: fa0=0x3ff0000000000001, fcsr=0x00000081
+fmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0xbff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000080
+ output: fa0=0xbff0000000000001, fcsr=0x00000081
+fnmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x4008000000000000, fa2=0x4000000000000000, fa3=0x3ff0000000000000, fcsr=0x00000000
+ output: fa0=0xc014000000000000, fcsr=0x00000000
+fnmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ff0000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000000
+fnmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x4000000000000000, fa2=0x0000000000000001, fa3=0x0000000000000001, fcsr=0x00000000
+ output: fa0=0x8000000000000001, fcsr=0x00000000
+fnmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x4000000000000000, fa2=0x7fefffffffffffff, fa3=0x7fefffffffffffff, fcsr=0x00000000
+ output: fa0=0xffefffffffffffff, fcsr=0x00000000
+fnmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x4000000000000000, fa2=0x7fefffffffffffff, fa3=0x0000000000000000, fcsr=0x00000000
+ output: fa0=0xfff0000000000000, fcsr=0x00000005
+fnmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x4000000000000000, fa2=0x7ff0000000000000, fa3=0x7ff0000000000000, fcsr=0x00000000
+ output: fa0=0x7ff8000000000000, fcsr=0x00000010
+fnmsub.d fa0, fa1, fa2, fa3, rne ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fnmsub.d fa0, fa1, fa2, fa3, rne ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000002, fcsr=0x00000001
+fnmsub.d fa0, fa1, fa2, fa3, rtz ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fnmsub.d fa0, fa1, fa2, fa3, rtz ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0xbca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000000, fcsr=0x00000001
+fnmsub.d fa0, fa1, fa2, fa3, rdn ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fnmsub.d fa0, fa1, fa2, fa3, rdn ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0xbca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000001, fcsr=0x00000001
+fnmsub.d fa0, fa1, fa2, fa3, rup ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000001, fcsr=0x00000001
+fnmsub.d fa0, fa1, fa2, fa3, rup ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0xbca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000000, fcsr=0x00000001
+fnmsub.d fa0, fa1, fa2, fa3, rmm ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000001, fcsr=0x00000001
+fnmsub.d fa0, fa1, fa2, fa3, rmm ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0xbca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000001, fcsr=0x00000001
+fnmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fnmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000002, fcsr=0x00000001
+fnmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000020
+ output: fa0=0x3ff0000000000000, fcsr=0x00000021
+fnmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0xbca0000000000000, fcsr=0x00000020
+ output: fa0=0xbff0000000000000, fcsr=0x00000021
+fnmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000040
+ output: fa0=0x3ff0000000000000, fcsr=0x00000041
+fnmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0xbca0000000000000, fcsr=0x00000040
+ output: fa0=0xbff0000000000001, fcsr=0x00000041
+fnmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000060
+ output: fa0=0x3ff0000000000001, fcsr=0x00000061
+fnmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0xbca0000000000000, fcsr=0x00000060
+ output: fa0=0xbff0000000000000, fcsr=0x00000061
+fnmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000080
+ output: fa0=0x3ff0000000000001, fcsr=0x00000081
+fnmsub.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0xbca0000000000000, fcsr=0x00000080
+ output: fa0=0xbff0000000000001, fcsr=0x00000081
+fnmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x4008000000000000, fa2=0x4000000000000000, fa3=0x3ff0000000000000, fcsr=0x00000000
+ output: fa0=0xc01c000000000000, fcsr=0x00000000
+fnmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0xbff0000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000000
+fnmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x4000000000000000, fa2=0x0000000000000001, fa3=0x8000000000000001, fcsr=0x00000000
+ output: fa0=0x8000000000000001, fcsr=0x00000000
+fnmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x4000000000000000, fa2=0x7fefffffffffffff, fa3=0xffefffffffffffff, fcsr=0x00000000
+ output: fa0=0xffefffffffffffff, fcsr=0x00000000
+fnmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x4000000000000000, fa2=0x7fefffffffffffff, fa3=0x0000000000000000, fcsr=0x00000000
+ output: fa0=0xfff0000000000000, fcsr=0x00000005
+fnmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x4000000000000000, fa2=0x7ff0000000000000, fa3=0xfff0000000000000, fcsr=0x00000000
+ output: fa0=0x7ff8000000000000, fcsr=0x00000010
+fnmadd.d fa0, fa1, fa2, fa3, rne ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fnmadd.d fa0, fa1, fa2, fa3, rne ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000002, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000002, fcsr=0x00000001
+fnmadd.d fa0, fa1, fa2, fa3, rtz ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fnmadd.d fa0, fa1, fa2, fa3, rtz ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000000, fcsr=0x00000001
+fnmadd.d fa0, fa1, fa2, fa3, rdn ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fnmadd.d fa0, fa1, fa2, fa3, rdn ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000001, fcsr=0x00000001
+fnmadd.d fa0, fa1, fa2, fa3, rup ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000001, fcsr=0x00000001
+fnmadd.d fa0, fa1, fa2, fa3, rup ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000000, fcsr=0x00000001
+fnmadd.d fa0, fa1, fa2, fa3, rmm ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000001, fcsr=0x00000001
+fnmadd.d fa0, fa1, fa2, fa3, rmm ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000001, fcsr=0x00000001
+fnmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fnmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000002, fa3=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000002, fcsr=0x00000001
+fnmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000020
+ output: fa0=0x3ff0000000000000, fcsr=0x00000021
+fnmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000020
+ output: fa0=0xbff0000000000000, fcsr=0x00000021
+fnmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000040
+ output: fa0=0x3ff0000000000000, fcsr=0x00000041
+fnmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000040
+ output: fa0=0xbff0000000000001, fcsr=0x00000041
+fnmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000060
+ output: fa0=0x3ff0000000000001, fcsr=0x00000061
+fnmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000060
+ output: fa0=0xbff0000000000000, fcsr=0x00000061
+fnmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ff0000000000001, fa3=0x3ca0000000000000, fcsr=0x00000080
+ output: fa0=0x3ff0000000000001, fcsr=0x00000081
+fnmadd.d fa0, fa1, fa2, fa3 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fa3=0x3ca0000000000000, fcsr=0x00000080
+ output: fa0=0xbff0000000000001, fcsr=0x00000081
+fadd.d fa0, fa1, fa2 ::
+ inputs: fa1=0x4000000000000000, fa2=0x3ff0000000000000, fcsr=0x00000000
+ output: fa0=0x4008000000000000, fcsr=0x00000000
+fadd.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0xbff0000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000000
+fadd.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000001, fa2=0x0000000000000001, fcsr=0x00000000
+ output: fa0=0x0000000000000002, fcsr=0x00000000
+fadd.d fa0, fa1, fa2 ::
+ inputs: fa1=0x7fefffffffffffff, fa2=0x7fefffffffffffff, fcsr=0x00000000
+ output: fa0=0x7ff0000000000000, fcsr=0x00000005
+fadd.d fa0, fa1, fa2 ::
+ inputs: fa1=0xffefffffffffffff, fa2=0xffefffffffffffff, fcsr=0x00000000
+ output: fa0=0xfff0000000000000, fcsr=0x00000005
+fadd.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0010000000000001, fa2=0x8010000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000001, fcsr=0x00000000
+fadd.d fa0, fa1, fa2 ::
+ inputs: fa1=0x7ff0000000000000, fa2=0xfff0000000000000, fcsr=0x00000000
+ output: fa0=0x7ff8000000000000, fcsr=0x00000010
+fadd.d fa0, fa1, fa2, rne ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fadd.d fa0, fa1, fa2, rne ::
+ inputs: fa1=0x3ff0000000000001, fa2=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000002, fcsr=0x00000001
+fadd.d fa0, fa1, fa2, rtz ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fadd.d fa0, fa1, fa2, rtz ::
+ inputs: fa1=0xbff0000000000000, fa2=0xbca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000000, fcsr=0x00000001
+fadd.d fa0, fa1, fa2, rdn ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fadd.d fa0, fa1, fa2, rdn ::
+ inputs: fa1=0xbff0000000000000, fa2=0xbca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000001, fcsr=0x00000001
+fadd.d fa0, fa1, fa2, rup ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000001, fcsr=0x00000001
+fadd.d fa0, fa1, fa2, rup ::
+ inputs: fa1=0xbff0000000000000, fa2=0xbca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000000, fcsr=0x00000001
+fadd.d fa0, fa1, fa2, rmm ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000001, fcsr=0x00000001
+fadd.d fa0, fa1, fa2, rmm ::
+ inputs: fa1=0xbff0000000000000, fa2=0xbca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000001, fcsr=0x00000001
+fadd.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fadd.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000001, fa2=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000002, fcsr=0x00000001
+fadd.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ca0000000000000, fcsr=0x00000020
+ output: fa0=0x3ff0000000000000, fcsr=0x00000021
+fadd.d fa0, fa1, fa2 ::
+ inputs: fa1=0xbff0000000000000, fa2=0xbca0000000000000, fcsr=0x00000020
+ output: fa0=0xbff0000000000000, fcsr=0x00000021
+fadd.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ca0000000000000, fcsr=0x00000040
+ output: fa0=0x3ff0000000000000, fcsr=0x00000041
+fadd.d fa0, fa1, fa2 ::
+ inputs: fa1=0xbff0000000000000, fa2=0xbca0000000000000, fcsr=0x00000040
+ output: fa0=0xbff0000000000001, fcsr=0x00000041
+fadd.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ca0000000000000, fcsr=0x00000060
+ output: fa0=0x3ff0000000000001, fcsr=0x00000061
+fadd.d fa0, fa1, fa2 ::
+ inputs: fa1=0xbff0000000000000, fa2=0xbca0000000000000, fcsr=0x00000060
+ output: fa0=0xbff0000000000000, fcsr=0x00000061
+fadd.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ca0000000000000, fcsr=0x00000080
+ output: fa0=0x3ff0000000000001, fcsr=0x00000081
+fadd.d fa0, fa1, fa2 ::
+ inputs: fa1=0xbff0000000000000, fa2=0xbca0000000000000, fcsr=0x00000080
+ output: fa0=0xbff0000000000001, fcsr=0x00000081
+fsub.d fa0, fa1, fa2 ::
+ inputs: fa1=0x4000000000000000, fa2=0x3ff0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000000
+fsub.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x3ff0000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000000
+fsub.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000001, fa2=0x8000000000000001, fcsr=0x00000000
+ output: fa0=0x0000000000000002, fcsr=0x00000000
+fsub.d fa0, fa1, fa2 ::
+ inputs: fa1=0x7fefffffffffffff, fa2=0xffefffffffffffff, fcsr=0x00000000
+ output: fa0=0x7ff0000000000000, fcsr=0x00000005
+fsub.d fa0, fa1, fa2 ::
+ inputs: fa1=0xffefffffffffffff, fa2=0x7fefffffffffffff, fcsr=0x00000000
+ output: fa0=0xfff0000000000000, fcsr=0x00000005
+fsub.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0010000000000001, fa2=0x0010000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000001, fcsr=0x00000000
+fsub.d fa0, fa1, fa2 ::
+ inputs: fa1=0x7ff0000000000000, fa2=0x7ff0000000000000, fcsr=0x00000000
+ output: fa0=0x7ff8000000000000, fcsr=0x00000010
+fsub.d fa0, fa1, fa2, rne ::
+ inputs: fa1=0x3ff0000000000001, fa2=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fsub.d fa0, fa1, fa2, rne ::
+ inputs: fa1=0x3ff0000000000002, fa2=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000002, fcsr=0x00000001
+fsub.d fa0, fa1, fa2, rtz ::
+ inputs: fa1=0x3ff0000000000001, fa2=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fsub.d fa0, fa1, fa2, rtz ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000000, fcsr=0x00000001
+fsub.d fa0, fa1, fa2, rdn ::
+ inputs: fa1=0x3ff0000000000001, fa2=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fsub.d fa0, fa1, fa2, rdn ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000001, fcsr=0x00000001
+fsub.d fa0, fa1, fa2, rup ::
+ inputs: fa1=0x3ff0000000000001, fa2=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000001, fcsr=0x00000001
+fsub.d fa0, fa1, fa2, rup ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000000, fcsr=0x00000001
+fsub.d fa0, fa1, fa2, rmm ::
+ inputs: fa1=0x3ff0000000000001, fa2=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000001, fcsr=0x00000001
+fsub.d fa0, fa1, fa2, rmm ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000001, fcsr=0x00000001
+fsub.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000001, fa2=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fsub.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000002, fa2=0x3ca0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000002, fcsr=0x00000001
+fsub.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000001, fa2=0x3ca0000000000000, fcsr=0x00000020
+ output: fa0=0x3ff0000000000000, fcsr=0x00000021
+fsub.d fa0, fa1, fa2 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ca0000000000000, fcsr=0x00000020
+ output: fa0=0xbff0000000000000, fcsr=0x00000021
+fsub.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000001, fa2=0x3ca0000000000000, fcsr=0x00000040
+ output: fa0=0x3ff0000000000000, fcsr=0x00000041
+fsub.d fa0, fa1, fa2 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ca0000000000000, fcsr=0x00000040
+ output: fa0=0xbff0000000000001, fcsr=0x00000041
+fsub.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000001, fa2=0x3ca0000000000000, fcsr=0x00000060
+ output: fa0=0x3ff0000000000001, fcsr=0x00000061
+fsub.d fa0, fa1, fa2 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ca0000000000000, fcsr=0x00000060
+ output: fa0=0xbff0000000000000, fcsr=0x00000061
+fsub.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000001, fa2=0x3ca0000000000000, fcsr=0x00000080
+ output: fa0=0x3ff0000000000001, fcsr=0x00000081
+fsub.d fa0, fa1, fa2 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x3ca0000000000000, fcsr=0x00000080
+ output: fa0=0xbff0000000000001, fcsr=0x00000081
+fmul.d fa0, fa1, fa2 ::
+ inputs: fa1=0x4000000000000000, fa2=0x3ff0000000000000, fcsr=0x00000000
+ output: fa0=0x4000000000000000, fcsr=0x00000000
+fmul.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x0000000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000000
+fmul.d fa0, fa1, fa2 ::
+ inputs: fa1=0x1e60000000000000, fa2=0x1e60000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000001, fcsr=0x00000000
+fmul.d fa0, fa1, fa2 ::
+ inputs: fa1=0x7fefffffffffffff, fa2=0x7fefffffffffffff, fcsr=0x00000000
+ output: fa0=0x7ff0000000000000, fcsr=0x00000005
+fmul.d fa0, fa1, fa2 ::
+ inputs: fa1=0x7fefffffffffffff, fa2=0xffefffffffffffff, fcsr=0x00000000
+ output: fa0=0xfff0000000000000, fcsr=0x00000005
+fmul.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x7ff0000000000000, fcsr=0x00000000
+ output: fa0=0x7ff0000000000000, fcsr=0x00000000
+fmul.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000000, fa2=0x7ff0000000000000, fcsr=0x00000000
+ output: fa0=0x7ff8000000000000, fcsr=0x00000010
+fmul.d fa0, fa1, fa2, rne ::
+ inputs: fa1=0x0000000000000001, fa2=0x3fe0000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000003
+fmul.d fa0, fa1, fa2, rne ::
+ inputs: fa1=0x0000000000000003, fa2=0x3fe0000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000002, fcsr=0x00000003
+fmul.d fa0, fa1, fa2, rtz ::
+ inputs: fa1=0x0000000000000001, fa2=0x3fe0000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000003
+fmul.d fa0, fa1, fa2, rtz ::
+ inputs: fa1=0x8000000000000001, fa2=0x3fe0000000000000, fcsr=0x00000000
+ output: fa0=0x8000000000000000, fcsr=0x00000003
+fmul.d fa0, fa1, fa2, rdn ::
+ inputs: fa1=0x0000000000000001, fa2=0x3fe0000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000003
+fmul.d fa0, fa1, fa2, rdn ::
+ inputs: fa1=0x8000000000000001, fa2=0x3fe0000000000000, fcsr=0x00000000
+ output: fa0=0x8000000000000001, fcsr=0x00000003
+fmul.d fa0, fa1, fa2, rup ::
+ inputs: fa1=0x0000000000000001, fa2=0x3fe0000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000001, fcsr=0x00000003
+fmul.d fa0, fa1, fa2, rup ::
+ inputs: fa1=0x8000000000000001, fa2=0x3fe0000000000000, fcsr=0x00000000
+ output: fa0=0x8000000000000000, fcsr=0x00000003
+fmul.d fa0, fa1, fa2, rmm ::
+ inputs: fa1=0x0000000000000001, fa2=0x3fe0000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000001, fcsr=0x00000003
+fmul.d fa0, fa1, fa2, rmm ::
+ inputs: fa1=0x8000000000000001, fa2=0x3fe0000000000000, fcsr=0x00000000
+ output: fa0=0x8000000000000001, fcsr=0x00000003
+fmul.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000001, fa2=0x3fe0000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000003
+fmul.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000003, fa2=0x3fe0000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000002, fcsr=0x00000003
+fmul.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000001, fa2=0x3fe0000000000000, fcsr=0x00000020
+ output: fa0=0x0000000000000000, fcsr=0x00000023
+fmul.d fa0, fa1, fa2 ::
+ inputs: fa1=0x8000000000000001, fa2=0x3fe0000000000000, fcsr=0x00000020
+ output: fa0=0x8000000000000000, fcsr=0x00000023
+fmul.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000001, fa2=0x3fe0000000000000, fcsr=0x00000040
+ output: fa0=0x0000000000000000, fcsr=0x00000043
+fmul.d fa0, fa1, fa2 ::
+ inputs: fa1=0x8000000000000001, fa2=0x3fe0000000000000, fcsr=0x00000040
+ output: fa0=0x8000000000000001, fcsr=0x00000043
+fmul.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000001, fa2=0x3fe0000000000000, fcsr=0x00000060
+ output: fa0=0x0000000000000001, fcsr=0x00000063
+fmul.d fa0, fa1, fa2 ::
+ inputs: fa1=0x8000000000000001, fa2=0x3fe0000000000000, fcsr=0x00000060
+ output: fa0=0x8000000000000000, fcsr=0x00000063
+fmul.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000001, fa2=0x3fe0000000000000, fcsr=0x00000080
+ output: fa0=0x0000000000000001, fcsr=0x00000083
+fmul.d fa0, fa1, fa2 ::
+ inputs: fa1=0x8000000000000001, fa2=0x3fe0000000000000, fcsr=0x00000080
+ output: fa0=0x8000000000000001, fcsr=0x00000083
+fdiv.d fa0, fa1, fa2 ::
+ inputs: fa1=0x4000000000000000, fa2=0x3ff0000000000000, fcsr=0x00000000
+ output: fa0=0x4000000000000000, fcsr=0x00000000
+fdiv.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000000, fa2=0x3ff0000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000000
+fdiv.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x7fe0000000000000, fcsr=0x00000000
+ output: fa0=0x0008000000000000, fcsr=0x00000000
+fdiv.d fa0, fa1, fa2 ::
+ inputs: fa1=0x7fefffffffffffff, fa2=0x3fe0000000000000, fcsr=0x00000000
+ output: fa0=0x7ff0000000000000, fcsr=0x00000005
+fdiv.d fa0, fa1, fa2 ::
+ inputs: fa1=0x7fefffffffffffff, fa2=0xbfe0000000000000, fcsr=0x00000000
+ output: fa0=0xfff0000000000000, fcsr=0x00000005
+fdiv.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x7ff0000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000000
+fdiv.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x0000000000000000, fcsr=0x00000000
+ output: fa0=0x7ff0000000000000, fcsr=0x00000008
+fdiv.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000000, fa2=0x0000000000000000, fcsr=0x00000000
+ output: fa0=0x7ff8000000000000, fcsr=0x00000010
+fdiv.d fa0, fa1, fa2, rne ::
+ inputs: fa1=0x0000000000000001, fa2=0x4000000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000003
+fdiv.d fa0, fa1, fa2, rne ::
+ inputs: fa1=0x0000000000000003, fa2=0x4000000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000002, fcsr=0x00000003
+fdiv.d fa0, fa1, fa2, rtz ::
+ inputs: fa1=0x0000000000000001, fa2=0x4000000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000003
+fdiv.d fa0, fa1, fa2, rtz ::
+ inputs: fa1=0x8000000000000001, fa2=0x4000000000000000, fcsr=0x00000000
+ output: fa0=0x8000000000000000, fcsr=0x00000003
+fdiv.d fa0, fa1, fa2, rdn ::
+ inputs: fa1=0x0000000000000001, fa2=0x4000000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000003
+fdiv.d fa0, fa1, fa2, rdn ::
+ inputs: fa1=0x8000000000000001, fa2=0x4000000000000000, fcsr=0x00000000
+ output: fa0=0x8000000000000001, fcsr=0x00000003
+fdiv.d fa0, fa1, fa2, rup ::
+ inputs: fa1=0x0000000000000001, fa2=0x4000000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000001, fcsr=0x00000003
+fdiv.d fa0, fa1, fa2, rup ::
+ inputs: fa1=0x8000000000000001, fa2=0x4000000000000000, fcsr=0x00000000
+ output: fa0=0x8000000000000000, fcsr=0x00000003
+fdiv.d fa0, fa1, fa2, rmm ::
+ inputs: fa1=0x0000000000000001, fa2=0x4000000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000001, fcsr=0x00000003
+fdiv.d fa0, fa1, fa2, rmm ::
+ inputs: fa1=0x8000000000000001, fa2=0x4000000000000000, fcsr=0x00000000
+ output: fa0=0x8000000000000001, fcsr=0x00000003
+fdiv.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000001, fa2=0x4000000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000003
+fdiv.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000003, fa2=0x4000000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000002, fcsr=0x00000003
+fdiv.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000001, fa2=0x4000000000000000, fcsr=0x00000020
+ output: fa0=0x0000000000000000, fcsr=0x00000023
+fdiv.d fa0, fa1, fa2 ::
+ inputs: fa1=0x8000000000000001, fa2=0x4000000000000000, fcsr=0x00000020
+ output: fa0=0x8000000000000000, fcsr=0x00000023
+fdiv.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000001, fa2=0x4000000000000000, fcsr=0x00000040
+ output: fa0=0x0000000000000000, fcsr=0x00000043
+fdiv.d fa0, fa1, fa2 ::
+ inputs: fa1=0x8000000000000001, fa2=0x4000000000000000, fcsr=0x00000040
+ output: fa0=0x8000000000000001, fcsr=0x00000043
+fdiv.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000001, fa2=0x4000000000000000, fcsr=0x00000060
+ output: fa0=0x0000000000000001, fcsr=0x00000063
+fdiv.d fa0, fa1, fa2 ::
+ inputs: fa1=0x8000000000000001, fa2=0x4000000000000000, fcsr=0x00000060
+ output: fa0=0x8000000000000000, fcsr=0x00000063
+fdiv.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000001, fa2=0x4000000000000000, fcsr=0x00000080
+ output: fa0=0x0000000000000001, fcsr=0x00000083
+fdiv.d fa0, fa1, fa2 ::
+ inputs: fa1=0x8000000000000001, fa2=0x4000000000000000, fcsr=0x00000080
+ output: fa0=0x8000000000000001, fcsr=0x00000083
+fsqrt.d fa0, fa1 ::
+ inputs: fa1=0x0000000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000000
+fsqrt.d fa0, fa1 ::
+ inputs: fa1=0x7ff0000000000000, fcsr=0x00000000
+ output: fa0=0x7ff0000000000000, fcsr=0x00000000
+fsqrt.d fa0, fa1 ::
+ inputs: fa1=0x0000000000000001, fcsr=0x00000000
+ output: fa0=0x1e60000000000000, fcsr=0x00000000
+fsqrt.d fa0, fa1 ::
+ inputs: fa1=0x7ff8000000000000, fcsr=0x00000000
+ output: fa0=0x7ff8000000000000, fcsr=0x00000000
+fsqrt.d fa0, fa1 ::
+ inputs: fa1=0xbff0000000000000, fcsr=0x00000000
+ output: fa0=0x7ff8000000000000, fcsr=0x00000010
+fsqrt.d fa0, fa1, rne ::
+ inputs: fa1=0x3ff0000000000001, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fsqrt.d fa0, fa1, rne ::
+ inputs: fa1=0x3ff0000000000002, fcsr=0x00000000
+ output: fa0=0x3ff0000000000001, fcsr=0x00000001
+fsqrt.d fa0, fa1, rtz ::
+ inputs: fa1=0x3ff0000000000001, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fsqrt.d fa0, fa1, rtz ::
+ inputs: fa1=0x3ff0000000000002, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fsqrt.d fa0, fa1, rdn ::
+ inputs: fa1=0x3ff0000000000001, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fsqrt.d fa0, fa1, rdn ::
+ inputs: fa1=0x3ff0000000000002, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fsqrt.d fa0, fa1, rup ::
+ inputs: fa1=0x3ff0000000000001, fcsr=0x00000000
+ output: fa0=0x3ff0000000000001, fcsr=0x00000001
+fsqrt.d fa0, fa1, rup ::
+ inputs: fa1=0x3ff0000000000002, fcsr=0x00000000
+ output: fa0=0x3ff0000000000001, fcsr=0x00000001
+fsqrt.d fa0, fa1, rmm ::
+ inputs: fa1=0x3ff0000000000001, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fsqrt.d fa0, fa1, rmm ::
+ inputs: fa1=0x3ff0000000000002, fcsr=0x00000000
+ output: fa0=0x3ff0000000000001, fcsr=0x00000001
+fsqrt.d fa0, fa1 ::
+ inputs: fa1=0x3ff0000000000001, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000001
+fsqrt.d fa0, fa1 ::
+ inputs: fa1=0x3ff0000000000002, fcsr=0x00000000
+ output: fa0=0x3ff0000000000001, fcsr=0x00000001
+fsqrt.d fa0, fa1 ::
+ inputs: fa1=0x3ff0000000000001, fcsr=0x00000020
+ output: fa0=0x3ff0000000000000, fcsr=0x00000021
+fsqrt.d fa0, fa1 ::
+ inputs: fa1=0x3ff0000000000002, fcsr=0x00000020
+ output: fa0=0x3ff0000000000000, fcsr=0x00000021
+fsqrt.d fa0, fa1 ::
+ inputs: fa1=0x3ff0000000000001, fcsr=0x00000040
+ output: fa0=0x3ff0000000000000, fcsr=0x00000041
+fsqrt.d fa0, fa1 ::
+ inputs: fa1=0x3ff0000000000002, fcsr=0x00000040
+ output: fa0=0x3ff0000000000000, fcsr=0x00000041
+fsqrt.d fa0, fa1 ::
+ inputs: fa1=0x3ff0000000000001, fcsr=0x00000060
+ output: fa0=0x3ff0000000000001, fcsr=0x00000061
+fsqrt.d fa0, fa1 ::
+ inputs: fa1=0x3ff0000000000002, fcsr=0x00000060
+ output: fa0=0x3ff0000000000001, fcsr=0x00000061
+fsqrt.d fa0, fa1 ::
+ inputs: fa1=0x3ff0000000000001, fcsr=0x00000080
+ output: fa0=0x3ff0000000000000, fcsr=0x00000081
+fsqrt.d fa0, fa1 ::
+ inputs: fa1=0x3ff0000000000002, fcsr=0x00000080
+ output: fa0=0x3ff0000000000001, fcsr=0x00000081
+fsgnj.d fa0, fa1, fa1 ::
+ inputs: fa1=0x3ff0000000000000, fa1=0x3ff0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000000
+fsgnj.d fa0, fa1, fa1 ::
+ inputs: fa1=0xbff0000000000000, fa1=0xbff0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000000, fcsr=0x00000000
+fsgnj.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x7fffffffffffffff, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000000
+fsgnj.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x8000000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000000, fcsr=0x00000000
+fsgnj.d fa0, fa1, fa2 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x7fffffffffffffff, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000000
+fsgnj.d fa0, fa1, fa2 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x8000000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000000, fcsr=0x00000000
+fsgnjn.d fa0, fa1, fa1 ::
+ inputs: fa1=0x3ff0000000000000, fa1=0x3ff0000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000000, fcsr=0x00000000
+fsgnjn.d fa0, fa1, fa1 ::
+ inputs: fa1=0xbff0000000000000, fa1=0xbff0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000000
+fsgnjn.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x7fffffffffffffff, fcsr=0x00000000
+ output: fa0=0xbff0000000000000, fcsr=0x00000000
+fsgnjn.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x8000000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000000
+fsgnjn.d fa0, fa1, fa2 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x7fffffffffffffff, fcsr=0x00000000
+ output: fa0=0xbff0000000000000, fcsr=0x00000000
+fsgnjn.d fa0, fa1, fa2 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x8000000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000000
+fsgnjx.d fa0, fa1, fa1 ::
+ inputs: fa1=0x3ff0000000000000, fa1=0x3ff0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000000
+fsgnjx.d fa0, fa1, fa1 ::
+ inputs: fa1=0xbff0000000000000, fa1=0xbff0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000000
+fsgnjx.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x7fffffffffffffff, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000000
+fsgnjx.d fa0, fa1, fa2 ::
+ inputs: fa1=0x3ff0000000000000, fa2=0x8000000000000000, fcsr=0x00000000
+ output: fa0=0xbff0000000000000, fcsr=0x00000000
+fsgnjx.d fa0, fa1, fa2 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x7fffffffffffffff, fcsr=0x00000000
+ output: fa0=0xbff0000000000000, fcsr=0x00000000
+fsgnjx.d fa0, fa1, fa2 ::
+ inputs: fa1=0xbff0000000000000, fa2=0x8000000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000000
+fmin.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000000, fa2=0x3ff0000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000000
+fmin.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000000, fa2=0x8000000000000000, fcsr=0x00000000
+ output: fa0=0x8000000000000000, fcsr=0x00000000
+fmin.d fa0, fa1, fa2 ::
+ inputs: fa1=0x8000000000000000, fa2=0x0000000000000000, fcsr=0x00000000
+ output: fa0=0x8000000000000000, fcsr=0x00000000
+fmin.d fa0, fa1, fa2 ::
+ inputs: fa1=0x7ff0000000000000, fa2=0x7ff0000000000000, fcsr=0x00000000
+ output: fa0=0x7ff0000000000000, fcsr=0x00000000
+fmin.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000000, fa2=0x7ff8000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000000
+fmin.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000000, fa2=0x7ff4000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000010
+fmax.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000000, fa2=0x3ff0000000000000, fcsr=0x00000000
+ output: fa0=0x3ff0000000000000, fcsr=0x00000000
+fmax.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000000, fa2=0x8000000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000000
+fmax.d fa0, fa1, fa2 ::
+ inputs: fa1=0x8000000000000000, fa2=0x0000000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000000
+fmax.d fa0, fa1, fa2 ::
+ inputs: fa1=0x7ff0000000000000, fa2=0x7ff0000000000000, fcsr=0x00000000
+ output: fa0=0x7ff0000000000000, fcsr=0x00000000
+fmax.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000000, fa2=0x7ff8000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000000
+fmax.d fa0, fa1, fa2 ::
+ inputs: fa1=0x0000000000000000, fa2=0x7ff4000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000010
+fcvt.s.d fa0, fa1 ::
+ inputs: fa1=0x0000000000000000, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000000
+fcvt.s.d fa0, fa1 ::
+ inputs: fa1=0x0000000000000001, fcsr=0x00000000
+ output: fa0=0xffffffff00000000, fcsr=0x00000003
+fcvt.s.d fa0, fa1 ::
+ inputs: fa1=0x7ff0000000000000, fcsr=0x00000000
+ output: fa0=0xffffffff7f800000, fcsr=0x00000000
+fcvt.s.d fa0, fa1 ::
+ inputs: fa1=0x7ff8000000000000, fcsr=0x00000000
+ output: fa0=0xffffffff7fc00000, fcsr=0x00000000
+fcvt.s.d fa0, fa1 ::
+ inputs: fa1=0x47efffffe0000000, fcsr=0x00000000
+ output: fa0=0xffffffff7f7fffff, fcsr=0x00000000
+fcvt.s.d fa0, fa1 ::
+ inputs: fa1=0xc7efffffe0000000, fcsr=0x00000000
+ output: fa0=0xffffffffff7fffff, fcsr=0x00000000
+fcvt.s.d fa0, fa1 ::
+ inputs: fa1=0x47efffffe0000001, fcsr=0x00000000
+ output: fa0=0xffffffff7f7fffff, fcsr=0x00000001
+fcvt.s.d fa0, fa1 ::
+ inputs: fa1=0xc7efffffe0000001, fcsr=0x00000000
+ output: fa0=0xffffffffff7fffff, fcsr=0x00000001
+fcvt.s.d fa0, fa1 ::
+ inputs: fa1=0x7fefffffffffffff, fcsr=0x00000000
+ output: fa0=0xffffffff7f800000, fcsr=0x00000005
+fcvt.s.d fa0, fa1, rne ::
+ inputs: fa1=0x3ff0000010000000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fcvt.s.d fa0, fa1, rne ::
+ inputs: fa1=0x3ff0000030000000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800002, fcsr=0x00000001
+fcvt.s.d fa0, fa1, rtz ::
+ inputs: fa1=0x3ff0000010000000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fcvt.s.d fa0, fa1, rtz ::
+ inputs: fa1=0xbff0000010000000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000001
+fcvt.s.d fa0, fa1, rdn ::
+ inputs: fa1=0x3ff0000010000000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fcvt.s.d fa0, fa1, rdn ::
+ inputs: fa1=0xbff0000010000000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800001, fcsr=0x00000001
+fcvt.s.d fa0, fa1, rup ::
+ inputs: fa1=0x3ff0000010000000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800001, fcsr=0x00000001
+fcvt.s.d fa0, fa1, rup ::
+ inputs: fa1=0xbff0000010000000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800000, fcsr=0x00000001
+fcvt.s.d fa0, fa1, rmm ::
+ inputs: fa1=0x3ff0000010000000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800001, fcsr=0x00000001
+fcvt.s.d fa0, fa1, rmm ::
+ inputs: fa1=0xbff0000010000000, fcsr=0x00000000
+ output: fa0=0xffffffffbf800001, fcsr=0x00000001
+fcvt.s.d fa0, fa1 ::
+ inputs: fa1=0x3ff0000010000000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800000, fcsr=0x00000001
+fcvt.s.d fa0, fa1 ::
+ inputs: fa1=0x3ff0000030000000, fcsr=0x00000000
+ output: fa0=0xffffffff3f800002, fcsr=0x00000001
+fcvt.s.d fa0, fa1 ::
+ inputs: fa1=0x3ff0000010000000, fcsr=0x00000020
+ output: fa0=0xffffffff3f800000, fcsr=0x00000021
+fcvt.s.d fa0, fa1 ::
+ inputs: fa1=0xbff0000010000000, fcsr=0x00000020
+ output: fa0=0xffffffffbf800000, fcsr=0x00000021
+fcvt.s.d fa0, fa1 ::
+ inputs: fa1=0x3ff0000010000000, fcsr=0x00000040
+ output: fa0=0xffffffff3f800000, fcsr=0x00000041
+fcvt.s.d fa0, fa1 ::
+ inputs: fa1=0xbff0000010000000, fcsr=0x00000040
+ output: fa0=0xffffffffbf800001, fcsr=0x00000041
+fcvt.s.d fa0, fa1 ::
+ inputs: fa1=0x3ff0000010000000, fcsr=0x00000060
+ output: fa0=0xffffffff3f800001, fcsr=0x00000061
+fcvt.s.d fa0, fa1 ::
+ inputs: fa1=0xbff0000010000000, fcsr=0x00000060
+ output: fa0=0xffffffffbf800000, fcsr=0x00000061
+fcvt.s.d fa0, fa1 ::
+ inputs: fa1=0x3ff0000010000000, fcsr=0x00000080
+ output: fa0=0xffffffff3f800001, fcsr=0x00000081
+fcvt.s.d fa0, fa1 ::
+ inputs: fa1=0xbff0000010000000, fcsr=0x00000080
+ output: fa0=0xffffffffbf800001, fcsr=0x00000081
+fcvt.d.s fa0, fa1 ::
+ inputs: fa1=0xffffffff00000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000000
+fcvt.d.s fa0, fa1 ::
+ inputs: fa1=0xffffffff00000001, fcsr=0x00000000
+ output: fa0=0x36a0000000000000, fcsr=0x00000000
+fcvt.d.s fa0, fa1 ::
+ inputs: fa1=0xffffffff7f800000, fcsr=0x00000000
+ output: fa0=0x7ff0000000000000, fcsr=0x00000000
+fcvt.d.s fa0, fa1 ::
+ inputs: fa1=0xffffffff7fc00000, fcsr=0x00000000
+ output: fa0=0x7ff8000000000000, fcsr=0x00000000
+fcvt.d.s fa0, fa1 ::
+ inputs: fa1=0xffffffff7f7fffff, fcsr=0x00000000
+ output: fa0=0x47efffffe0000000, fcsr=0x00000000
+fcvt.d.s fa0, fa1 ::
+ inputs: fa1=0xffffffffff7fffff, fcsr=0x00000000
+ output: fa0=0xc7efffffe0000000, fcsr=0x00000000
+feq.d a0, fa0, fa1 ::
+ inputs: fa0=0x0000000000000000, fa1=0x3ff0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+feq.d a0, fa0, fa1 ::
+ inputs: fa0=0x0000000000000000, fa1=0x0000000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+feq.d a0, fa0, fa1 ::
+ inputs: fa0=0x0000000000000000, fa1=0x8000000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+feq.d a0, fa0, fa1 ::
+ inputs: fa0=0x8000000000000000, fa1=0x0000000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+feq.d a0, fa0, fa1 ::
+ inputs: fa0=0x7ff0000000000000, fa1=0x7ff0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+feq.d a0, fa0, fa1 ::
+ inputs: fa0=0x0000000000000000, fa1=0x7ff8000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+feq.d a0, fa0, fa1 ::
+ inputs: fa0=0x0000000000000000, fa1=0x7ff4000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000010
+feq.d zero, fa0, fa1 ::
+ inputs: fa0=0x7ff4000000000000, fa1=0x7ff4000000000000, fcsr=0x00000000
+ output: zero=0x0000000000000000, fcsr=0x00000010
+flt.d a0, fa0, fa1 ::
+ inputs: fa0=0x0000000000000000, fa1=0x0000000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+flt.d a0, fa0, fa1 ::
+ inputs: fa0=0x0000000000000000, fa1=0x3ff0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+flt.d a0, fa0, fa1 ::
+ inputs: fa0=0x0000000000000000, fa1=0x8000000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+flt.d a0, fa0, fa1 ::
+ inputs: fa0=0x8000000000000000, fa1=0x0000000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+flt.d a0, fa0, fa1 ::
+ inputs: fa0=0x7ff0000000000000, fa1=0x7ff0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+flt.d a0, fa0, fa1 ::
+ inputs: fa0=0x0000000000000000, fa1=0x7ff8000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000010
+flt.d a0, fa0, fa1 ::
+ inputs: fa0=0x0000000000000000, fa1=0x7ff4000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000010
+flt.d zero, fa0, fa1 ::
+ inputs: fa0=0x7ff4000000000000, fa1=0x7ff4000000000000, fcsr=0x00000000
+ output: zero=0x0000000000000000, fcsr=0x00000010
+fle.d a0, fa0, fa1 ::
+ inputs: fa0=0x3ff0000000000000, fa1=0x0000000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+fle.d a0, fa0, fa1 ::
+ inputs: fa0=0x0000000000000000, fa1=0x0000000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+fle.d a0, fa0, fa1 ::
+ inputs: fa0=0x0000000000000000, fa1=0x3ff0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+fle.d a0, fa0, fa1 ::
+ inputs: fa0=0x0000000000000000, fa1=0x8000000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+fle.d a0, fa0, fa1 ::
+ inputs: fa0=0x8000000000000000, fa1=0x0000000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+fle.d a0, fa0, fa1 ::
+ inputs: fa0=0x7ff0000000000000, fa1=0x7ff0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+fle.d a0, fa0, fa1 ::
+ inputs: fa0=0x0000000000000000, fa1=0x7ff8000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000010
+fle.d a0, fa0, fa1 ::
+ inputs: fa0=0x0000000000000000, fa1=0x7ff4000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000010
+fle.d zero, fa0, fa1 ::
+ inputs: fa0=0x7ff4000000000000, fa1=0x7ff4000000000000, fcsr=0x00000000
+ output: zero=0x0000000000000000, fcsr=0x00000010
+fclass.d a0, fa0 ::
+ inputs: fa0=0xfff0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000000
+fclass.d a0, fa0 ::
+ inputs: fa0=0xbff0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000002, fcsr=0x00000000
+fclass.d a0, fa0 ::
+ inputs: fa0=0x8000000000000001, fcsr=0x00000000
+ output: a0=0x0000000000000004, fcsr=0x00000000
+fclass.d a0, fa0 ::
+ inputs: fa0=0x8000000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000008, fcsr=0x00000000
+fclass.d a0, fa0 ::
+ inputs: fa0=0x0000000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000010, fcsr=0x00000000
+fclass.d a0, fa0 ::
+ inputs: fa0=0x0000000000000001, fcsr=0x00000000
+ output: a0=0x0000000000000020, fcsr=0x00000000
+fclass.d a0, fa0 ::
+ inputs: fa0=0x3ff0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000040, fcsr=0x00000000
+fclass.d a0, fa0 ::
+ inputs: fa0=0x7ff0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000080, fcsr=0x00000000
+fclass.d a0, fa0 ::
+ inputs: fa0=0x7ff4000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000100, fcsr=0x00000000
+fclass.d a0, fa0 ::
+ inputs: fa0=0x7ff8000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000200, fcsr=0x00000000
+fclass.d zero, fa0 ::
+ inputs: fa0=0xfff0000000000000, fcsr=0x00000000
+ output: zero=0x0000000000000000, fcsr=0x00000000
+fcvt.w.d a0, fa0 ::
+ inputs: fa0=0x0000000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+fcvt.w.d a0, fa0 ::
+ inputs: fa0=0x0000000000000001, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.w.d a0, fa0 ::
+ inputs: fa0=0x7ff0000000000000, fcsr=0x00000000
+ output: a0=0x000000007fffffff, fcsr=0x00000010
+fcvt.w.d a0, fa0 ::
+ inputs: fa0=0x7ff8000000000000, fcsr=0x00000000
+ output: a0=0x000000007fffffff, fcsr=0x00000010
+fcvt.w.d a0, fa0 ::
+ inputs: fa0=0x41dfffffffc00000, fcsr=0x00000000
+ output: a0=0x000000007fffffff, fcsr=0x00000000
+fcvt.w.d a0, fa0 ::
+ inputs: fa0=0xc1e0000000000000, fcsr=0x00000000
+ output: a0=0xffffffff80000000, fcsr=0x00000000
+fcvt.w.d a0, fa0 ::
+ inputs: fa0=0x41e0000000000000, fcsr=0x00000000
+ output: a0=0x000000007fffffff, fcsr=0x00000010
+fcvt.w.d a0, fa0 ::
+ inputs: fa0=0xc1e0000000200000, fcsr=0x00000000
+ output: a0=0xffffffff80000000, fcsr=0x00000010
+fcvt.w.d zero, fa0 ::
+ inputs: fa0=0x3ff0000000000000, fcsr=0x00000000
+ output: zero=0x0000000000000000, fcsr=0x00000000
+fcvt.w.d a0, fa0, rne ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.w.d a0, fa0, rne ::
+ inputs: fa0=0x3ff8000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000002, fcsr=0x00000001
+fcvt.w.d a0, fa0, rtz ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.w.d a0, fa0, rtz ::
+ inputs: fa0=0xbfe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.w.d a0, fa0, rdn ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.w.d a0, fa0, rdn ::
+ inputs: fa0=0xbfe0000000000000, fcsr=0x00000000
+ output: a0=0xffffffffffffffff, fcsr=0x00000001
+fcvt.w.d a0, fa0, rup ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000001
+fcvt.w.d a0, fa0, rup ::
+ inputs: fa0=0xbfe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.w.d a0, fa0, rmm ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000001
+fcvt.w.d a0, fa0, rmm ::
+ inputs: fa0=0xbfe0000000000000, fcsr=0x00000000
+ output: a0=0xffffffffffffffff, fcsr=0x00000001
+fcvt.w.d a0, fa0 ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.w.d a0, fa0 ::
+ inputs: fa0=0x3ff8000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000002, fcsr=0x00000001
+fcvt.w.d a0, fa0 ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000020
+ output: a0=0x0000000000000000, fcsr=0x00000021
+fcvt.w.d a0, fa0 ::
+ inputs: fa0=0xbfe0000000000000, fcsr=0x00000020
+ output: a0=0x0000000000000000, fcsr=0x00000021
+fcvt.w.d a0, fa0 ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000040
+ output: a0=0x0000000000000000, fcsr=0x00000041
+fcvt.w.d a0, fa0 ::
+ inputs: fa0=0xbfe0000000000000, fcsr=0x00000040
+ output: a0=0xffffffffffffffff, fcsr=0x00000041
+fcvt.w.d a0, fa0 ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000060
+ output: a0=0x0000000000000001, fcsr=0x00000061
+fcvt.w.d a0, fa0 ::
+ inputs: fa0=0xbfe0000000000000, fcsr=0x00000060
+ output: a0=0x0000000000000000, fcsr=0x00000061
+fcvt.w.d a0, fa0 ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000080
+ output: a0=0x0000000000000001, fcsr=0x00000081
+fcvt.w.d a0, fa0 ::
+ inputs: fa0=0xbfe0000000000000, fcsr=0x00000080
+ output: a0=0xffffffffffffffff, fcsr=0x00000081
+fcvt.wu.d a0, fa0 ::
+ inputs: fa0=0x0000000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+fcvt.wu.d a0, fa0 ::
+ inputs: fa0=0x0000000000000001, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.wu.d a0, fa0 ::
+ inputs: fa0=0x7ff0000000000000, fcsr=0x00000000
+ output: a0=0xffffffffffffffff, fcsr=0x00000010
+fcvt.wu.d a0, fa0 ::
+ inputs: fa0=0x7ff8000000000000, fcsr=0x00000000
+ output: a0=0xffffffffffffffff, fcsr=0x00000010
+fcvt.wu.d a0, fa0 ::
+ inputs: fa0=0x41efffffffe00000, fcsr=0x00000000
+ output: a0=0xffffffffffffffff, fcsr=0x00000000
+fcvt.wu.d a0, fa0 ::
+ inputs: fa0=0xbff0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000010
+fcvt.wu.d zero, fa0 ::
+ inputs: fa0=0x3ff0000000000000, fcsr=0x00000000
+ output: zero=0x0000000000000000, fcsr=0x00000000
+fcvt.wu.d a0, fa0, rne ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.wu.d a0, fa0, rne ::
+ inputs: fa0=0x3ff8000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000002, fcsr=0x00000001
+fcvt.wu.d a0, fa0, rtz ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.wu.d a0, fa0, rdn ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.wu.d a0, fa0, rup ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000001
+fcvt.wu.d a0, fa0, rmm ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000001
+fcvt.wu.d a0, fa0 ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.wu.d a0, fa0 ::
+ inputs: fa0=0x3ff8000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000002, fcsr=0x00000001
+fcvt.wu.d a0, fa0 ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000020
+ output: a0=0x0000000000000000, fcsr=0x00000021
+fcvt.wu.d a0, fa0 ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000040
+ output: a0=0x0000000000000000, fcsr=0x00000041
+fcvt.wu.d a0, fa0 ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000060
+ output: a0=0x0000000000000001, fcsr=0x00000061
+fcvt.wu.d a0, fa0 ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000080
+ output: a0=0x0000000000000001, fcsr=0x00000081
+fcvt.d.w fa0, a0 ::
+ inputs: a0=0x0000000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000000
+fcvt.d.w fa0, a0 ::
+ inputs: a0=0x000000007fffffff, fcsr=0x00000000
+ output: fa0=0x41dfffffffc00000, fcsr=0x00000000
+fcvt.d.w fa0, a0 ::
+ inputs: a0=0xffffffff80000000, fcsr=0x00000000
+ output: fa0=0xc1e0000000000000, fcsr=0x00000000
+fcvt.d.wu fa0, a0 ::
+ inputs: a0=0x0000000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000000
+fcvt.d.wu fa0, a0 ::
+ inputs: a0=0x00000000ffffffff, fcsr=0x00000000
+ output: fa0=0x41efffffffe00000, fcsr=0x00000000
+
+RV64D double-precision FP instruction set, additions
+fcvt.l.d a0, fa0 ::
+ inputs: fa0=0x0000000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+fcvt.l.d a0, fa0 ::
+ inputs: fa0=0x0000000000000001, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.l.d a0, fa0 ::
+ inputs: fa0=0x7ff0000000000000, fcsr=0x00000000
+ output: a0=0x7fffffffffffffff, fcsr=0x00000010
+fcvt.l.d a0, fa0 ::
+ inputs: fa0=0x7ff8000000000000, fcsr=0x00000000
+ output: a0=0x7fffffffffffffff, fcsr=0x00000010
+fcvt.l.d a0, fa0 ::
+ inputs: fa0=0x43dfffffffffffff, fcsr=0x00000000
+ output: a0=0x7ffffffffffffc00, fcsr=0x00000000
+fcvt.l.d a0, fa0 ::
+ inputs: fa0=0xc3e0000000000000, fcsr=0x00000000
+ output: a0=0x8000000000000000, fcsr=0x00000000
+fcvt.l.d a0, fa0 ::
+ inputs: fa0=0x43e0000000000000, fcsr=0x00000000
+ output: a0=0x7fffffffffffffff, fcsr=0x00000010
+fcvt.l.d a0, fa0 ::
+ inputs: fa0=0xc3e0000000000001, fcsr=0x00000000
+ output: a0=0x8000000000000000, fcsr=0x00000010
+fcvt.l.d zero, fa0 ::
+ inputs: fa0=0x3ff0000000000000, fcsr=0x00000000
+ output: zero=0x0000000000000000, fcsr=0x00000000
+fcvt.l.d a0, fa0, rne ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.l.d a0, fa0, rne ::
+ inputs: fa0=0x3ff8000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000002, fcsr=0x00000001
+fcvt.l.d a0, fa0, rtz ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.l.d a0, fa0, rtz ::
+ inputs: fa0=0xbfe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.l.d a0, fa0, rdn ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.l.d a0, fa0, rdn ::
+ inputs: fa0=0xbfe0000000000000, fcsr=0x00000000
+ output: a0=0xffffffffffffffff, fcsr=0x00000001
+fcvt.l.d a0, fa0, rup ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000001
+fcvt.l.d a0, fa0, rup ::
+ inputs: fa0=0xbfe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.l.d a0, fa0, rmm ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000001
+fcvt.l.d a0, fa0, rmm ::
+ inputs: fa0=0xbfe0000000000000, fcsr=0x00000000
+ output: a0=0xffffffffffffffff, fcsr=0x00000001
+fcvt.l.d a0, fa0 ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.l.d a0, fa0 ::
+ inputs: fa0=0x3ff8000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000002, fcsr=0x00000001
+fcvt.l.d a0, fa0 ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000020
+ output: a0=0x0000000000000000, fcsr=0x00000021
+fcvt.l.d a0, fa0 ::
+ inputs: fa0=0xbfe0000000000000, fcsr=0x00000020
+ output: a0=0x0000000000000000, fcsr=0x00000021
+fcvt.l.d a0, fa0 ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000040
+ output: a0=0x0000000000000000, fcsr=0x00000041
+fcvt.l.d a0, fa0 ::
+ inputs: fa0=0xbfe0000000000000, fcsr=0x00000040
+ output: a0=0xffffffffffffffff, fcsr=0x00000041
+fcvt.l.d a0, fa0 ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000060
+ output: a0=0x0000000000000001, fcsr=0x00000061
+fcvt.l.d a0, fa0 ::
+ inputs: fa0=0xbfe0000000000000, fcsr=0x00000060
+ output: a0=0x0000000000000000, fcsr=0x00000061
+fcvt.l.d a0, fa0 ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000080
+ output: a0=0x0000000000000001, fcsr=0x00000081
+fcvt.l.d a0, fa0 ::
+ inputs: fa0=0xbfe0000000000000, fcsr=0x00000080
+ output: a0=0xffffffffffffffff, fcsr=0x00000081
+fcvt.lu.d a0, fa0 ::
+ inputs: fa0=0x0000000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000000
+fcvt.lu.d a0, fa0 ::
+ inputs: fa0=0x0000000000000001, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.lu.d a0, fa0 ::
+ inputs: fa0=0x7ff0000000000000, fcsr=0x00000000
+ output: a0=0xffffffffffffffff, fcsr=0x00000010
+fcvt.lu.d a0, fa0 ::
+ inputs: fa0=0x7ff8000000000000, fcsr=0x00000000
+ output: a0=0xffffffffffffffff, fcsr=0x00000010
+fcvt.lu.d a0, fa0 ::
+ inputs: fa0=0x43efffffffffffff, fcsr=0x00000000
+ output: a0=0xfffffffffffff800, fcsr=0x00000000
+fcvt.lu.d a0, fa0 ::
+ inputs: fa0=0x43f0000000000000, fcsr=0x00000000
+ output: a0=0xffffffffffffffff, fcsr=0x00000010
+fcvt.lu.d a0, fa0 ::
+ inputs: fa0=0xbff0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000010
+fcvt.lu.d zero, fa0 ::
+ inputs: fa0=0x3ff0000000000000, fcsr=0x00000000
+ output: zero=0x0000000000000000, fcsr=0x00000000
+fcvt.lu.d a0, fa0, rne ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.lu.d a0, fa0, rne ::
+ inputs: fa0=0x3ff8000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000002, fcsr=0x00000001
+fcvt.lu.d a0, fa0, rtz ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.lu.d a0, fa0, rdn ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.lu.d a0, fa0, rup ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000001
+fcvt.lu.d a0, fa0, rmm ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000001, fcsr=0x00000001
+fcvt.lu.d a0, fa0 ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000000, fcsr=0x00000001
+fcvt.lu.d a0, fa0 ::
+ inputs: fa0=0x3ff8000000000000, fcsr=0x00000000
+ output: a0=0x0000000000000002, fcsr=0x00000001
+fcvt.lu.d a0, fa0 ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000020
+ output: a0=0x0000000000000000, fcsr=0x00000021
+fcvt.lu.d a0, fa0 ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000040
+ output: a0=0x0000000000000000, fcsr=0x00000041
+fcvt.lu.d a0, fa0 ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000060
+ output: a0=0x0000000000000001, fcsr=0x00000061
+fcvt.lu.d a0, fa0 ::
+ inputs: fa0=0x3fe0000000000000, fcsr=0x00000080
+ output: a0=0x0000000000000001, fcsr=0x00000081
+fmv.x.d a0, fa0 ::
+ inputs: fa0=0xabcdef0123456789, fcsr=0x00000000
+ output: a0=0xabcdef0123456789, fcsr=0x00000000
+fmv.x.d zero, fa0 ::
+ inputs: fa0=0x3ff0000000000000, fcsr=0x00000000
+ output: zero=0x0000000000000000, fcsr=0x00000000
+fcvt.d.l fa0, a0 ::
+ inputs: a0=0x0000000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000000
+fcvt.d.l fa0, a0 ::
+ inputs: a0=0x7ffffffffffffc00, fcsr=0x00000000
+ output: fa0=0x43dfffffffffffff, fcsr=0x00000000
+fcvt.d.l fa0, a0 ::
+ inputs: a0=0x7fffffffffffffff, fcsr=0x00000000
+ output: fa0=0x43e0000000000000, fcsr=0x00000001
+fcvt.d.l fa0, a0 ::
+ inputs: a0=0x8000000000000000, fcsr=0x00000000
+ output: fa0=0xc3e0000000000000, fcsr=0x00000000
+fcvt.d.l fa0, a0, rne ::
+ inputs: a0=0x0020000000000001, fcsr=0x00000000
+ output: fa0=0x4340000000000000, fcsr=0x00000001
+fcvt.d.l fa0, a0, rne ::
+ inputs: a0=0x0020000000000003, fcsr=0x00000000
+ output: fa0=0x4340000000000002, fcsr=0x00000001
+fcvt.d.l fa0, a0, rtz ::
+ inputs: a0=0x0020000000000001, fcsr=0x00000000
+ output: fa0=0x4340000000000000, fcsr=0x00000001
+fcvt.d.l fa0, a0, rtz ::
+ inputs: a0=0xffdfffffffffffff, fcsr=0x00000000
+ output: fa0=0xc340000000000000, fcsr=0x00000001
+fcvt.d.l fa0, a0, rdn ::
+ inputs: a0=0x0020000000000001, fcsr=0x00000000
+ output: fa0=0x4340000000000000, fcsr=0x00000001
+fcvt.d.l fa0, a0, rdn ::
+ inputs: a0=0xffdfffffffffffff, fcsr=0x00000000
+ output: fa0=0xc340000000000001, fcsr=0x00000001
+fcvt.d.l fa0, a0, rup ::
+ inputs: a0=0x0020000000000001, fcsr=0x00000000
+ output: fa0=0x4340000000000001, fcsr=0x00000001
+fcvt.d.l fa0, a0, rup ::
+ inputs: a0=0xffdfffffffffffff, fcsr=0x00000000
+ output: fa0=0xc340000000000000, fcsr=0x00000001
+fcvt.d.l fa0, a0, rmm ::
+ inputs: a0=0x0020000000000001, fcsr=0x00000000
+ output: fa0=0x4340000000000001, fcsr=0x00000001
+fcvt.d.l fa0, a0, rmm ::
+ inputs: a0=0xffdfffffffffffff, fcsr=0x00000000
+ output: fa0=0xc340000000000001, fcsr=0x00000001
+fcvt.d.l fa0, a0 ::
+ inputs: a0=0x0020000000000001, fcsr=0x00000000
+ output: fa0=0x4340000000000000, fcsr=0x00000001
+fcvt.d.l fa0, a0 ::
+ inputs: a0=0x0020000000000003, fcsr=0x00000000
+ output: fa0=0x4340000000000002, fcsr=0x00000001
+fcvt.d.l fa0, a0 ::
+ inputs: a0=0x0020000000000001, fcsr=0x00000020
+ output: fa0=0x4340000000000000, fcsr=0x00000021
+fcvt.d.l fa0, a0 ::
+ inputs: a0=0xffdfffffffffffff, fcsr=0x00000020
+ output: fa0=0xc340000000000000, fcsr=0x00000021
+fcvt.d.l fa0, a0 ::
+ inputs: a0=0x0020000000000001, fcsr=0x00000040
+ output: fa0=0x4340000000000000, fcsr=0x00000041
+fcvt.d.l fa0, a0 ::
+ inputs: a0=0xffdfffffffffffff, fcsr=0x00000040
+ output: fa0=0xc340000000000001, fcsr=0x00000041
+fcvt.d.l fa0, a0 ::
+ inputs: a0=0x0020000000000001, fcsr=0x00000060
+ output: fa0=0x4340000000000001, fcsr=0x00000061
+fcvt.d.l fa0, a0 ::
+ inputs: a0=0xffdfffffffffffff, fcsr=0x00000060
+ output: fa0=0xc340000000000000, fcsr=0x00000061
+fcvt.d.l fa0, a0 ::
+ inputs: a0=0x0020000000000001, fcsr=0x00000080
+ output: fa0=0x4340000000000001, fcsr=0x00000081
+fcvt.d.l fa0, a0 ::
+ inputs: a0=0xffdfffffffffffff, fcsr=0x00000080
+ output: fa0=0xc340000000000001, fcsr=0x00000081
+fcvt.d.lu fa0, a0 ::
+ inputs: a0=0x0000000000000000, fcsr=0x00000000
+ output: fa0=0x0000000000000000, fcsr=0x00000000
+fcvt.d.lu fa0, a0 ::
+ inputs: a0=0xfffffffffffff800, fcsr=0x00000000
+ output: fa0=0x43efffffffffffff, fcsr=0x00000000
+fcvt.d.lu fa0, a0 ::
+ inputs: a0=0xffffffffffffffff, fcsr=0x00000000
+ output: fa0=0x43f0000000000000, fcsr=0x00000001
+fcvt.d.lu fa0, a0, rne ::
+ inputs: a0=0x0020000000000001, fcsr=0x00000000
+ output: fa0=0x4340000000000000, fcsr=0x00000001
+fcvt.d.lu fa0, a0, rne ::
+ inputs: a0=0x0020000000000003, fcsr=0x00000000
+ output: fa0=0x4340000000000002, fcsr=0x00000001
+fcvt.d.lu fa0, a0, rtz ::
+ inputs: a0=0x0020000000000001, fcsr=0x00000000
+ output: fa0=0x4340000000000000, fcsr=0x00000001
+fcvt.d.lu fa0, a0, rdn ::
+ inputs: a0=0x0020000000000001, fcsr=0x00000000
+ output: fa0=0x4340000000000000, fcsr=0x00000001
+fcvt.d.lu fa0, a0, rup ::
+ inputs: a0=0x0020000000000001, fcsr=0x00000000
+ output: fa0=0x4340000000000001, fcsr=0x00000001
+fcvt.d.lu fa0, a0, rmm ::
+ inputs: a0=0x0020000000000001, fcsr=0x00000000
+ output: fa0=0x4340000000000001, fcsr=0x00000001
+fcvt.d.lu fa0, a0 ::
+ inputs: a0=0x0020000000000001, fcsr=0x00000000
+ output: fa0=0x4340000000000000, fcsr=0x00000001
+fcvt.d.lu fa0, a0 ::
+ inputs: a0=0x0020000000000003, fcsr=0x00000000
+ output: fa0=0x4340000000000002, fcsr=0x00000001
+fcvt.d.lu fa0, a0 ::
+ inputs: a0=0x0020000000000001, fcsr=0x00000020
+ output: fa0=0x4340000000000000, fcsr=0x00000021
+fcvt.d.lu fa0, a0 ::
+ inputs: a0=0x0020000000000001, fcsr=0x00000040
+ output: fa0=0x4340000000000000, fcsr=0x00000041
+fcvt.d.lu fa0, a0 ::
+ inputs: a0=0x0020000000000001, fcsr=0x00000060
+ output: fa0=0x4340000000000001, fcsr=0x00000061
+fcvt.d.lu fa0, a0 ::
+ inputs: a0=0x0020000000000001, fcsr=0x00000080
+ output: fa0=0x4340000000000001, fcsr=0x00000081
+fmv.d.x fa0, a0 ::
+ inputs: a0=0xabcdef0123456789, fcsr=0x00000000
+ output: fa0=0xabcdef0123456789, fcsr=0x00000000
--- /dev/null
+prog: float64
+vgopts: -q
--- /dev/null
+/* Tests for the RV64I base integer instruction set. */
+
+#include "testinst.h"
+
+static void test_integer_shared(void)
+{
+ printf("RV64I base instruction set, shared operations\n");
+
+ /* ----------------- lui rd, imm[31:12] ------------------ */
+ TESTINST_1_0(4, "lui a0, 0", a0);
+ TESTINST_1_0(4, "lui a0, 1", a0);
+ TESTINST_1_0(4, "lui a0, 2", a0);
+ TESTINST_1_0(4, "lui a0, 4", a0);
+ TESTINST_1_0(4, "lui a0, 8", a0);
+ TESTINST_1_0(4, "lui a0, 16", a0);
+ TESTINST_1_0(4, "lui a0, 32", a0);
+ TESTINST_1_0(4, "lui a0, 64", a0);
+ TESTINST_1_0(4, "lui a0, 128", a0);
+ TESTINST_1_0(4, "lui a0, 256", a0);
+ TESTINST_1_0(4, "lui a0, 512", a0);
+ TESTINST_1_0(4, "lui a0, 1024", a0);
+ TESTINST_1_0(4, "lui a0, 2048", a0);
+ TESTINST_1_0(4, "lui a0, 4096", a0);
+ TESTINST_1_0(4, "lui a0, 8192", a0);
+ TESTINST_1_0(4, "lui a0, 16384", a0);
+ TESTINST_1_0(4, "lui a0, 32768", a0);
+ TESTINST_1_0(4, "lui a0, 65536", a0);
+ TESTINST_1_0(4, "lui a0, 131072", a0);
+ TESTINST_1_0(4, "lui a0, 262144", a0);
+ TESTINST_1_0(4, "lui a0, 524288", a0);
+ TESTINST_1_0(4, "lui a0, 1048575", a0);
+
+ TESTINST_1_0(4, "lui t6, 1", t6);
+ TESTINST_1_0(4, "lui zero, 1", zero);
+
+ /* ---------------- auipc rd, imm[31:12] ----------------- */
+ TESTINST_1_0_AUIPC(4, "auipc a0, 0", a0);
+ TESTINST_1_0_AUIPC(4, "auipc a0, 1", a0);
+ TESTINST_1_0_AUIPC(4, "auipc a0, 2", a0);
+ TESTINST_1_0_AUIPC(4, "auipc a0, 4", a0);
+ TESTINST_1_0_AUIPC(4, "auipc a0, 8", a0);
+ TESTINST_1_0_AUIPC(4, "auipc a0, 16", a0);
+ TESTINST_1_0_AUIPC(4, "auipc a0, 32", a0);
+ TESTINST_1_0_AUIPC(4, "auipc a0, 64", a0);
+ TESTINST_1_0_AUIPC(4, "auipc a0, 128", a0);
+ TESTINST_1_0_AUIPC(4, "auipc a0, 256", a0);
+ TESTINST_1_0_AUIPC(4, "auipc a0, 512", a0);
+ TESTINST_1_0_AUIPC(4, "auipc a0, 1024", a0);
+ TESTINST_1_0_AUIPC(4, "auipc a0, 2048", a0);
+ TESTINST_1_0_AUIPC(4, "auipc a0, 4096", a0);
+ TESTINST_1_0_AUIPC(4, "auipc a0, 8192", a0);
+ TESTINST_1_0_AUIPC(4, "auipc a0, 16384", a0);
+ TESTINST_1_0_AUIPC(4, "auipc a0, 32768", a0);
+ TESTINST_1_0_AUIPC(4, "auipc a0, 65536", a0);
+ TESTINST_1_0_AUIPC(4, "auipc a0, 131072", a0);
+ TESTINST_1_0_AUIPC(4, "auipc a0, 262144", a0);
+ TESTINST_1_0_AUIPC(4, "auipc a0, 524288", a0);
+ TESTINST_1_0_AUIPC(4, "auipc a0, 1048575", a0);
+
+ TESTINST_1_0_AUIPC(4, "auipc t6, 1", t6);
+ TESTINST_1_0_AUIPC(4, "auipc zero, 1", zero);
+
+ /* ------------------ jal rd, imm[20:1] ------------------ */
+ /* Note: Only the imm[11:1] range is tested. */
+ TESTINST_1_0_JAL_RANGE(4, "jal t0, .+4", 4, t0);
+ TESTINST_1_0_JAL_RANGE(4, "jal t0, .+6", 6, t0);
+ TESTINST_1_0_JAL_RANGE(4, "jal t0, .+8", 8, t0);
+ TESTINST_1_0_JAL_RANGE(4, "jal t0, .+16", 16, t0);
+ TESTINST_1_0_JAL_RANGE(4, "jal t0, .+32", 32, t0);
+ TESTINST_1_0_JAL_RANGE(4, "jal t0, .+64", 64, t0);
+ TESTINST_1_0_JAL_RANGE(4, "jal t0, .+128", 128, t0);
+ TESTINST_1_0_JAL_RANGE(4, "jal t0, .+256", 256, t0);
+ TESTINST_1_0_JAL_RANGE(4, "jal t0, .+512", 512, t0);
+ TESTINST_1_0_JAL_RANGE(4, "jal t0, .+1024", 1024, t0);
+ TESTINST_1_0_JAL_RANGE(4, "jal t0, .+2048", 2048, t0);
+ TESTINST_1_0_JAL_RANGE(4, "jal t0, .-4", -4, t0);
+ TESTINST_1_0_JAL_RANGE(4, "jal t0, .-6", -6, t0);
+ TESTINST_1_0_JAL_RANGE(4, "jal t0, .-2048", -2048, t0);
+
+ TESTINST_1_0_JAL_RANGE(4, "jal t6, .+4", 4, t6);
+ TESTINST_1_0_JAL_RANGE(4, "jal zero, .+4", 4, zero);
+
+ /* --------------- jalr rd, imm[11:0](rs1) --------------- */
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, 0(t0)", "1f+4", 4, ra, t0);
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, 0(t0)", "1f+6", 6, ra, t0);
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, 0(t0)", "1f+8", 8, ra, t0);
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, 0(t0)", "1f-4", -4, ra, t0);
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, 0(t0)", "1f-6", -6, ra, t0);
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, 0(t0)", "1f-8", -8, ra, t0);
+
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, 0(t0)", "1f-8", -8, ra, t0);
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, 1(t0)", "1f-9", -8, ra, t0);
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, 2(t0)", "1f-10", -8, ra, t0);
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, 4(t0)", "1f-12", -8, ra, t0);
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, 8(t0)", "1f-16", -8, ra, t0);
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, 16(t0)", "1f-24", -8, ra, t0);
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, 32(t0)", "1f-40", -8, ra, t0);
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, 64(t0)", "1f-72", -8, ra, t0);
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, 128(t0)", "1f-136", -8, ra, t0);
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, 256(t0)", "1f-264", -8, ra, t0);
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, 512(t0)", "1f-520", -8, ra, t0);
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, 1024(t0)", "1f-1032", -8, ra, t0);
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, 2047(t0)", "1f-2055", -8, ra, t0);
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, -1(t0)", "1f-7", -8, ra, t0);
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, -2048(t0)", "1f+2040", -8, ra, t0);
+
+ TESTINST_1_1_JALR_RANGE(4, "jalr ra, 0(t6)", "1f+4", 4, ra, t6);
+ TESTINST_1_1_JALR_RANGE(4, "jalr zero, 0(a0)", "1f+4", 4, zero, a0);
+
+ /* --------------- beq rs1, rs2, imm[12:1] --------------- */
+ /* Note: Only the imm[11:1] range is tested. */
+ TESTINST_0_2_Bxx_RANGE(4, "beq a0, a1, .+4", 0, 0, 4, a0, a1);
+ TESTINST_0_2_Bxx_RANGE(4, "beq a0, a1, .+6", 0, 0, 6, a0, a1);
+ TESTINST_0_2_Bxx_RANGE(4, "beq a0, a1, .+8", 0, 0, 8, a0, a1);
+ TESTINST_0_2_Bxx_RANGE(4, "beq a0, a1, .+16", 0, 0, 16, a0, a1);
+ TESTINST_0_2_Bxx_RANGE(4, "beq a0, a1, .+32", 0, 0, 32, a0, a1);
+ TESTINST_0_2_Bxx_RANGE(4, "beq a0, a1, .+64", 0, 0, 64, a0, a1);
+ TESTINST_0_2_Bxx_RANGE(4, "beq a0, a1, .+128", 0, 0, 128, a0, a1);
+ TESTINST_0_2_Bxx_RANGE(4, "beq a0, a1, .+256", 0, 0, 256, a0, a1);
+ TESTINST_0_2_Bxx_RANGE(4, "beq a0, a1, .+512", 0, 0, 512, a0, a1);
+ TESTINST_0_2_Bxx_RANGE(4, "beq a0, a1, .+1024", 0, 0, 1024, a0, a1);
+ TESTINST_0_2_Bxx_RANGE(4, "beq a0, a1, .+2048", 0, 0, 2048, a0, a1);
+ TESTINST_0_2_Bxx_RANGE(4, "beq a0, a1, .-4", 0, 0, -4, a0, a1);
+ TESTINST_0_2_Bxx_RANGE(4, "beq a0, a1, .-6", 0, 0, -6, a0, a1);
+ TESTINST_0_2_Bxx_RANGE(4, "beq a0, a1, .-2048", 0, 0, -2048, a0, a1);
+
+ TESTINST_0_2_Bxx_RANGE(4, "beq t5, t6, .+4", 0, 0, 4, t5, t6);
+ TESTINST_0_2_Bxx_COND(4, "beq a0, a1, 1f", 0, 0, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "beq a0, a1, 1f", 0, 1, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "beq a0, a1, 1f", 1, 0, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "beq a0, a1, 1f", 1, 1, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "beq a0, zero, 1f", 0, 0, a0, zero);
+ TESTINST_0_2_Bxx_COND(4, "beq a0, zero, 1f", 1, 0, a0, zero);
+ TESTINST_0_2_Bxx_COND(4, "beq zero, a0, 1f", 0, 0, zero, a0);
+ TESTINST_0_2_Bxx_COND(4, "beq zero, a0, 1f", 0, 1, zero, a0);
+ TESTINST_0_2_Bxx_COND(4, "beq a0, a1, 1f", 0, -1, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "beq a0, a1, 1f", -1, 0, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "beq a0, a1, 1f", -1, -1, a0, a1);
+
+ /* --------------- bne rs1, rs2, imm[12:1] --------------- */
+ TESTINST_0_2_Bxx_COND(4, "bne a0, a1, 1f", 0, 0, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bne a0, a1, 1f", 0, 1, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bne a0, a1, 1f", 1, 0, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bne a0, a1, 1f", 1, 1, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bne a0, zero, 1f", 0, 0, a0, zero);
+ TESTINST_0_2_Bxx_COND(4, "bne a0, zero, 1f", 1, 0, a0, zero);
+ TESTINST_0_2_Bxx_COND(4, "bne zero, a0, 1f", 0, 0, zero, a0);
+ TESTINST_0_2_Bxx_COND(4, "bne zero, a0, 1f", 0, 1, zero, a0);
+ TESTINST_0_2_Bxx_COND(4, "bne a0, a1, 1f", 0, -1, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bne a0, a1, 1f", -1, 0, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bne a0, a1, 1f", -1, -1, a0, a1);
+
+ /* --------------- blt rs1, rs2, imm[12:1] --------------- */
+ TESTINST_0_2_Bxx_COND(4, "blt a0, a1, 1f", 0, 0, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "blt a0, a1, 1f", 0, 1, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "blt a0, a1, 1f", 1, 0, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "blt a0, a1, 1f", 1, 1, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "blt a0, zero, 1f", 0, 0, a0, zero);
+ TESTINST_0_2_Bxx_COND(4, "blt a0, zero, 1f", 1, 0, a0, zero);
+ TESTINST_0_2_Bxx_COND(4, "blt zero, a0, 1f", 0, 0, zero, a0);
+ TESTINST_0_2_Bxx_COND(4, "blt zero, a0, 1f", 0, 1, zero, a0);
+ TESTINST_0_2_Bxx_COND(4, "blt a0, a1, 1f", 0, -1, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "blt a0, a1, 1f", -1, 0, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "blt a0, a1, 1f", -1, -1, a0, a1);
+
+ /* --------------- bge rs1, rs2, imm[12:1] --------------- */
+ TESTINST_0_2_Bxx_COND(4, "bge a0, a1, 1f", 0, 0, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bge a0, a1, 1f", 0, 1, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bge a0, a1, 1f", 1, 0, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bge a0, a1, 1f", 1, 1, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bge a0, zero, 1f", 0, 0, a0, zero);
+ TESTINST_0_2_Bxx_COND(4, "bge a0, zero, 1f", 1, 0, a0, zero);
+ TESTINST_0_2_Bxx_COND(4, "bge zero, a0, 1f", 0, 0, zero, a0);
+ TESTINST_0_2_Bxx_COND(4, "bge zero, a0, 1f", 0, 1, zero, a0);
+ TESTINST_0_2_Bxx_COND(4, "bge a0, a1, 1f", 0, -1, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bge a0, a1, 1f", -1, 0, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bge a0, a1, 1f", -1, -1, a0, a1);
+
+ /* -------------- bltu rs1, rs2, imm[12:1] --------------- */
+ TESTINST_0_2_Bxx_COND(4, "bltu a0, a1, 1f", 0, 0, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bltu a0, a1, 1f", 0, 1, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bltu a0, a1, 1f", 1, 0, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bltu a0, a1, 1f", 1, 1, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bltu a0, zero, 1f", 0, 0, a0, zero);
+ TESTINST_0_2_Bxx_COND(4, "bltu a0, zero, 1f", 1, 0, a0, zero);
+ TESTINST_0_2_Bxx_COND(4, "bltu zero, a0, 1f", 0, 0, zero, a0);
+ TESTINST_0_2_Bxx_COND(4, "bltu zero, a0, 1f", 0, 1, zero, a0);
+ TESTINST_0_2_Bxx_COND(4, "bltu a0, a1, 1f", 0, -1, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bltu a0, a1, 1f", -1, 0, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bltu a0, a1, 1f", -1, -1, a0, a1);
+
+ /* -------------- bgeu rs1, rs2, imm[12:1] --------------- */
+ TESTINST_0_2_Bxx_COND(4, "bgeu a0, a1, 1f", 0, 0, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bgeu a0, a1, 1f", 0, 1, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bgeu a0, a1, 1f", 1, 0, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bgeu a0, a1, 1f", 1, 1, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bgeu a0, zero, 1f", 0, 0, a0, zero);
+ TESTINST_0_2_Bxx_COND(4, "bgeu a0, zero, 1f", 1, 0, a0, zero);
+ TESTINST_0_2_Bxx_COND(4, "bgeu zero, a0, 1f", 0, 0, zero, a0);
+ TESTINST_0_2_Bxx_COND(4, "bgeu zero, a0, 1f", 0, 1, zero, a0);
+ TESTINST_0_2_Bxx_COND(4, "bgeu a0, a1, 1f", 0, -1, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bgeu a0, a1, 1f", -1, 0, a0, a1);
+ TESTINST_0_2_Bxx_COND(4, "bgeu a0, a1, 1f", -1, -1, a0, a1);
+
+ /* ---------------- lb rd, imm[11:0](rs1) ---------------- */
+ TESTINST_1_1_LOAD(4, "lb a0, 0(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lb a0, 1(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lb a0, 2(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lb a0, 4(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lb a0, 8(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lb a0, 16(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lb a0, 32(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lb a0, 64(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lb a0, 128(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lb a0, 256(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lb a0, 512(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lb a0, 1024(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lb a0, 2047(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lb a0, -1(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lb a0, -2048(a1)", a0, a1);
+
+ TESTINST_1_1_LOAD(4, "lb a4, 0(a5)", a4, a5);
+ TESTINST_1_1_LOAD(4, "lb zero, 0(a0)", zero, a0);
+
+ /* ---------------- lh rd, imm[11:0](rs1) ---------------- */
+ TESTINST_1_1_LOAD(4, "lh a0, 0(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lh a0, 2(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lh a0, 4(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lh a0, 8(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lh a0, 16(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lh a0, 32(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lh a0, 64(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lh a0, 128(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lh a0, 256(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lh a0, 512(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lh a0, 1024(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lh a0, 2046(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lh a0, -2(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lh a0, -2048(a1)", a0, a1);
+
+ TESTINST_1_1_LOAD(4, "lh a4, 0(a5)", a4, a5);
+ TESTINST_1_1_LOAD(4, "lh zero, 0(a0)", zero, a0);
+
+ /* ---------------- lw rd, imm[11:0](rs1) ---------------- */
+ TESTINST_1_1_LOAD(4, "lw a0, 0(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lw a0, 4(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lw a0, 8(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lw a0, 16(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lw a0, 32(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lw a0, 64(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lw a0, 128(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lw a0, 256(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lw a0, 512(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lw a0, 1024(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lw a0, 2044(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lw a0, -4(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lw a0, -2048(a1)", a0, a1);
+
+ TESTINST_1_1_LOAD(4, "lw a4, 0(a5)", a4, a5);
+ TESTINST_1_1_LOAD(4, "lw zero, 0(a0)", zero, a0);
+
+ /* --------------- lbu rd, imm[11:0](rs1) ---------------- */
+ TESTINST_1_1_LOAD(4, "lbu a0, 0(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lbu a0, 1(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lbu a0, 2(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lbu a0, 4(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lbu a0, 8(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lbu a0, 16(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lbu a0, 32(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lbu a0, 64(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lbu a0, 128(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lbu a0, 256(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lbu a0, 512(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lbu a0, 1024(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lbu a0, 2047(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lbu a0, -1(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lbu a0, -2048(a1)", a0, a1);
+
+ TESTINST_1_1_LOAD(4, "lbu a4, 0(a5)", a4, a5);
+ TESTINST_1_1_LOAD(4, "lbu zero, 0(a0)", zero, a0);
+
+ /* --------------- lhu rd, imm[11:0](rs1) ---------------- */
+ TESTINST_1_1_LOAD(4, "lhu a0, 0(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lhu a0, 2(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lhu a0, 4(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lhu a0, 8(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lhu a0, 16(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lhu a0, 32(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lhu a0, 64(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lhu a0, 128(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lhu a0, 256(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lhu a0, 512(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lhu a0, 1024(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lhu a0, 2046(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lhu a0, -2(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lhu a0, -2048(a1)", a0, a1);
+
+ TESTINST_1_1_LOAD(4, "lhu a4, 0(a5)", a4, a5);
+ TESTINST_1_1_LOAD(4, "lhu zero, 0(a0)", zero, a0);
+
+ /* --------------- sb rs2, imm[11:0](rs1) ---------------- */
+ TESTINST_0_2_STORE(4, "sb a0, 0(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sb a0, 1(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sb a0, 2(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sb a0, 4(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sb a0, 8(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sb a0, 16(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sb a0, 32(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sb a0, 64(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sb a0, 128(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sb a0, 256(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sb a0, 512(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sb a0, 1024(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sb a0, 2047(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sb a0, -1(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sb a0, -2048(a1)", 0xabcdef0123456789, a0, a1);
+
+ TESTINST_0_2_STORE(4, "sb a4, 0(a5)", 0xabcdef0123456789, a4, a5);
+
+ /* --------------- sh rs2, imm[11:0](rs1) ---------------- */
+ TESTINST_0_2_STORE(4, "sh a0, 0(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sh a0, 2(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sh a0, 4(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sh a0, 8(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sh a0, 16(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sh a0, 32(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sh a0, 64(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sh a0, 128(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sh a0, 256(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sh a0, 512(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sh a0, 1024(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sh a0, 2046(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sh a0, -2(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sh a0, -2048(a1)", 0xabcdef0123456789, a0, a1);
+
+ TESTINST_0_2_STORE(4, "sh a4, 0(a5)", 0xabcdef0123456789, a4, a5);
+
+ /* --------------- sw rs2, imm[11:0](rs1) ---------------- */
+ TESTINST_0_2_STORE(4, "sw a0, 0(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sw a0, 4(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sw a0, 8(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sw a0, 16(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sw a0, 32(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sw a0, 64(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sw a0, 128(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sw a0, 256(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sw a0, 512(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sw a0, 1024(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sw a0, 2044(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sw a0, -4(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sw a0, -2048(a1)", 0xabcdef0123456789, a0, a1);
+
+ TESTINST_0_2_STORE(4, "sw a4, 0(a5)", 0xabcdef0123456789, a4, a5);
+
+ /* --------------- addi rd, rs1, imm[11:0] --------------- */
+ TESTINST_1_1(4, "addi a0, a1, 1", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addi a0, a1, 2", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addi a0, a1, 4", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addi a0, a1, 8", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addi a0, a1, 16", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addi a0, a1, 32", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addi a0, a1, 64", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addi a0, a1, 128", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addi a0, a1, 256", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addi a0, a1, 1024", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addi a0, a1, 2047", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addi a0, a1, -1", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addi a0, a1, -2048", 0x0000000000001000, a0, a1);
+
+ TESTINST_1_1(4, "addi a0, a1, 1", 0x000000007fffffff, a0, a1);
+ TESTINST_1_1(4, "addi a0, a1, 1", 0x00000000fffffffe, a0, a1);
+ TESTINST_1_1(4, "addi a0, a1, 1", 0x00000000ffffffff, a0, a1);
+ TESTINST_1_1(4, "addi t5, t6, 1", 0x0000000000001000, t5, t6);
+ TESTINST_1_1(4, "addi zero, a0, 1", 0x0000000000001000, zero, a0);
+
+ /* --------------- slti rd, rs1, imm[11:0] --------------- */
+ TESTINST_1_1(4, "slti a0, a1, 0", 0x0000000000000000, a0, a1);
+ TESTINST_1_1(4, "slti a0, a1, 0", 0x0000000000000001, a0, a1);
+ TESTINST_1_1(4, "slti a0, a1, 0", 0xffffffffffffffff, a0, a1);
+ TESTINST_1_1(4, "slti a0, a1, 0x7ff", 0x00000000000007ff, a0, a1);
+ TESTINST_1_1(4, "slti a0, a1, 0x7ff", 0x0000000000000800, a0, a1);
+ TESTINST_1_1(4, "slti a0, a1, 0xffffffffffffffff", 0xffffffffffffffff, a0,
+ a1);
+ TESTINST_1_1(4, "slti a0, a1, 0xffffffffffffffff", 0x0000000000000000, a0,
+ a1);
+
+ TESTINST_1_1(4, "slti t5, t6, 0", 0x0000000000000000, t5, t6);
+ TESTINST_1_1(4, "slti t5, t6, 0", 0x0000000000000001, t5, t6);
+ TESTINST_1_1(4, "slti zero, a0, 1", 0x0000000000000000, zero, a0);
+
+ /* -------------- sltiu rd, rs1, imm[11:0] --------------- */
+ TESTINST_1_1(4, "sltiu a0, a1, 0", 0x0000000000000000, a0, a1);
+ TESTINST_1_1(4, "sltiu a0, a1, 0", 0x0000000000000001, a0, a1);
+ TESTINST_1_1(4, "sltiu a0, a1, 0", 0xffffffffffffffff, a0, a1);
+ TESTINST_1_1(4, "sltiu a0, a1, 0x7ff", 0x00000000000007ff, a0, a1);
+ TESTINST_1_1(4, "sltiu a0, a1, 0x7ff", 0x0000000000000800, a0, a1);
+ TESTINST_1_1(4, "sltiu a0, a1, 0xffffffffffffffff", 0xffffffffffffffff, a0,
+ a1);
+ TESTINST_1_1(4, "sltiu a0, a1, 0xffffffffffffffff", 0x0000000000000000, a0,
+ a1);
+
+ TESTINST_1_1(4, "sltiu t5, t6, 0", 0x0000000000000000, t5, t6);
+ TESTINST_1_1(4, "sltiu t5, t6, 0", 0x0000000000000001, t5, t6);
+ TESTINST_1_1(4, "sltiu zero, a0, 1", 0x0000000000000000, zero, a0);
+
+ /* --------------- xori rd, rs1, imm[11:0] --------------- */
+ TESTINST_1_1(4, "xori a0, a1, 0", 0x0000ffff0000ffff, a0, a1);
+ TESTINST_1_1(4, "xori a0, a1, 0", 0xffff0000ffff0000, a0, a1);
+ TESTINST_1_1(4, "xori a0, a1, 0x7ff", 0x0000ffff0000ffff, a0, a1);
+ TESTINST_1_1(4, "xori a0, a1, 0x7ff", 0xffff0000ffff0000, a0, a1);
+ TESTINST_1_1(4, "xori a0, a1, 0xffffffffffffffff", 0x0000ffff0000ffff, a0,
+ a1);
+ TESTINST_1_1(4, "xori a0, a1, 0xffffffffffffffff", 0xffff0000ffff0000, a0,
+ a1);
+
+ TESTINST_1_1(4, "xori t5, t6, 0", 0x0000ffff0000ffff, t5, t6);
+ TESTINST_1_1(4, "xori zero, a0, 0x7ff", 0x0000ffff0000ffff, zero, a0);
+
+ /* --------------- ori rd, rs1, imm[11:0] ---------------- */
+ TESTINST_1_1(4, "ori a0, a1, 0", 0x0000ffff0000ffff, a0, a1);
+ TESTINST_1_1(4, "ori a0, a1, 0", 0xffff0000ffff0000, a0, a1);
+ TESTINST_1_1(4, "ori a0, a1, 0x7ff", 0x0000ffff0000ffff, a0, a1);
+ TESTINST_1_1(4, "ori a0, a1, 0x7ff", 0xffff0000ffff0000, a0, a1);
+ TESTINST_1_1(4, "ori a0, a1, 0xffffffffffffffff", 0x0000ffff0000ffff, a0,
+ a1);
+ TESTINST_1_1(4, "ori a0, a1, 0xffffffffffffffff", 0xffff0000ffff0000, a0,
+ a1);
+
+ TESTINST_1_1(4, "ori t5, t6, 0", 0x0000ffff0000ffff, t5, t6);
+ TESTINST_1_1(4, "ori zero, a0, 0x7ff", 0x0000ffff0000ffff, zero, a0);
+
+ /* --------------- andi rd, rs1, imm[11:0] --------------- */
+ TESTINST_1_1(4, "andi a0, a1, 0", 0x0000ffff0000ffff, a0, a1);
+ TESTINST_1_1(4, "andi a0, a1, 0", 0xffff0000ffff0000, a0, a1);
+ TESTINST_1_1(4, "andi a0, a1, 0x7ff", 0x0000ffff0000ffff, a0, a1);
+ TESTINST_1_1(4, "andi a0, a1, 0x7ff", 0xffff0000ffff0000, a0, a1);
+ TESTINST_1_1(4, "andi a0, a1, 0xffffffffffffffff", 0x0000ffff0000ffff, a0,
+ a1);
+ TESTINST_1_1(4, "andi a0, a1, 0xffffffffffffffff", 0xffff0000ffff0000, a0,
+ a1);
+
+ TESTINST_1_1(4, "andi t5, t6, 0", 0x0000ffff0000ffff, t5, t6);
+ TESTINST_1_1(4, "andi zero, a0, 0x7ff", 0x0000ffff0000ffff, zero, a0);
+
+ /* --------------- slli rd, rs1, uimm[5:0] --------------- */
+ TESTINST_1_1(4, "slli a0, a1, 0", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "slli a0, a1, 1", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "slli a0, a1, 2", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "slli a0, a1, 4", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "slli a0, a1, 8", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "slli a0, a1, 16", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "slli a0, a1, 32", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "slli a0, a1, 63", 0xabcdef0123456789, a0, a1);
+
+ TESTINST_1_1(4, "slli t5, t6, 1", 0xabcdef0123456789, t5, t6);
+ TESTINST_1_1(4, "slli zero, a0, 1", 0xabcdef0123456789, zero, a0);
+
+ /* --------------- srli rd, rs1, uimm[5:0] --------------- */
+ TESTINST_1_1(4, "srli a0, a1, 0", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "srli a0, a1, 1", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "srli a0, a1, 2", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "srli a0, a1, 4", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "srli a0, a1, 8", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "srli a0, a1, 16", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "srli a0, a1, 32", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "srli a0, a1, 63", 0xabcdef0123456789, a0, a1);
+
+ TESTINST_1_1(4, "srli t5, t6, 1", 0xabcdef0123456789, t5, t6);
+ TESTINST_1_1(4, "srli zero, a0, 1", 0xabcdef0123456789, zero, a0);
+
+ /* --------------- srai rd, rs1, uimm[5:0] --------------- */
+ TESTINST_1_1(4, "srai a0, a1, 0", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "srai a0, a1, 1", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "srai a0, a1, 2", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "srai a0, a1, 4", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "srai a0, a1, 8", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "srai a0, a1, 16", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "srai a0, a1, 32", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "srai a0, a1, 63", 0xabcdef0123456789, a0, a1);
+
+ TESTINST_1_1(4, "srai t5, t6, 1", 0xabcdef0123456789, t5, t6);
+ TESTINST_1_1(4, "srai zero, a0, 1", 0xabcdef0123456789, zero, a0);
+
+ /* ------------------ add rd, rs1, rs2 ------------------- */
+ TESTINST_1_2(4, "add a0, a1, a2", 0x0000000000001000, 0x0000000000002000, a0,
+ a1, a2);
+ TESTINST_1_2(4, "add a0, a1, a2", 0x000000007fffffff, 0x0000000000000001, a0,
+ a1, a2);
+ TESTINST_1_2(4, "add a0, a1, a2", 0x00000000fffffffe, 0x0000000000000001, a0,
+ a1, a2);
+ TESTINST_1_2(4, "add a0, a1, a2", 0x00000000ffffffff, 0x0000000000000001, a0,
+ a1, a2);
+ TESTINST_1_2(4, "add a0, a1, a2", 0xfffffffffffffffe, 0x0000000000000001, a0,
+ a1, a2);
+ TESTINST_1_2(4, "add a0, a1, a2", 0xffffffffffffffff, 0x0000000000000001, a0,
+ a1, a2);
+
+ TESTINST_1_2(4, "add t4, t5, t6", 0x0000000000001000, 0x0000000000002000, t4,
+ t5, t6);
+ TESTINST_1_2(4, "add zero, a0, a1", 0x0000000000001000, 0x0000000000002000,
+ zero, a0, a1);
+
+ /* ------------------ sub rd, rs1, rs2 ------------------- */
+ TESTINST_1_2(4, "sub a0, a1, a2", 0x0000000000001000, 0x0000000000000fff, a0,
+ a1, a2);
+ TESTINST_1_2(4, "sub a0, a1, a2", 0x0000000000001000, 0x0000000000001000, a0,
+ a1, a2);
+ TESTINST_1_2(4, "sub a0, a1, a2", 0x0000000000001000, 0x0000000000001001, a0,
+ a1, a2);
+ TESTINST_1_2(4, "sub a0, a1, a2", 0xffffffffffffffff, 0x0000000000000000, a0,
+ a1, a2);
+ TESTINST_1_2(4, "sub a0, a1, a2", 0x0000000100000000, 0x0000000000000001, a0,
+ a1, a2);
+
+ TESTINST_1_2(4, "sub t4, t5, t6", 0x0000000000001000, 0x0000000000000fff, t4,
+ t5, t6);
+ TESTINST_1_2(4, "sub zero, a0, a1", 0x0000000000001000, 0x0000000000000fff,
+ zero, a0, a1);
+
+ /* ------------------ sll rd, rs1, rs2 ------------------- */
+ TESTINST_1_2(4, "sll a0, a1, a2", 0xabcdef0123456789, 0, a0, a1, a2);
+ TESTINST_1_2(4, "sll a0, a1, a2", 0xabcdef0123456789, 1, a0, a1, a2);
+ TESTINST_1_2(4, "sll a0, a1, a2", 0xabcdef0123456789, 2, a0, a1, a2);
+ TESTINST_1_2(4, "sll a0, a1, a2", 0xabcdef0123456789, 4, a0, a1, a2);
+ TESTINST_1_2(4, "sll a0, a1, a2", 0xabcdef0123456789, 8, a0, a1, a2);
+ TESTINST_1_2(4, "sll a0, a1, a2", 0xabcdef0123456789, 16, a0, a1, a2);
+ TESTINST_1_2(4, "sll a0, a1, a2", 0xabcdef0123456789, 32, a0, a1, a2);
+ TESTINST_1_2(4, "sll a0, a1, a2", 0xabcdef0123456789, 63, a0, a1, a2);
+ TESTINST_1_2(4, "sll a0, a1, a2", 0xabcdef0123456789, 64, a0, a1, a2);
+
+ TESTINST_1_2(4, "sll t4, t5, t6", 0xabcdef0123456789, 1, t4, t5, t6);
+ TESTINST_1_2(4, "sll zero, a0, a1", 0xabcdef0123456789, 1, zero, a0, a1);
+
+ /* ------------------ slt rd, rs1, rs2 ------------------- */
+ TESTINST_1_2(4, "slt a0, a1, a2", 0x0000000000000000, 0x0000000000000000, a0,
+ a1, a2);
+ TESTINST_1_2(4, "slt a0, a1, a2", 0x0000000000000000, 0x0000000000000001, a0,
+ a1, a2);
+ TESTINST_1_2(4, "slt a0, a1, a2", 0x0000000000000000, 0xffffffffffffffff, a0,
+ a1, a2);
+
+ TESTINST_1_2(4, "slt t4, t5, t6", 0x0000000000000000, 0x0000000000000000, t4,
+ t5, t6);
+ TESTINST_1_2(4, "slt t4, t5, t6", 0x0000000000000000, 0x0000000000000001, t4,
+ t5, t6);
+ TESTINST_1_2(4, "slt zero, a0, a1", 0x0000000000000000, 0x0000000000000001,
+ zero, a0, a1);
+
+ /* ------------------ sltu rd, rs1, rs2 ------------------ */
+ TESTINST_1_2(4, "sltu a0, a1, a2", 0x0000000000000000, 0x0000000000000000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "sltu a0, a1, a2", 0x0000000000000000, 0x0000000000000001,
+ a0, a1, a2);
+ TESTINST_1_2(4, "sltu a0, a1, a2", 0x0000000000000000, 0xffffffffffffffff,
+ a0, a1, a2);
+
+ TESTINST_1_2(4, "sltu t4, t5, t6", 0x0000000000000000, 0x0000000000000000,
+ t4, t5, t6);
+ TESTINST_1_2(4, "sltu t4, t5, t6", 0x0000000000000000, 0x0000000000000001,
+ t4, t5, t6);
+ TESTINST_1_2(4, "sltu zero, a0, a1", 0x0000000000000000, 0x0000000000000001,
+ zero, a0, a1);
+
+ /* ------------------ xor rd, rs1, rs2 ------------------- */
+ TESTINST_1_2(4, "xor a0, a1, a2", 0x0000ffff0000ffff, 0x00000000ffffffff, a0,
+ a1, a2);
+ TESTINST_1_2(4, "xor t4, t5, t6", 0x0000ffff0000ffff, 0x00000000ffffffff, t4,
+ t5, t6);
+ TESTINST_1_2(4, "xor zero, a0, a1", 0x0000ffff0000ffff, 0x00000000ffffffff,
+ zero, a0, a1);
+
+ /* ------------------ srl rd, rs1, rs2 ------------------- */
+ TESTINST_1_2(4, "srl a0, a1, a2", 0xabcdef0123456789, 0, a0, a1, a2);
+ TESTINST_1_2(4, "srl a0, a1, a2", 0xabcdef0123456789, 1, a0, a1, a2);
+ TESTINST_1_2(4, "srl a0, a1, a2", 0xabcdef0123456789, 2, a0, a1, a2);
+ TESTINST_1_2(4, "srl a0, a1, a2", 0xabcdef0123456789, 4, a0, a1, a2);
+ TESTINST_1_2(4, "srl a0, a1, a2", 0xabcdef0123456789, 8, a0, a1, a2);
+ TESTINST_1_2(4, "srl a0, a1, a2", 0xabcdef0123456789, 16, a0, a1, a2);
+ TESTINST_1_2(4, "srl a0, a1, a2", 0xabcdef0123456789, 32, a0, a1, a2);
+ TESTINST_1_2(4, "srl a0, a1, a2", 0xabcdef0123456789, 63, a0, a1, a2);
+ TESTINST_1_2(4, "srl a0, a1, a2", 0xabcdef0123456789, 64, a0, a1, a2);
+
+ TESTINST_1_2(4, "srl t4, t5, t6", 0xabcdef0123456789, 1, t4, t5, t6);
+ TESTINST_1_2(4, "srl zero, a0, a1", 0xabcdef0123456789, 1, zero, a0, a1);
+
+ /* ------------------ sra rd, rs1, rs2 ------------------- */
+ TESTINST_1_2(4, "sra a0, a1, a2", 0xabcdef0123456789, 0, a0, a1, a2);
+ TESTINST_1_2(4, "sra a0, a1, a2", 0xabcdef0123456789, 1, a0, a1, a2);
+ TESTINST_1_2(4, "sra a0, a1, a2", 0xabcdef0123456789, 2, a0, a1, a2);
+ TESTINST_1_2(4, "sra a0, a1, a2", 0xabcdef0123456789, 4, a0, a1, a2);
+ TESTINST_1_2(4, "sra a0, a1, a2", 0xabcdef0123456789, 8, a0, a1, a2);
+ TESTINST_1_2(4, "sra a0, a1, a2", 0xabcdef0123456789, 16, a0, a1, a2);
+ TESTINST_1_2(4, "sra a0, a1, a2", 0xabcdef0123456789, 32, a0, a1, a2);
+ TESTINST_1_2(4, "sra a0, a1, a2", 0xabcdef0123456789, 63, a0, a1, a2);
+ TESTINST_1_2(4, "sra a0, a1, a2", 0xabcdef0123456789, 64, a0, a1, a2);
+
+ TESTINST_1_2(4, "sra t4, t5, t6", 0xabcdef0123456789, 1, t4, t5, t6);
+ TESTINST_1_2(4, "sra zero, a0, a1", 0xabcdef0123456789, 1, zero, a0, a1);
+
+ /* ------------------- or rd, rs1, rs2 ------------------- */
+ TESTINST_1_2(4, "or a0, a1, a2", 0x0000ffff0000ffff, 0x00000000ffffffff, a0,
+ a1, a2);
+ TESTINST_1_2(4, "or t4, t5, t6", 0x0000ffff0000ffff, 0x00000000ffffffff, t4,
+ t5, t6);
+ TESTINST_1_2(4, "or zero, a0, a1", 0x0000ffff0000ffff, 0x00000000ffffffff,
+ zero, a0, a1);
+
+ /* ------------------ and rd, rs1, rs2 ------------------- */
+ TESTINST_1_2(4, "and a0, a1, a2", 0x0000ffff0000ffff, 0x00000000ffffffff, a0,
+ a1, a2);
+ TESTINST_1_2(4, "and t4, t5, t6", 0x0000ffff0000ffff, 0x00000000ffffffff, t4,
+ t5, t6);
+ TESTINST_1_2(4, "and zero, a0, a1", 0x0000ffff0000ffff, 0x00000000ffffffff,
+ zero, a0, a1);
+
+ /* ------------------------ fence ------------------------ */
+ TESTINST_0_0(4, "fence");
+
+ /* ------------------------ ecall ------------------------ */
+ /* Not tested here. */
+
+ /* ----------------------- ebreak ------------------------ */
+ /* Not tested here. */
+
+ printf("\n");
+}
+
+static void test_integer_additions(void)
+{
+ printf("RV64I base instruction set, additions\n");
+
+ /* --------------- lwu rd, imm[11:0](rs1) ---------------- */
+ TESTINST_1_1_LOAD(4, "lwu a0, 0(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lwu a0, 4(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lwu a0, 8(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lwu a0, 16(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lwu a0, 32(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lwu a0, 64(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lwu a0, 128(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lwu a0, 256(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lwu a0, 512(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lwu a0, 1024(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lwu a0, 2044(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lwu a0, -4(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "lwu a0, -2048(a1)", a0, a1);
+
+ TESTINST_1_1_LOAD(4, "lwu a4, 0(a5)", a4, a5);
+ TESTINST_1_1_LOAD(4, "lwu zero, 0(a0)", zero, a0);
+
+ /* ---------------- ld rd, imm[11:0](rs1) ---------------- */
+ TESTINST_1_1_LOAD(4, "ld a0, 0(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "ld a0, 4(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "ld a0, 8(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "ld a0, 16(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "ld a0, 32(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "ld a0, 64(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "ld a0, 128(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "ld a0, 256(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "ld a0, 512(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "ld a0, 1024(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "ld a0, 2040(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "ld a0, -4(a1)", a0, a1);
+ TESTINST_1_1_LOAD(4, "ld a0, -2048(a1)", a0, a1);
+
+ TESTINST_1_1_LOAD(4, "ld a4, 0(a5)", a4, a5);
+ TESTINST_1_1_LOAD(4, "ld zero, 0(a0)", zero, a0);
+
+ /* --------------- sd rs2, imm[11:0](rs1) ---------------- */
+ TESTINST_0_2_STORE(4, "sd a0, 0(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sd a0, 4(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sd a0, 8(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sd a0, 16(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sd a0, 32(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sd a0, 64(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sd a0, 128(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sd a0, 256(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sd a0, 512(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sd a0, 1024(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sd a0, 2040(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sd a0, -4(a1)", 0xabcdef0123456789, a0, a1);
+ TESTINST_0_2_STORE(4, "sd a0, -2048(a1)", 0xabcdef0123456789, a0, a1);
+
+ TESTINST_0_2_STORE(4, "sd a4, 0(a5)", 0xabcdef0123456789, a4, a5);
+
+ /* -------------- addiw rd, rs1, imm[11:0] --------------- */
+ TESTINST_1_1(4, "addiw a0, a1, 1", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addiw a0, a1, 2", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addiw a0, a1, 4", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addiw a0, a1, 8", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addiw a0, a1, 16", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addiw a0, a1, 32", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addiw a0, a1, 64", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addiw a0, a1, 128", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addiw a0, a1, 256", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addiw a0, a1, 1024", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addiw a0, a1, 2047", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addiw a0, a1, -1", 0x0000000000001000, a0, a1);
+ TESTINST_1_1(4, "addiw a0, a1, -2048", 0x0000000000001000, a0, a1);
+
+ TESTINST_1_1(4, "addiw a0, a1, 1", 0x000000007fffffff, a0, a1);
+ TESTINST_1_1(4, "addiw a0, a1, 1", 0x00000000fffffffe, a0, a1);
+ TESTINST_1_1(4, "addiw a0, a1, 1", 0x00000000ffffffff, a0, a1);
+ TESTINST_1_1(4, "addiw t5, t6, 1", 0x0000000000001000, t5, t6);
+ TESTINST_1_1(4, "addiw zero, a0, 1", 0x0000000000001000, zero, a0);
+
+ /* -------------- slliw rd, rs1, uimm[4:0] --------------- */
+ TESTINST_1_1(4, "slliw a0, a1, 0", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "slliw a0, a1, 1", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "slliw a0, a1, 2", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "slliw a0, a1, 4", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "slliw a0, a1, 8", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "slliw a0, a1, 16", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "slliw a0, a1, 31", 0xabcdef0123456789, a0, a1);
+
+ TESTINST_1_1(4, "slliw t5, t6, 1", 0xabcdef0123456789, t5, t6);
+ TESTINST_1_1(4, "slliw zero, a0, 1", 0xabcdef0123456789, zero, a0);
+
+ /* -------------- srliw rd, rs1, uimm[4:0] --------------- */
+ TESTINST_1_1(4, "srliw a0, a1, 0", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "srliw a0, a1, 1", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "srliw a0, a1, 2", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "srliw a0, a1, 4", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "srliw a0, a1, 8", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "srliw a0, a1, 16", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "srliw a0, a1, 31", 0xabcdef0123456789, a0, a1);
+
+ TESTINST_1_1(4, "srliw t5, t6, 1", 0xabcdef0123456789, t5, t6);
+ TESTINST_1_1(4, "srliw zero, a0, 1", 0xabcdef0123456789, zero, a0);
+
+ /* -------------- sraiw rd, rs1, uimm[4:0] --------------- */
+ TESTINST_1_1(4, "sraiw a0, a1, 0", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "sraiw a0, a1, 1", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "sraiw a0, a1, 2", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "sraiw a0, a1, 4", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "sraiw a0, a1, 8", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "sraiw a0, a1, 16", 0xabcdef0123456789, a0, a1);
+ TESTINST_1_1(4, "sraiw a0, a1, 31", 0xabcdef0123456789, a0, a1);
+
+ TESTINST_1_1(4, "srai t5, t6, 1", 0xabcdef0123456789, t5, t6);
+ TESTINST_1_1(4, "srai zero, a0, 1", 0xabcdef0123456789, zero, a0);
+
+ /* ------------------ addw rd, rs1, rs2 ------------------ */
+ TESTINST_1_2(4, "addw a0, a1, a2", 0x0000000000001000, 0x0000000000002000, a0,
+ a1, a2);
+ TESTINST_1_2(4, "addw a0, a1, a2", 0x000000007fffffff, 0x0000000000000001, a0,
+ a1, a2);
+ TESTINST_1_2(4, "addw a0, a1, a2", 0x00000000fffffffe, 0x0000000000000001, a0,
+ a1, a2);
+ TESTINST_1_2(4, "addw a0, a1, a2", 0x00000000ffffffff, 0x0000000000000001, a0,
+ a1, a2);
+ TESTINST_1_2(4, "addw a0, a1, a2", 0xfffffffffffffffe, 0x0000000000000001, a0,
+ a1, a2);
+ TESTINST_1_2(4, "addw a0, a1, a2", 0xffffffffffffffff, 0x0000000000000001, a0,
+ a1, a2);
+
+ TESTINST_1_2(4, "addw t4, t5, t6", 0x0000000000001000, 0x0000000000002000, t4,
+ t5, t6);
+ TESTINST_1_2(4, "addw zero, a0, a1", 0x0000000000001000, 0x0000000000002000,
+ zero, a0, a1);
+
+ /* ------------------ subw rd, rs1, rs2 ------------------ */
+ TESTINST_1_2(4, "subw a0, a1, a2", 0x0000000000001000, 0x0000000000000fff, a0,
+ a1, a2);
+ TESTINST_1_2(4, "subw a0, a1, a2", 0x0000000000001000, 0x0000000000001000, a0,
+ a1, a2);
+ TESTINST_1_2(4, "subw a0, a1, a2", 0x0000000000001000, 0x0000000000001001, a0,
+ a1, a2);
+ TESTINST_1_2(4, "subw a0, a1, a2", 0xffffffffffffffff, 0x0000000000000000, a0,
+ a1, a2);
+ TESTINST_1_2(4, "subw a0, a1, a2", 0x0000000100000000, 0x0000000000000001, a0,
+ a1, a2);
+
+ TESTINST_1_2(4, "subw t4, t5, t6", 0x0000000000001000, 0x0000000000000fff, t4,
+ t5, t6);
+ TESTINST_1_2(4, "subw zero, a0, a1", 0x0000000000001000, 0x0000000000000fff,
+ zero, a0, a1);
+
+ /* ------------------ sllw rd, rs1, rs2 ------------------ */
+ TESTINST_1_2(4, "sllw a0, a1, a2", 0xabcdef0123456789, 0, a0, a1, a2);
+ TESTINST_1_2(4, "sllw a0, a1, a2", 0xabcdef0123456789, 1, a0, a1, a2);
+ TESTINST_1_2(4, "sllw a0, a1, a2", 0xabcdef0123456789, 2, a0, a1, a2);
+ TESTINST_1_2(4, "sllw a0, a1, a2", 0xabcdef0123456789, 4, a0, a1, a2);
+ TESTINST_1_2(4, "sllw a0, a1, a2", 0xabcdef0123456789, 8, a0, a1, a2);
+ TESTINST_1_2(4, "sllw a0, a1, a2", 0xabcdef0123456789, 16, a0, a1, a2);
+ TESTINST_1_2(4, "sllw a0, a1, a2", 0xabcdef0123456789, 31, a0, a1, a2);
+ TESTINST_1_2(4, "sllw a0, a1, a2", 0xabcdef0123456789, 32, a0, a1, a2);
+
+ TESTINST_1_2(4, "sllw t4, t5, t6", 0xabcdef0123456789, 1, t4, t5, t6);
+ TESTINST_1_2(4, "sllw zero, a0, a1", 0xabcdef0123456789, 1, zero, a0, a1);
+
+ /* ------------------ srlw rd, rs1, rs2 ------------------ */
+ TESTINST_1_2(4, "srlw a0, a1, a2", 0xabcdef0123456789, 0, a0, a1, a2);
+ TESTINST_1_2(4, "srlw a0, a1, a2", 0xabcdef0123456789, 1, a0, a1, a2);
+ TESTINST_1_2(4, "srlw a0, a1, a2", 0xabcdef0123456789, 2, a0, a1, a2);
+ TESTINST_1_2(4, "srlw a0, a1, a2", 0xabcdef0123456789, 4, a0, a1, a2);
+ TESTINST_1_2(4, "srlw a0, a1, a2", 0xabcdef0123456789, 8, a0, a1, a2);
+ TESTINST_1_2(4, "srlw a0, a1, a2", 0xabcdef0123456789, 16, a0, a1, a2);
+ TESTINST_1_2(4, "srlw a0, a1, a2", 0xabcdef0123456789, 31, a0, a1, a2);
+ TESTINST_1_2(4, "srlw a0, a1, a2", 0xabcdef0123456789, 32, a0, a1, a2);
+
+ TESTINST_1_2(4, "srlw t4, t5, t6", 0xabcdef0123456789, 1, t4, t5, t6);
+ TESTINST_1_2(4, "srlw zero, a0, a1", 0xabcdef0123456789, 1, zero, a0, a1);
+
+ /* ------------------ sraw rd, rs1, rs2 ------------------ */
+ TESTINST_1_2(4, "sraw a0, a1, a2", 0xabcdef0123456789, 0, a0, a1, a2);
+ TESTINST_1_2(4, "sraw a0, a1, a2", 0xabcdef0123456789, 1, a0, a1, a2);
+ TESTINST_1_2(4, "sraw a0, a1, a2", 0xabcdef0123456789, 2, a0, a1, a2);
+ TESTINST_1_2(4, "sraw a0, a1, a2", 0xabcdef0123456789, 4, a0, a1, a2);
+ TESTINST_1_2(4, "sraw a0, a1, a2", 0xabcdef0123456789, 8, a0, a1, a2);
+ TESTINST_1_2(4, "sraw a0, a1, a2", 0xabcdef0123456789, 16, a0, a1, a2);
+ TESTINST_1_2(4, "sraw a0, a1, a2", 0xabcdef0123456789, 31, a0, a1, a2);
+ TESTINST_1_2(4, "sraw a0, a1, a2", 0xabcdef0123456789, 32, a0, a1, a2);
+
+ TESTINST_1_2(4, "sraw t4, t5, t6", 0xabcdef0123456789, 1, t4, t5, t6);
+ TESTINST_1_2(4, "sraw zero, a0, a1", 0xabcdef0123456789, 1, zero, a0, a1);
+}
+
+int main(void)
+{
+ test_integer_shared();
+ test_integer_additions();
+ return 0;
+}
--- /dev/null
+RV64I base instruction set, shared operations
+lui a0, 0 ::
+ output: a0=0x0000000000000000
+lui a0, 1 ::
+ output: a0=0x0000000000001000
+lui a0, 2 ::
+ output: a0=0x0000000000002000
+lui a0, 4 ::
+ output: a0=0x0000000000004000
+lui a0, 8 ::
+ output: a0=0x0000000000008000
+lui a0, 16 ::
+ output: a0=0x0000000000010000
+lui a0, 32 ::
+ output: a0=0x0000000000020000
+lui a0, 64 ::
+ output: a0=0x0000000000040000
+lui a0, 128 ::
+ output: a0=0x0000000000080000
+lui a0, 256 ::
+ output: a0=0x0000000000100000
+lui a0, 512 ::
+ output: a0=0x0000000000200000
+lui a0, 1024 ::
+ output: a0=0x0000000000400000
+lui a0, 2048 ::
+ output: a0=0x0000000000800000
+lui a0, 4096 ::
+ output: a0=0x0000000001000000
+lui a0, 8192 ::
+ output: a0=0x0000000002000000
+lui a0, 16384 ::
+ output: a0=0x0000000004000000
+lui a0, 32768 ::
+ output: a0=0x0000000008000000
+lui a0, 65536 ::
+ output: a0=0x0000000010000000
+lui a0, 131072 ::
+ output: a0=0x0000000020000000
+lui a0, 262144 ::
+ output: a0=0x0000000040000000
+lui a0, 524288 ::
+ output: a0=0xffffffff80000000
+lui a0, 1048575 ::
+ output: a0=0xfffffffffffff000
+lui t6, 1 ::
+ output: t6=0x0000000000001000
+lui zero, 1 ::
+ output: zero=0x0000000000000000
+auipc a0, 0 ::
+ output: a0=1f+0
+auipc a0, 1 ::
+ output: a0=1f+4096
+auipc a0, 2 ::
+ output: a0=1f+8192
+auipc a0, 4 ::
+ output: a0=1f+16384
+auipc a0, 8 ::
+ output: a0=1f+32768
+auipc a0, 16 ::
+ output: a0=1f+65536
+auipc a0, 32 ::
+ output: a0=1f+131072
+auipc a0, 64 ::
+ output: a0=1f+262144
+auipc a0, 128 ::
+ output: a0=1f+524288
+auipc a0, 256 ::
+ output: a0=1f+1048576
+auipc a0, 512 ::
+ output: a0=1f+2097152
+auipc a0, 1024 ::
+ output: a0=1f+4194304
+auipc a0, 2048 ::
+ output: a0=1f+8388608
+auipc a0, 4096 ::
+ output: a0=1f+16777216
+auipc a0, 8192 ::
+ output: a0=1f+33554432
+auipc a0, 16384 ::
+ output: a0=1f+67108864
+auipc a0, 32768 ::
+ output: a0=1f+134217728
+auipc a0, 65536 ::
+ output: a0=1f+268435456
+auipc a0, 131072 ::
+ output: a0=1f+536870912
+auipc a0, 262144 ::
+ output: a0=1f+1073741824
+auipc a0, 524288 ::
+ output: a0=1f-2147483648
+auipc a0, 1048575 ::
+ output: a0=1f-4096
+auipc t6, 1 ::
+ output: t6=1f+4096
+auipc zero, 1 ::
+ output: zero=0x0000000000000000
+jal t0, .+4 ::
+ output: t0=1f+4
+ target: reached
+jal t0, .+6 ::
+ output: t0=1f+4
+ target: reached
+jal t0, .+8 ::
+ output: t0=1f+4
+ target: reached
+jal t0, .+16 ::
+ output: t0=1f+4
+ target: reached
+jal t0, .+32 ::
+ output: t0=1f+4
+ target: reached
+jal t0, .+64 ::
+ output: t0=1f+4
+ target: reached
+jal t0, .+128 ::
+ output: t0=1f+4
+ target: reached
+jal t0, .+256 ::
+ output: t0=1f+4
+ target: reached
+jal t0, .+512 ::
+ output: t0=1f+4
+ target: reached
+jal t0, .+1024 ::
+ output: t0=1f+4
+ target: reached
+jal t0, .+2048 ::
+ output: t0=1f+4
+ target: reached
+jal t0, .-4 ::
+ output: t0=1f+4
+ target: reached
+jal t0, .-6 ::
+ output: t0=1f+4
+ target: reached
+jal t0, .-2048 ::
+ output: t0=1f+4
+ target: reached
+jal t6, .+4 ::
+ output: t6=1f+4
+ target: reached
+jal zero, .+4 ::
+ output: zero=0x0000000000000000
+ target: reached
+jalr ra, 0(t0) ::
+ inputs: t0=1f+4
+ output: ra=1f+4
+ target: reached
+jalr ra, 0(t0) ::
+ inputs: t0=1f+6
+ output: ra=1f+4
+ target: reached
+jalr ra, 0(t0) ::
+ inputs: t0=1f+8
+ output: ra=1f+4
+ target: reached
+jalr ra, 0(t0) ::
+ inputs: t0=1f-4
+ output: ra=1f+4
+ target: reached
+jalr ra, 0(t0) ::
+ inputs: t0=1f-6
+ output: ra=1f+4
+ target: reached
+jalr ra, 0(t0) ::
+ inputs: t0=1f-8
+ output: ra=1f+4
+ target: reached
+jalr ra, 0(t0) ::
+ inputs: t0=1f-8
+ output: ra=1f+4
+ target: reached
+jalr ra, 1(t0) ::
+ inputs: t0=1f-9
+ output: ra=1f+4
+ target: reached
+jalr ra, 2(t0) ::
+ inputs: t0=1f-10
+ output: ra=1f+4
+ target: reached
+jalr ra, 4(t0) ::
+ inputs: t0=1f-12
+ output: ra=1f+4
+ target: reached
+jalr ra, 8(t0) ::
+ inputs: t0=1f-16
+ output: ra=1f+4
+ target: reached
+jalr ra, 16(t0) ::
+ inputs: t0=1f-24
+ output: ra=1f+4
+ target: reached
+jalr ra, 32(t0) ::
+ inputs: t0=1f-40
+ output: ra=1f+4
+ target: reached
+jalr ra, 64(t0) ::
+ inputs: t0=1f-72
+ output: ra=1f+4
+ target: reached
+jalr ra, 128(t0) ::
+ inputs: t0=1f-136
+ output: ra=1f+4
+ target: reached
+jalr ra, 256(t0) ::
+ inputs: t0=1f-264
+ output: ra=1f+4
+ target: reached
+jalr ra, 512(t0) ::
+ inputs: t0=1f-520
+ output: ra=1f+4
+ target: reached
+jalr ra, 1024(t0) ::
+ inputs: t0=1f-1032
+ output: ra=1f+4
+ target: reached
+jalr ra, 2047(t0) ::
+ inputs: t0=1f-2055
+ output: ra=1f+4
+ target: reached
+jalr ra, -1(t0) ::
+ inputs: t0=1f-7
+ output: ra=1f+4
+ target: reached
+jalr ra, -2048(t0) ::
+ inputs: t0=1f+2040
+ output: ra=1f+4
+ target: reached
+jalr ra, 0(t6) ::
+ inputs: t6=1f+4
+ output: ra=1f+4
+ target: reached
+jalr zero, 0(a0) ::
+ inputs: a0=1f+4
+ output: zero=0x0000000000000000
+ target: reached
+beq a0, a1, .+4 ::
+ inputs: a0=0, a1=0
+ target: reached
+beq a0, a1, .+6 ::
+ inputs: a0=0, a1=0
+ target: reached
+beq a0, a1, .+8 ::
+ inputs: a0=0, a1=0
+ target: reached
+beq a0, a1, .+16 ::
+ inputs: a0=0, a1=0
+ target: reached
+beq a0, a1, .+32 ::
+ inputs: a0=0, a1=0
+ target: reached
+beq a0, a1, .+64 ::
+ inputs: a0=0, a1=0
+ target: reached
+beq a0, a1, .+128 ::
+ inputs: a0=0, a1=0
+ target: reached
+beq a0, a1, .+256 ::
+ inputs: a0=0, a1=0
+ target: reached
+beq a0, a1, .+512 ::
+ inputs: a0=0, a1=0
+ target: reached
+beq a0, a1, .+1024 ::
+ inputs: a0=0, a1=0
+ target: reached
+beq a0, a1, .+2048 ::
+ inputs: a0=0, a1=0
+ target: reached
+beq a0, a1, .-4 ::
+ inputs: a0=0, a1=0
+ target: reached
+beq a0, a1, .-6 ::
+ inputs: a0=0, a1=0
+ target: reached
+beq a0, a1, .-2048 ::
+ inputs: a0=0, a1=0
+ target: reached
+beq t5, t6, .+4 ::
+ inputs: t5=0, t6=0
+ target: reached
+beq a0, a1, 1f ::
+ inputs: a0=0, a1=0
+ branch: taken
+beq a0, a1, 1f ::
+ inputs: a0=0, a1=1
+ branch: not taken
+beq a0, a1, 1f ::
+ inputs: a0=1, a1=0
+ branch: not taken
+beq a0, a1, 1f ::
+ inputs: a0=1, a1=1
+ branch: taken
+beq a0, zero, 1f ::
+ inputs: a0=0, zero=0
+ branch: taken
+beq a0, zero, 1f ::
+ inputs: a0=1, zero=0
+ branch: not taken
+beq zero, a0, 1f ::
+ inputs: zero=0, a0=0
+ branch: taken
+beq zero, a0, 1f ::
+ inputs: zero=0, a0=1
+ branch: not taken
+beq a0, a1, 1f ::
+ inputs: a0=0, a1=-1
+ branch: not taken
+beq a0, a1, 1f ::
+ inputs: a0=-1, a1=0
+ branch: not taken
+beq a0, a1, 1f ::
+ inputs: a0=-1, a1=-1
+ branch: taken
+bne a0, a1, 1f ::
+ inputs: a0=0, a1=0
+ branch: not taken
+bne a0, a1, 1f ::
+ inputs: a0=0, a1=1
+ branch: taken
+bne a0, a1, 1f ::
+ inputs: a0=1, a1=0
+ branch: taken
+bne a0, a1, 1f ::
+ inputs: a0=1, a1=1
+ branch: not taken
+bne a0, zero, 1f ::
+ inputs: a0=0, zero=0
+ branch: not taken
+bne a0, zero, 1f ::
+ inputs: a0=1, zero=0
+ branch: taken
+bne zero, a0, 1f ::
+ inputs: zero=0, a0=0
+ branch: not taken
+bne zero, a0, 1f ::
+ inputs: zero=0, a0=1
+ branch: taken
+bne a0, a1, 1f ::
+ inputs: a0=0, a1=-1
+ branch: taken
+bne a0, a1, 1f ::
+ inputs: a0=-1, a1=0
+ branch: taken
+bne a0, a1, 1f ::
+ inputs: a0=-1, a1=-1
+ branch: not taken
+blt a0, a1, 1f ::
+ inputs: a0=0, a1=0
+ branch: not taken
+blt a0, a1, 1f ::
+ inputs: a0=0, a1=1
+ branch: taken
+blt a0, a1, 1f ::
+ inputs: a0=1, a1=0
+ branch: not taken
+blt a0, a1, 1f ::
+ inputs: a0=1, a1=1
+ branch: not taken
+blt a0, zero, 1f ::
+ inputs: a0=0, zero=0
+ branch: not taken
+blt a0, zero, 1f ::
+ inputs: a0=1, zero=0
+ branch: not taken
+blt zero, a0, 1f ::
+ inputs: zero=0, a0=0
+ branch: not taken
+blt zero, a0, 1f ::
+ inputs: zero=0, a0=1
+ branch: taken
+blt a0, a1, 1f ::
+ inputs: a0=0, a1=-1
+ branch: not taken
+blt a0, a1, 1f ::
+ inputs: a0=-1, a1=0
+ branch: taken
+blt a0, a1, 1f ::
+ inputs: a0=-1, a1=-1
+ branch: not taken
+bge a0, a1, 1f ::
+ inputs: a0=0, a1=0
+ branch: taken
+bge a0, a1, 1f ::
+ inputs: a0=0, a1=1
+ branch: not taken
+bge a0, a1, 1f ::
+ inputs: a0=1, a1=0
+ branch: taken
+bge a0, a1, 1f ::
+ inputs: a0=1, a1=1
+ branch: taken
+bge a0, zero, 1f ::
+ inputs: a0=0, zero=0
+ branch: taken
+bge a0, zero, 1f ::
+ inputs: a0=1, zero=0
+ branch: taken
+bge zero, a0, 1f ::
+ inputs: zero=0, a0=0
+ branch: taken
+bge zero, a0, 1f ::
+ inputs: zero=0, a0=1
+ branch: not taken
+bge a0, a1, 1f ::
+ inputs: a0=0, a1=-1
+ branch: taken
+bge a0, a1, 1f ::
+ inputs: a0=-1, a1=0
+ branch: not taken
+bge a0, a1, 1f ::
+ inputs: a0=-1, a1=-1
+ branch: taken
+bltu a0, a1, 1f ::
+ inputs: a0=0, a1=0
+ branch: not taken
+bltu a0, a1, 1f ::
+ inputs: a0=0, a1=1
+ branch: taken
+bltu a0, a1, 1f ::
+ inputs: a0=1, a1=0
+ branch: not taken
+bltu a0, a1, 1f ::
+ inputs: a0=1, a1=1
+ branch: not taken
+bltu a0, zero, 1f ::
+ inputs: a0=0, zero=0
+ branch: not taken
+bltu a0, zero, 1f ::
+ inputs: a0=1, zero=0
+ branch: not taken
+bltu zero, a0, 1f ::
+ inputs: zero=0, a0=0
+ branch: not taken
+bltu zero, a0, 1f ::
+ inputs: zero=0, a0=1
+ branch: taken
+bltu a0, a1, 1f ::
+ inputs: a0=0, a1=-1
+ branch: taken
+bltu a0, a1, 1f ::
+ inputs: a0=-1, a1=0
+ branch: not taken
+bltu a0, a1, 1f ::
+ inputs: a0=-1, a1=-1
+ branch: not taken
+bgeu a0, a1, 1f ::
+ inputs: a0=0, a1=0
+ branch: taken
+bgeu a0, a1, 1f ::
+ inputs: a0=0, a1=1
+ branch: not taken
+bgeu a0, a1, 1f ::
+ inputs: a0=1, a1=0
+ branch: taken
+bgeu a0, a1, 1f ::
+ inputs: a0=1, a1=1
+ branch: taken
+bgeu a0, zero, 1f ::
+ inputs: a0=0, zero=0
+ branch: taken
+bgeu a0, zero, 1f ::
+ inputs: a0=1, zero=0
+ branch: taken
+bgeu zero, a0, 1f ::
+ inputs: zero=0, a0=0
+ branch: taken
+bgeu zero, a0, 1f ::
+ inputs: zero=0, a0=1
+ branch: not taken
+bgeu a0, a1, 1f ::
+ inputs: a0=0, a1=-1
+ branch: not taken
+bgeu a0, a1, 1f ::
+ inputs: a0=-1, a1=0
+ branch: taken
+bgeu a0, a1, 1f ::
+ inputs: a0=-1, a1=-1
+ branch: taken
+lb a0, 0(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffffffffffa0
+ no memory changes
+lb a0, 1(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000000000079
+ no memory changes
+lb a0, 2(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffffffffffed
+ no memory changes
+lb a0, 4(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000000000068
+ no memory changes
+lb a0, 8(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffffffffffef
+ no memory changes
+lb a0, 16(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000000000011
+ no memory changes
+lb a0, 32(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffffffffffe3
+ no memory changes
+lb a0, 64(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffffffffff92
+ no memory changes
+lb a0, 128(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000000000042
+ no memory changes
+lb a0, 256(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffffffffffc7
+ no memory changes
+lb a0, 512(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffffffffffcd
+ no memory changes
+lb a0, 1024(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000000000004a
+ no memory changes
+lb a0, 2047(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffffffffffbc
+ no memory changes
+lb a0, -1(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000000000002b
+ no memory changes
+lb a0, -2048(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffffffffff8c
+ no memory changes
+lb a4, 0(a5) ::
+ inputs: a5=&area_mid
+ output: a4=0xffffffffffffffed
+ no memory changes
+lb zero, 0(a0) ::
+ inputs: a0=&area_mid
+ output: zero=0x0000000000000000
+ no memory changes
+lh a0, 0(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000000000396f
+ no memory changes
+lh a0, 2(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffffffffbe76
+ no memory changes
+lh a0, 4(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x00000000000036cd
+ no memory changes
+lh a0, 8(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000000003f2d
+ no memory changes
+lh a0, 16(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000000000607f
+ no memory changes
+lh a0, 32(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x00000000000031b1
+ no memory changes
+lh a0, 64(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000000007a20
+ no memory changes
+lh a0, 128(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffffffffa24f
+ no memory changes
+lh a0, 256(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000000002ed4
+ no memory changes
+lh a0, 512(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffffffff9eda
+ no memory changes
+lh a0, 1024(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffffffffdc57
+ no memory changes
+lh a0, 2046(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffffffff8f1e
+ no memory changes
+lh a0, -2(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xfffffffffffffef5
+ no memory changes
+lh a0, -2048(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffffffffff99
+ no memory changes
+lh a4, 0(a5) ::
+ inputs: a5=&area_mid
+ output: a4=0x00000000000020fa
+ no memory changes
+lh zero, 0(a0) ::
+ inputs: a0=&area_mid
+ output: zero=0x0000000000000000
+ no memory changes
+lw a0, 0(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000050f7f87c
+ no memory changes
+lw a0, 4(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffffdde6ba3c
+ no memory changes
+lw a0, 8(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffff8349fb67
+ no memory changes
+lw a0, 16(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000006ce42545
+ no memory changes
+lw a0, 32(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000027636871
+ no memory changes
+lw a0, 64(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000000f131555
+ no memory changes
+lw a0, 128(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000005806056c
+ no memory changes
+lw a0, 256(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xffffffffdcef22c1
+ no memory changes
+lw a0, 512(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000003109b267
+ no memory changes
+lw a0, 1024(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000003db72f24
+ no memory changes
+lw a0, 2044(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000006e0e703
+ no memory changes
+lw a0, -4(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000074b87535
+ no memory changes
+lw a0, -2048(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000003d9ad2e6
+ no memory changes
+lw a4, 0(a5) ::
+ inputs: a5=&area_mid
+ output: a4=0xfffffffff267f447
+ no memory changes
+lw zero, 0(a0) ::
+ inputs: a0=&area_mid
+ output: zero=0x0000000000000000
+ no memory changes
+lbu a0, 0(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x00000000000000c9
+ no memory changes
+lbu a0, 1(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x00000000000000b8
+ no memory changes
+lbu a0, 2(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000000000089
+ no memory changes
+lbu a0, 4(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000000000098
+ no memory changes
+lbu a0, 8(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x00000000000000a8
+ no memory changes
+lbu a0, 16(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000000000005a
+ no memory changes
+lbu a0, 32(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000000000004c
+ no memory changes
+lbu a0, 64(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000000000003b
+ no memory changes
+lbu a0, 128(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000000000006a
+ no memory changes
+lbu a0, 256(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x00000000000000ef
+ no memory changes
+lbu a0, 512(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x00000000000000f5
+ no memory changes
+lbu a0, 1024(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000000000072
+ no memory changes
+lbu a0, 2047(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000000000036
+ no memory changes
+lbu a0, -1(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x00000000000000a5
+ no memory changes
+lbu a0, -2048(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x00000000000000b4
+ no memory changes
+lbu a4, 0(a5) ::
+ inputs: a5=&area_mid
+ output: a4=0x0000000000000015
+ no memory changes
+lbu zero, 0(a0) ::
+ inputs: a0=&area_mid
+ output: zero=0x0000000000000000
+ no memory changes
+lhu a0, 0(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000000007797
+ no memory changes
+lhu a0, 2(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000000006013
+ no memory changes
+lhu a0, 4(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000000000ddfe
+ no memory changes
+lhu a0, 8(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000000000cde5
+ no memory changes
+lhu a0, 16(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000000003ec7
+ no memory changes
+lhu a0, 32(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000000000af19
+ no memory changes
+lhu a0, 64(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x00000000000038c8
+ no memory changes
+lhu a0, 128(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000000000e078
+ no memory changes
+lhu a0, 256(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000000006dfd
+ no memory changes
+lhu a0, 512(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000000000dd03
+ no memory changes
+lhu a0, 1024(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000000001a80
+ no memory changes
+lhu a0, 2046(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000000000af2
+ no memory changes
+lhu a0, -2(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x00000000000079ca
+ no memory changes
+lhu a0, -2048(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000000003dc2
+ no memory changes
+lhu a4, 0(a5) ::
+ inputs: a5=&area_mid
+ output: a4=0x0000000000005f23
+ no memory changes
+lhu zero, 0(a0) ::
+ inputs: a0=&area_mid
+ output: zero=0x0000000000000000
+ no memory changes
+sb a0, 0(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+000] 89 .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
+sb a0, 1(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+000] .. 89 .. .. .. .. .. .. .. .. .. .. .. .. .. ..
+sb a0, 2(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+000] .. .. 89 .. .. .. .. .. .. .. .. .. .. .. .. ..
+sb a0, 4(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+000] .. .. .. .. 89 .. .. .. .. .. .. .. .. .. .. ..
+sb a0, 8(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+000] .. .. .. .. .. .. .. .. 89 .. .. .. .. .. .. ..
+sb a0, 16(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+016] 89 .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
+sb a0, 32(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+032] 89 .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
+sb a0, 64(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+064] 89 .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
+sb a0, 128(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+128] 89 .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
+sb a0, 256(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+256] 89 .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
+sb a0, 512(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+512] 89 .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
+sb a0, 1024(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+1024] 89 .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
+sb a0, 2047(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+2032] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. 89
+sb a0, -1(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [-016] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. 89
+sb a0, -2048(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [-2048] 89 .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
+sb a4, 0(a5) ::
+ inputs: a4=0xabcdef0123456789, a5=&area_mid
+ [+000] 89 .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
+sh a0, 0(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+000] 89 67 .. .. .. .. .. .. .. .. .. .. .. .. .. ..
+sh a0, 2(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+000] .. .. 89 67 .. .. .. .. .. .. .. .. .. .. .. ..
+sh a0, 4(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+000] .. .. .. .. 89 67 .. .. .. .. .. .. .. .. .. ..
+sh a0, 8(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+000] .. .. .. .. .. .. .. .. 89 67 .. .. .. .. .. ..
+sh a0, 16(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+016] 89 67 .. .. .. .. .. .. .. .. .. .. .. .. .. ..
+sh a0, 32(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+032] 89 67 .. .. .. .. .. .. .. .. .. .. .. .. .. ..
+sh a0, 64(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+064] 89 67 .. .. .. .. .. .. .. .. .. .. .. .. .. ..
+sh a0, 128(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+128] 89 67 .. .. .. .. .. .. .. .. .. .. .. .. .. ..
+sh a0, 256(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+256] 89 67 .. .. .. .. .. .. .. .. .. .. .. .. .. ..
+sh a0, 512(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+512] 89 67 .. .. .. .. .. .. .. .. .. .. .. .. .. ..
+sh a0, 1024(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+1024] 89 67 .. .. .. .. .. .. .. .. .. .. .. .. .. ..
+sh a0, 2046(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+2032] .. .. .. .. .. .. .. .. .. .. .. .. .. .. 89 67
+sh a0, -2(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [-016] .. .. .. .. .. .. .. .. .. .. .. .. .. .. 89 67
+sh a0, -2048(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [-2048] 89 67 .. .. .. .. .. .. .. .. .. .. .. .. .. ..
+sh a4, 0(a5) ::
+ inputs: a4=0xabcdef0123456789, a5=&area_mid
+ [+000] 89 67 .. .. .. .. .. .. .. .. .. .. .. .. .. ..
+sw a0, 0(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+000] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+sw a0, 4(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+000] .. .. .. .. 89 67 45 23 .. .. .. .. .. .. .. ..
+sw a0, 8(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+000] .. .. .. .. .. .. .. .. 89 67 45 23 .. .. .. ..
+sw a0, 16(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+016] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+sw a0, 32(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+032] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+sw a0, 64(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+064] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+sw a0, 128(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+128] 89 .. 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+sw a0, 256(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+256] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+sw a0, 512(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+512] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+sw a0, 1024(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+1024] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+sw a0, 2044(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+2032] .. .. .. .. .. .. .. .. .. .. .. .. 89 67 45 23
+sw a0, -4(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [-016] .. .. .. .. .. .. .. .. .. .. .. .. 89 67 45 23
+sw a0, -2048(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [-2048] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+sw a4, 0(a5) ::
+ inputs: a4=0xabcdef0123456789, a5=&area_mid
+ [+000] 89 67 45 23 .. .. .. .. .. .. .. .. .. .. .. ..
+addi a0, a1, 1 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000001001
+addi a0, a1, 2 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000001002
+addi a0, a1, 4 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000001004
+addi a0, a1, 8 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000001008
+addi a0, a1, 16 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000001010
+addi a0, a1, 32 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000001020
+addi a0, a1, 64 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000001040
+addi a0, a1, 128 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000001080
+addi a0, a1, 256 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000001100
+addi a0, a1, 1024 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000001400
+addi a0, a1, 2047 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x00000000000017ff
+addi a0, a1, -1 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000000fff
+addi a0, a1, -2048 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000000800
+addi a0, a1, 1 ::
+ inputs: a1=0x000000007fffffff
+ output: a0=0x0000000080000000
+addi a0, a1, 1 ::
+ inputs: a1=0x00000000fffffffe
+ output: a0=0x00000000ffffffff
+addi a0, a1, 1 ::
+ inputs: a1=0x00000000ffffffff
+ output: a0=0x0000000100000000
+addi t5, t6, 1 ::
+ inputs: t6=0x0000000000001000
+ output: t5=0x0000000000001001
+addi zero, a0, 1 ::
+ inputs: a0=0x0000000000001000
+ output: zero=0x0000000000000000
+slti a0, a1, 0 ::
+ inputs: a1=0x0000000000000000
+ output: a0=0x0000000000000000
+slti a0, a1, 0 ::
+ inputs: a1=0x0000000000000001
+ output: a0=0x0000000000000000
+slti a0, a1, 0 ::
+ inputs: a1=0xffffffffffffffff
+ output: a0=0x0000000000000001
+slti a0, a1, 0x7ff ::
+ inputs: a1=0x00000000000007ff
+ output: a0=0x0000000000000000
+slti a0, a1, 0x7ff ::
+ inputs: a1=0x0000000000000800
+ output: a0=0x0000000000000000
+slti a0, a1, 0xffffffffffffffff ::
+ inputs: a1=0xffffffffffffffff
+ output: a0=0x0000000000000000
+slti a0, a1, 0xffffffffffffffff ::
+ inputs: a1=0x0000000000000000
+ output: a0=0x0000000000000000
+slti t5, t6, 0 ::
+ inputs: t6=0x0000000000000000
+ output: t5=0x0000000000000000
+slti t5, t6, 0 ::
+ inputs: t6=0x0000000000000001
+ output: t5=0x0000000000000000
+slti zero, a0, 1 ::
+ inputs: a0=0x0000000000000000
+ output: zero=0x0000000000000000
+sltiu a0, a1, 0 ::
+ inputs: a1=0x0000000000000000
+ output: a0=0x0000000000000000
+sltiu a0, a1, 0 ::
+ inputs: a1=0x0000000000000001
+ output: a0=0x0000000000000000
+sltiu a0, a1, 0 ::
+ inputs: a1=0xffffffffffffffff
+ output: a0=0x0000000000000000
+sltiu a0, a1, 0x7ff ::
+ inputs: a1=0x00000000000007ff
+ output: a0=0x0000000000000000
+sltiu a0, a1, 0x7ff ::
+ inputs: a1=0x0000000000000800
+ output: a0=0x0000000000000000
+sltiu a0, a1, 0xffffffffffffffff ::
+ inputs: a1=0xffffffffffffffff
+ output: a0=0x0000000000000000
+sltiu a0, a1, 0xffffffffffffffff ::
+ inputs: a1=0x0000000000000000
+ output: a0=0x0000000000000001
+sltiu t5, t6, 0 ::
+ inputs: t6=0x0000000000000000
+ output: t5=0x0000000000000000
+sltiu t5, t6, 0 ::
+ inputs: t6=0x0000000000000001
+ output: t5=0x0000000000000000
+sltiu zero, a0, 1 ::
+ inputs: a0=0x0000000000000000
+ output: zero=0x0000000000000000
+xori a0, a1, 0 ::
+ inputs: a1=0x0000ffff0000ffff
+ output: a0=0x0000ffff0000ffff
+xori a0, a1, 0 ::
+ inputs: a1=0xffff0000ffff0000
+ output: a0=0xffff0000ffff0000
+xori a0, a1, 0x7ff ::
+ inputs: a1=0x0000ffff0000ffff
+ output: a0=0x0000ffff0000f800
+xori a0, a1, 0x7ff ::
+ inputs: a1=0xffff0000ffff0000
+ output: a0=0xffff0000ffff07ff
+xori a0, a1, 0xffffffffffffffff ::
+ inputs: a1=0x0000ffff0000ffff
+ output: a0=0xffff0000ffff0000
+xori a0, a1, 0xffffffffffffffff ::
+ inputs: a1=0xffff0000ffff0000
+ output: a0=0x0000ffff0000ffff
+xori t5, t6, 0 ::
+ inputs: t6=0x0000ffff0000ffff
+ output: t5=0x0000ffff0000ffff
+xori zero, a0, 0x7ff ::
+ inputs: a0=0x0000ffff0000ffff
+ output: zero=0x0000000000000000
+ori a0, a1, 0 ::
+ inputs: a1=0x0000ffff0000ffff
+ output: a0=0x0000ffff0000ffff
+ori a0, a1, 0 ::
+ inputs: a1=0xffff0000ffff0000
+ output: a0=0xffff0000ffff0000
+ori a0, a1, 0x7ff ::
+ inputs: a1=0x0000ffff0000ffff
+ output: a0=0x0000ffff0000ffff
+ori a0, a1, 0x7ff ::
+ inputs: a1=0xffff0000ffff0000
+ output: a0=0xffff0000ffff07ff
+ori a0, a1, 0xffffffffffffffff ::
+ inputs: a1=0x0000ffff0000ffff
+ output: a0=0xffffffffffffffff
+ori a0, a1, 0xffffffffffffffff ::
+ inputs: a1=0xffff0000ffff0000
+ output: a0=0xffffffffffffffff
+ori t5, t6, 0 ::
+ inputs: t6=0x0000ffff0000ffff
+ output: t5=0x0000ffff0000ffff
+ori zero, a0, 0x7ff ::
+ inputs: a0=0x0000ffff0000ffff
+ output: zero=0x0000000000000000
+andi a0, a1, 0 ::
+ inputs: a1=0x0000ffff0000ffff
+ output: a0=0x0000000000000000
+andi a0, a1, 0 ::
+ inputs: a1=0xffff0000ffff0000
+ output: a0=0x0000000000000000
+andi a0, a1, 0x7ff ::
+ inputs: a1=0x0000ffff0000ffff
+ output: a0=0x00000000000007ff
+andi a0, a1, 0x7ff ::
+ inputs: a1=0xffff0000ffff0000
+ output: a0=0x0000000000000000
+andi a0, a1, 0xffffffffffffffff ::
+ inputs: a1=0x0000ffff0000ffff
+ output: a0=0x0000ffff0000ffff
+andi a0, a1, 0xffffffffffffffff ::
+ inputs: a1=0xffff0000ffff0000
+ output: a0=0xffff0000ffff0000
+andi t5, t6, 0 ::
+ inputs: t6=0x0000ffff0000ffff
+ output: t5=0x0000000000000000
+andi zero, a0, 0x7ff ::
+ inputs: a0=0x0000ffff0000ffff
+ output: zero=0x0000000000000000
+slli a0, a1, 0 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0xabcdef0123456789
+slli a0, a1, 1 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x579bde02468acf12
+slli a0, a1, 2 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0xaf37bc048d159e24
+slli a0, a1, 4 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0xbcdef01234567890
+slli a0, a1, 8 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0xcdef012345678900
+slli a0, a1, 16 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0xef01234567890000
+slli a0, a1, 32 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x2345678900000000
+slli a0, a1, 63 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x8000000000000000
+slli t5, t6, 1 ::
+ inputs: t6=0xabcdef0123456789
+ output: t5=0x579bde02468acf12
+slli zero, a0, 1 ::
+ inputs: a0=0xabcdef0123456789
+ output: zero=0x0000000000000000
+srli a0, a1, 0 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0xabcdef0123456789
+srli a0, a1, 1 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x55e6f78091a2b3c4
+srli a0, a1, 2 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x2af37bc048d159e2
+srli a0, a1, 4 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x0abcdef012345678
+srli a0, a1, 8 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x00abcdef01234567
+srli a0, a1, 16 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x0000abcdef012345
+srli a0, a1, 32 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x00000000abcdef01
+srli a0, a1, 63 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x0000000000000001
+srli t5, t6, 1 ::
+ inputs: t6=0xabcdef0123456789
+ output: t5=0x55e6f78091a2b3c4
+srli zero, a0, 1 ::
+ inputs: a0=0xabcdef0123456789
+ output: zero=0x0000000000000000
+srai a0, a1, 0 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0xabcdef0123456789
+srai a0, a1, 1 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0xd5e6f78091a2b3c4
+srai a0, a1, 2 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0xeaf37bc048d159e2
+srai a0, a1, 4 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0xfabcdef012345678
+srai a0, a1, 8 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0xffabcdef01234567
+srai a0, a1, 16 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0xffffabcdef012345
+srai a0, a1, 32 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0xffffffffabcdef01
+srai a0, a1, 63 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0xffffffffffffffff
+srai t5, t6, 1 ::
+ inputs: t6=0xabcdef0123456789
+ output: t5=0xd5e6f78091a2b3c4
+srai zero, a0, 1 ::
+ inputs: a0=0xabcdef0123456789
+ output: zero=0x0000000000000000
+add a0, a1, a2 ::
+ inputs: a1=0x0000000000001000, a2=0x0000000000002000
+ output: a0=0x0000000000003000
+add a0, a1, a2 ::
+ inputs: a1=0x000000007fffffff, a2=0x0000000000000001
+ output: a0=0x0000000080000000
+add a0, a1, a2 ::
+ inputs: a1=0x00000000fffffffe, a2=0x0000000000000001
+ output: a0=0x00000000ffffffff
+add a0, a1, a2 ::
+ inputs: a1=0x00000000ffffffff, a2=0x0000000000000001
+ output: a0=0x0000000100000000
+add a0, a1, a2 ::
+ inputs: a1=0xfffffffffffffffe, a2=0x0000000000000001
+ output: a0=0xffffffffffffffff
+add a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0x0000000000000001
+ output: a0=0x0000000000000000
+add t4, t5, t6 ::
+ inputs: t5=0x0000000000001000, t6=0x0000000000002000
+ output: t4=0x0000000000003000
+add zero, a0, a1 ::
+ inputs: a0=0x0000000000001000, a1=0x0000000000002000
+ output: zero=0x0000000000000000
+sub a0, a1, a2 ::
+ inputs: a1=0x0000000000001000, a2=0x0000000000000fff
+ output: a0=0x0000000000000001
+sub a0, a1, a2 ::
+ inputs: a1=0x0000000000001000, a2=0x0000000000001000
+ output: a0=0x0000000000000000
+sub a0, a1, a2 ::
+ inputs: a1=0x0000000000001000, a2=0x0000000000001001
+ output: a0=0xffffffffffffffff
+sub a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0x0000000000000000
+ output: a0=0xffffffffffffffff
+sub a0, a1, a2 ::
+ inputs: a1=0x0000000100000000, a2=0x0000000000000001
+ output: a0=0x00000000ffffffff
+sub t4, t5, t6 ::
+ inputs: t5=0x0000000000001000, t6=0x0000000000000fff
+ output: t4=0x0000000000000001
+sub zero, a0, a1 ::
+ inputs: a0=0x0000000000001000, a1=0x0000000000000fff
+ output: zero=0x0000000000000000
+sll a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000000
+ output: a0=0xabcdef0123456789
+sll a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000001
+ output: a0=0x579bde02468acf12
+sll a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000002
+ output: a0=0xaf37bc048d159e24
+sll a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000004
+ output: a0=0xbcdef01234567890
+sll a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000008
+ output: a0=0xcdef012345678900
+sll a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000010
+ output: a0=0xef01234567890000
+sll a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000020
+ output: a0=0x2345678900000000
+sll a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x000000000000003f
+ output: a0=0x8000000000000000
+sll a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000040
+ output: a0=0xabcdef0123456789
+sll t4, t5, t6 ::
+ inputs: t5=0xabcdef0123456789, t6=0x0000000000000001
+ output: t4=0x579bde02468acf12
+sll zero, a0, a1 ::
+ inputs: a0=0xabcdef0123456789, a1=0x0000000000000001
+ output: zero=0x0000000000000000
+slt a0, a1, a2 ::
+ inputs: a1=0x0000000000000000, a2=0x0000000000000000
+ output: a0=0x0000000000000000
+slt a0, a1, a2 ::
+ inputs: a1=0x0000000000000000, a2=0x0000000000000001
+ output: a0=0x0000000000000001
+slt a0, a1, a2 ::
+ inputs: a1=0x0000000000000000, a2=0xffffffffffffffff
+ output: a0=0x0000000000000000
+slt t4, t5, t6 ::
+ inputs: t5=0x0000000000000000, t6=0x0000000000000000
+ output: t4=0x0000000000000000
+slt t4, t5, t6 ::
+ inputs: t5=0x0000000000000000, t6=0x0000000000000001
+ output: t4=0x0000000000000001
+slt zero, a0, a1 ::
+ inputs: a0=0x0000000000000000, a1=0x0000000000000001
+ output: zero=0x0000000000000000
+sltu a0, a1, a2 ::
+ inputs: a1=0x0000000000000000, a2=0x0000000000000000
+ output: a0=0x0000000000000000
+sltu a0, a1, a2 ::
+ inputs: a1=0x0000000000000000, a2=0x0000000000000001
+ output: a0=0x0000000000000001
+sltu a0, a1, a2 ::
+ inputs: a1=0x0000000000000000, a2=0xffffffffffffffff
+ output: a0=0x0000000000000001
+sltu t4, t5, t6 ::
+ inputs: t5=0x0000000000000000, t6=0x0000000000000000
+ output: t4=0x0000000000000000
+sltu t4, t5, t6 ::
+ inputs: t5=0x0000000000000000, t6=0x0000000000000001
+ output: t4=0x0000000000000001
+sltu zero, a0, a1 ::
+ inputs: a0=0x0000000000000000, a1=0x0000000000000001
+ output: zero=0x0000000000000000
+xor a0, a1, a2 ::
+ inputs: a1=0x0000ffff0000ffff, a2=0x00000000ffffffff
+ output: a0=0x0000ffffffff0000
+xor t4, t5, t6 ::
+ inputs: t5=0x0000ffff0000ffff, t6=0x00000000ffffffff
+ output: t4=0x0000ffffffff0000
+xor zero, a0, a1 ::
+ inputs: a0=0x0000ffff0000ffff, a1=0x00000000ffffffff
+ output: zero=0x0000000000000000
+srl a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000000
+ output: a0=0xabcdef0123456789
+srl a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000001
+ output: a0=0x55e6f78091a2b3c4
+srl a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000002
+ output: a0=0x2af37bc048d159e2
+srl a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000004
+ output: a0=0x0abcdef012345678
+srl a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000008
+ output: a0=0x00abcdef01234567
+srl a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000010
+ output: a0=0x0000abcdef012345
+srl a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000020
+ output: a0=0x00000000abcdef01
+srl a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x000000000000003f
+ output: a0=0x0000000000000001
+srl a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000040
+ output: a0=0xabcdef0123456789
+srl t4, t5, t6 ::
+ inputs: t5=0xabcdef0123456789, t6=0x0000000000000001
+ output: t4=0x55e6f78091a2b3c4
+srl zero, a0, a1 ::
+ inputs: a0=0xabcdef0123456789, a1=0x0000000000000001
+ output: zero=0x0000000000000000
+sra a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000000
+ output: a0=0xabcdef0123456789
+sra a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000001
+ output: a0=0xd5e6f78091a2b3c4
+sra a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000002
+ output: a0=0xeaf37bc048d159e2
+sra a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000004
+ output: a0=0xfabcdef012345678
+sra a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000008
+ output: a0=0xffabcdef01234567
+sra a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000010
+ output: a0=0xffffabcdef012345
+sra a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000020
+ output: a0=0xffffffffabcdef01
+sra a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x000000000000003f
+ output: a0=0xffffffffffffffff
+sra a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000040
+ output: a0=0xabcdef0123456789
+sra t4, t5, t6 ::
+ inputs: t5=0xabcdef0123456789, t6=0x0000000000000001
+ output: t4=0xd5e6f78091a2b3c4
+sra zero, a0, a1 ::
+ inputs: a0=0xabcdef0123456789, a1=0x0000000000000001
+ output: zero=0x0000000000000000
+or a0, a1, a2 ::
+ inputs: a1=0x0000ffff0000ffff, a2=0x00000000ffffffff
+ output: a0=0x0000ffffffffffff
+or t4, t5, t6 ::
+ inputs: t5=0x0000ffff0000ffff, t6=0x00000000ffffffff
+ output: t4=0x0000ffffffffffff
+or zero, a0, a1 ::
+ inputs: a0=0x0000ffff0000ffff, a1=0x00000000ffffffff
+ output: zero=0x0000000000000000
+and a0, a1, a2 ::
+ inputs: a1=0x0000ffff0000ffff, a2=0x00000000ffffffff
+ output: a0=0x000000000000ffff
+and t4, t5, t6 ::
+ inputs: t5=0x0000ffff0000ffff, t6=0x00000000ffffffff
+ output: t4=0x000000000000ffff
+and zero, a0, a1 ::
+ inputs: a0=0x0000ffff0000ffff, a1=0x00000000ffffffff
+ output: zero=0x0000000000000000
+fence ::
+
+RV64I base instruction set, additions
+lwu a0, 0(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x00000000ab16b28b
+ no memory changes
+lwu a0, 4(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000000ec1edba
+ no memory changes
+lwu a0, 8(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000006117bfcc
+ no memory changes
+lwu a0, 16(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000002d4154e2
+ no memory changes
+lwu a0, 32(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x00000000ce7e8e1c
+ no memory changes
+lwu a0, 64(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x00000000022aa69b
+ no memory changes
+lwu a0, 128(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x00000000e3156eea
+ no memory changes
+lwu a0, 256(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000097ee3bb0
+ no memory changes
+lwu a0, 512(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x000000004ce82b35
+ no memory changes
+lwu a0, 1024(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x00000000185668b2
+ no memory changes
+lwu a0, 2044(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x00000000e3fcbe9a
+ no memory changes
+lwu a0, -4(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000052d34dcc
+ no memory changes
+lwu a0, -2048(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0000000098b98bf4
+ no memory changes
+lwu a4, 0(a5) ::
+ inputs: a5=&area_mid
+ output: a4=0x000000004d86ad56
+ no memory changes
+lwu zero, 0(a0) ::
+ inputs: a0=&area_mid
+ output: zero=0x0000000000000000
+ no memory changes
+ld a0, 0(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x396ebd333e9785d7
+ no memory changes
+ld a0, 4(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x2d4a090205687129
+ no memory changes
+ld a0, 8(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xd300b16a85cd7c06
+ no memory changes
+ld a0, 16(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x0de93ef601cc1aa8
+ no memory changes
+ld a0, 32(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x933e83556593c5dc
+ no memory changes
+ld a0, 64(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xc30c82379dd342d0
+ no memory changes
+ld a0, 128(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x88f1496a86e6d207
+ no memory changes
+ld a0, 256(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x2a6f38124a0f2f9c
+ no memory changes
+ld a0, 512(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xd04a4b711fa93ec2
+ no memory changes
+ld a0, 1024(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x4aa8a98a2b57bc7f
+ no memory changes
+ld a0, 2040(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0x59bee9ecfe744029
+ no memory changes
+ld a0, -4(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xeef6a921c896781e
+ no memory changes
+ld a0, -2048(a1) ::
+ inputs: a1=&area_mid
+ output: a0=0xa56a8d842a3a5f41
+ no memory changes
+ld a4, 0(a5) ::
+ inputs: a5=&area_mid
+ output: a4=0x9821dab6df0781a2
+ no memory changes
+ld zero, 0(a0) ::
+ inputs: a0=&area_mid
+ output: zero=0x0000000000000000
+ no memory changes
+sd a0, 0(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+000] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+sd a0, 4(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+000] .. .. .. .. 89 67 45 23 01 ef cd ab .. .. .. ..
+sd a0, 8(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+000] .. .. .. .. .. .. .. .. 89 67 45 23 01 ef cd ab
+sd a0, 16(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+016] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+sd a0, 32(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+032] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+sd a0, 64(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+064] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+sd a0, 128(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+128] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+sd a0, 256(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+256] .. 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+sd a0, 512(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+512] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+sd a0, 1024(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+1024] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+sd a0, 2040(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [+2032] .. .. .. .. .. .. .. .. 89 67 45 23 01 ef cd ab
+sd a0, -4(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [-016] .. .. .. .. .. .. .. .. .. .. .. .. 89 67 45 23
+ [+000] 01 ef cd ab .. .. .. .. .. .. .. .. .. .. .. ..
+sd a0, -2048(a1) ::
+ inputs: a0=0xabcdef0123456789, a1=&area_mid
+ [-2048] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+sd a4, 0(a5) ::
+ inputs: a4=0xabcdef0123456789, a5=&area_mid
+ [+000] 89 67 45 23 01 ef cd ab .. .. .. .. .. .. .. ..
+addiw a0, a1, 1 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000001001
+addiw a0, a1, 2 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000001002
+addiw a0, a1, 4 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000001004
+addiw a0, a1, 8 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000001008
+addiw a0, a1, 16 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000001010
+addiw a0, a1, 32 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000001020
+addiw a0, a1, 64 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000001040
+addiw a0, a1, 128 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000001080
+addiw a0, a1, 256 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000001100
+addiw a0, a1, 1024 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000001400
+addiw a0, a1, 2047 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x00000000000017ff
+addiw a0, a1, -1 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000000fff
+addiw a0, a1, -2048 ::
+ inputs: a1=0x0000000000001000
+ output: a0=0x0000000000000800
+addiw a0, a1, 1 ::
+ inputs: a1=0x000000007fffffff
+ output: a0=0xffffffff80000000
+addiw a0, a1, 1 ::
+ inputs: a1=0x00000000fffffffe
+ output: a0=0xffffffffffffffff
+addiw a0, a1, 1 ::
+ inputs: a1=0x00000000ffffffff
+ output: a0=0x0000000000000000
+addiw t5, t6, 1 ::
+ inputs: t6=0x0000000000001000
+ output: t5=0x0000000000001001
+addiw zero, a0, 1 ::
+ inputs: a0=0x0000000000001000
+ output: zero=0x0000000000000000
+slliw a0, a1, 0 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x0000000023456789
+slliw a0, a1, 1 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x00000000468acf12
+slliw a0, a1, 2 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0xffffffff8d159e24
+slliw a0, a1, 4 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x0000000034567890
+slliw a0, a1, 8 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x0000000045678900
+slliw a0, a1, 16 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x0000000067890000
+slliw a0, a1, 31 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0xffffffff80000000
+slliw t5, t6, 1 ::
+ inputs: t6=0xabcdef0123456789
+ output: t5=0x00000000468acf12
+slliw zero, a0, 1 ::
+ inputs: a0=0xabcdef0123456789
+ output: zero=0x0000000000000000
+srliw a0, a1, 0 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x0000000023456789
+srliw a0, a1, 1 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x0000000011a2b3c4
+srliw a0, a1, 2 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x0000000008d159e2
+srliw a0, a1, 4 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x0000000002345678
+srliw a0, a1, 8 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x0000000000234567
+srliw a0, a1, 16 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x0000000000002345
+srliw a0, a1, 31 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x0000000000000000
+srliw t5, t6, 1 ::
+ inputs: t6=0xabcdef0123456789
+ output: t5=0x0000000011a2b3c4
+srliw zero, a0, 1 ::
+ inputs: a0=0xabcdef0123456789
+ output: zero=0x0000000000000000
+sraiw a0, a1, 0 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x0000000023456789
+sraiw a0, a1, 1 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x0000000011a2b3c4
+sraiw a0, a1, 2 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x0000000008d159e2
+sraiw a0, a1, 4 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x0000000002345678
+sraiw a0, a1, 8 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x0000000000234567
+sraiw a0, a1, 16 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x0000000000002345
+sraiw a0, a1, 31 ::
+ inputs: a1=0xabcdef0123456789
+ output: a0=0x0000000000000000
+srai t5, t6, 1 ::
+ inputs: t6=0xabcdef0123456789
+ output: t5=0xd5e6f78091a2b3c4
+srai zero, a0, 1 ::
+ inputs: a0=0xabcdef0123456789
+ output: zero=0x0000000000000000
+addw a0, a1, a2 ::
+ inputs: a1=0x0000000000001000, a2=0x0000000000002000
+ output: a0=0x0000000000003000
+addw a0, a1, a2 ::
+ inputs: a1=0x000000007fffffff, a2=0x0000000000000001
+ output: a0=0xffffffff80000000
+addw a0, a1, a2 ::
+ inputs: a1=0x00000000fffffffe, a2=0x0000000000000001
+ output: a0=0xffffffffffffffff
+addw a0, a1, a2 ::
+ inputs: a1=0x00000000ffffffff, a2=0x0000000000000001
+ output: a0=0x0000000000000000
+addw a0, a1, a2 ::
+ inputs: a1=0xfffffffffffffffe, a2=0x0000000000000001
+ output: a0=0xffffffffffffffff
+addw a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0x0000000000000001
+ output: a0=0x0000000000000000
+addw t4, t5, t6 ::
+ inputs: t5=0x0000000000001000, t6=0x0000000000002000
+ output: t4=0x0000000000003000
+addw zero, a0, a1 ::
+ inputs: a0=0x0000000000001000, a1=0x0000000000002000
+ output: zero=0x0000000000000000
+subw a0, a1, a2 ::
+ inputs: a1=0x0000000000001000, a2=0x0000000000000fff
+ output: a0=0x0000000000000001
+subw a0, a1, a2 ::
+ inputs: a1=0x0000000000001000, a2=0x0000000000001000
+ output: a0=0x0000000000000000
+subw a0, a1, a2 ::
+ inputs: a1=0x0000000000001000, a2=0x0000000000001001
+ output: a0=0xffffffffffffffff
+subw a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0x0000000000000000
+ output: a0=0xffffffffffffffff
+subw a0, a1, a2 ::
+ inputs: a1=0x0000000100000000, a2=0x0000000000000001
+ output: a0=0xffffffffffffffff
+subw t4, t5, t6 ::
+ inputs: t5=0x0000000000001000, t6=0x0000000000000fff
+ output: t4=0x0000000000000001
+subw zero, a0, a1 ::
+ inputs: a0=0x0000000000001000, a1=0x0000000000000fff
+ output: zero=0x0000000000000000
+sllw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000000
+ output: a0=0x0000000023456789
+sllw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000001
+ output: a0=0x00000000468acf12
+sllw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000002
+ output: a0=0xffffffff8d159e24
+sllw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000004
+ output: a0=0x0000000034567890
+sllw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000008
+ output: a0=0x0000000045678900
+sllw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000010
+ output: a0=0x0000000067890000
+sllw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x000000000000001f
+ output: a0=0xffffffff80000000
+sllw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000020
+ output: a0=0x0000000023456789
+sllw t4, t5, t6 ::
+ inputs: t5=0xabcdef0123456789, t6=0x0000000000000001
+ output: t4=0x00000000468acf12
+sllw zero, a0, a1 ::
+ inputs: a0=0xabcdef0123456789, a1=0x0000000000000001
+ output: zero=0x0000000000000000
+srlw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000000
+ output: a0=0x0000000023456789
+srlw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000001
+ output: a0=0x0000000011a2b3c4
+srlw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000002
+ output: a0=0x0000000008d159e2
+srlw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000004
+ output: a0=0x0000000002345678
+srlw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000008
+ output: a0=0x0000000000234567
+srlw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000010
+ output: a0=0x0000000000002345
+srlw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x000000000000001f
+ output: a0=0x0000000000000000
+srlw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000020
+ output: a0=0x0000000023456789
+srlw t4, t5, t6 ::
+ inputs: t5=0xabcdef0123456789, t6=0x0000000000000001
+ output: t4=0x0000000011a2b3c4
+srlw zero, a0, a1 ::
+ inputs: a0=0xabcdef0123456789, a1=0x0000000000000001
+ output: zero=0x0000000000000000
+sraw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000000
+ output: a0=0x0000000023456789
+sraw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000001
+ output: a0=0x0000000011a2b3c4
+sraw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000002
+ output: a0=0x0000000008d159e2
+sraw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000004
+ output: a0=0x0000000002345678
+sraw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000008
+ output: a0=0x0000000000234567
+sraw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000010
+ output: a0=0x0000000000002345
+sraw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x000000000000001f
+ output: a0=0x0000000000000000
+sraw a0, a1, a2 ::
+ inputs: a1=0xabcdef0123456789, a2=0x0000000000000020
+ output: a0=0x0000000023456789
+sraw t4, t5, t6 ::
+ inputs: t5=0xabcdef0123456789, t6=0x0000000000000001
+ output: t4=0x0000000011a2b3c4
+sraw zero, a0, a1 ::
+ inputs: a0=0xabcdef0123456789, a1=0x0000000000000001
+ output: zero=0x0000000000000000
--- /dev/null
+prog: integer
+vgopts: -q
--- /dev/null
+/* Tests for the RV64M standard multiplication and division instruction-set
+ extension. */
+
+#include "testinst.h"
+
+static void test_muldiv_shared(void)
+{
+ printf(
+ "RV64M multiplication and division instruction set, shared operations\n");
+
+ /* ------------------ mul rd, rs1, rs2 ------------------- */
+ TESTINST_1_2(4, "mul a0, a1, a2", 0x0000000000005000, 0x0000000000002000, a0,
+ a1, a2);
+ TESTINST_1_2(4, "mul a0, a1, a2", 0x7fffffffffffffff, 0x0000000000000002, a0,
+ a1, a2);
+ TESTINST_1_2(4, "mul a0, a1, a2", 0x7fffffffffffffff, 0x7fffffffffffffff, a0,
+ a1, a2);
+ TESTINST_1_2(4, "mul a0, a1, a2", 0x7fffffffffffffff, 0xffffffffffffffff, a0,
+ a1, a2);
+ TESTINST_1_2(4, "mul a0, a1, a2", 0xffffffffffffffff, 0xffffffffffffffff, a0,
+ a1, a2);
+ TESTINST_1_2(4, "mul a0, a1, a2", 0x8000000000000000, 0x0000000000000002, a0,
+ a1, a2);
+ TESTINST_1_2(4, "mul a0, a1, a2", 0x8000000000000000, 0xffffffffffffffff, a0,
+ a1, a2);
+ TESTINST_1_2(4, "mul a0, a1, a2", 0x8000000000000000, 0x8000000000000000, a0,
+ a1, a2);
+ TESTINST_1_2(4, "mul a0, a1, a2", 0x0000000000000001, 0x0000000000000000, a0,
+ a1, a2);
+ TESTINST_1_2(4, "mul a0, a1, a2", 0xffffffffffffffff, 0x0000000000000000, a0,
+ a1, a2);
+
+ TESTINST_1_2(4, "mul t4, t5, t6", 0x0000000000001000, 0x0000000000002000, t4,
+ t5, t6);
+ TESTINST_1_2(4, "mul zero, a0, a1", 0x0000000000001000, 0x0000000000002000,
+ zero, a0, a1);
+
+ /* ------------------ mulh rd, rs1, rs2 ------------------ */
+ TESTINST_1_2(4, "mulh a0, a1, a2", 0x0000000000005000, 0x0000000000002000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulh a0, a1, a2", 0x7fffffffffffffff, 0x0000000000000002,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulh a0, a1, a2", 0x7fffffffffffffff, 0x7fffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulh a0, a1, a2", 0x7fffffffffffffff, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulh a0, a1, a2", 0xffffffffffffffff, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulh a0, a1, a2", 0x8000000000000000, 0x0000000000000002,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulh a0, a1, a2", 0x8000000000000000, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulh a0, a1, a2", 0x8000000000000000, 0x8000000000000000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulh a0, a1, a2", 0x0000000000000001, 0x0000000000000000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulh a0, a1, a2", 0xffffffffffffffff, 0x0000000000000000,
+ a0, a1, a2);
+
+ TESTINST_1_2(4, "mulh t4, t5, t6", 0x0000000000001000, 0x0000000000002000,
+ t4, t5, t6);
+ TESTINST_1_2(4, "mulh zero, a0, a1", 0x0000000000001000, 0x0000000000002000,
+ zero, a0, a1);
+
+ /* ----------------- mulhsu rd, rs1, rs2 ----------------- */
+ /* Not currently handled. */
+
+ /* ----------------- mulhu rd, rs1, rs2 ------------------ */
+ TESTINST_1_2(4, "mulhu a0, a1, a2", 0x0000000000005000, 0x0000000000002000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulhu a0, a1, a2", 0x7fffffffffffffff, 0x0000000000000002,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulhu a0, a1, a2", 0x7fffffffffffffff, 0x7fffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulhu a0, a1, a2", 0x7fffffffffffffff, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulhu a0, a1, a2", 0xffffffffffffffff, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulhu a0, a1, a2", 0x8000000000000000, 0x0000000000000002,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulhu a0, a1, a2", 0x8000000000000000, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulhu a0, a1, a2", 0x8000000000000000, 0x8000000000000000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulhu a0, a1, a2", 0x0000000000000001, 0x0000000000000000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulhu a0, a1, a2", 0xffffffffffffffff, 0x0000000000000000,
+ a0, a1, a2);
+
+ TESTINST_1_2(4, "mulhu t4, t5, t6", 0x0000000000001000, 0x0000000000002000,
+ t4, t5, t6);
+ TESTINST_1_2(4, "mulhu zero, a0, a1", 0x0000000000001000, 0x0000000000002000,
+ zero, a0, a1);
+
+ /* ------------------ div rd, rs1, rs2 ------------------- */
+ TESTINST_1_2(4, "div a0, a1, a2", 0x0000000000005000, 0x0000000000002000, a0,
+ a1, a2);
+ TESTINST_1_2(4, "div a0, a1, a2", 0x7fffffffffffffff, 0x0000000000000002, a0,
+ a1, a2);
+ TESTINST_1_2(4, "div a0, a1, a2", 0x7fffffffffffffff, 0x7fffffffffffffff, a0,
+ a1, a2);
+ TESTINST_1_2(4, "div a0, a1, a2", 0x7fffffffffffffff, 0xffffffffffffffff, a0,
+ a1, a2);
+ TESTINST_1_2(4, "div a0, a1, a2", 0xffffffffffffffff, 0xffffffffffffffff, a0,
+ a1, a2);
+ TESTINST_1_2(4, "div a0, a1, a2", 0x8000000000000000, 0x0000000000000002, a0,
+ a1, a2);
+ TESTINST_1_2(4, "div a0, a1, a2", 0x8000000000000000, 0xffffffffffffffff, a0,
+ a1, a2);
+ TESTINST_1_2(4, "div a0, a1, a2", 0x8000000000000000, 0x8000000000000000, a0,
+ a1, a2);
+ TESTINST_1_2(4, "div a0, a1, a2", 0x0000000000000001, 0x0000000000000000, a0,
+ a1, a2);
+ TESTINST_1_2(4, "div a0, a1, a2", 0xffffffffffffffff, 0x0000000000000000, a0,
+ a1, a2);
+
+ TESTINST_1_2(4, "div t4, t5, t6", 0x0000000000005000, 0x0000000000002000, t4,
+ t5, t6);
+ TESTINST_1_2(4, "div zero, a0, a1", 0x0000000000005000, 0x0000000000002000,
+ zero, a0, a1);
+
+ /* ------------------ divu rd, rs1, rs2 ------------------ */
+ TESTINST_1_2(4, "divu a0, a1, a2", 0x0000000000005000, 0x0000000000002000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divu a0, a1, a2", 0x7fffffffffffffff, 0x0000000000000002,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divu a0, a1, a2", 0x7fffffffffffffff, 0x7fffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divu a0, a1, a2", 0x7fffffffffffffff, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divu a0, a1, a2", 0xffffffffffffffff, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divu a0, a1, a2", 0x8000000000000000, 0x0000000000000002,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divu a0, a1, a2", 0x8000000000000000, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divu a0, a1, a2", 0x8000000000000000, 0x8000000000000000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divu a0, a1, a2", 0x0000000000000001, 0x0000000000000000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divu a0, a1, a2", 0xffffffffffffffff, 0x0000000000000000,
+ a0, a1, a2);
+
+ TESTINST_1_2(4, "divu t4, t5, t6", 0x0000000000005000, 0x0000000000002000,
+ t4, t5, t6);
+ TESTINST_1_2(4, "divu zero, a0, a1", 0x0000000000005000, 0x0000000000002000,
+ zero, a0, a1);
+
+ /* ------------------ rem rd, rs1, rs2 ------------------- */
+ TESTINST_1_2(4, "rem a0, a1, a2", 0x0000000000005000, 0x0000000000002000, a0,
+ a1, a2);
+ TESTINST_1_2(4, "rem a0, a1, a2", 0x7fffffffffffffff, 0x0000000000000002, a0,
+ a1, a2);
+ TESTINST_1_2(4, "rem a0, a1, a2", 0x7fffffffffffffff, 0x7fffffffffffffff, a0,
+ a1, a2);
+ TESTINST_1_2(4, "rem a0, a1, a2", 0x7fffffffffffffff, 0xffffffffffffffff, a0,
+ a1, a2);
+ TESTINST_1_2(4, "rem a0, a1, a2", 0xffffffffffffffff, 0xffffffffffffffff, a0,
+ a1, a2);
+ TESTINST_1_2(4, "rem a0, a1, a2", 0x8000000000000000, 0x0000000000000002, a0,
+ a1, a2);
+ TESTINST_1_2(4, "rem a0, a1, a2", 0x8000000000000000, 0xffffffffffffffff, a0,
+ a1, a2);
+ TESTINST_1_2(4, "rem a0, a1, a2", 0x8000000000000000, 0x8000000000000000, a0,
+ a1, a2);
+ TESTINST_1_2(4, "rem a0, a1, a2", 0x0000000000000001, 0x0000000000000000, a0,
+ a1, a2);
+ TESTINST_1_2(4, "rem a0, a1, a2", 0xffffffffffffffff, 0x0000000000000000, a0,
+ a1, a2);
+
+ TESTINST_1_2(4, "rem t4, t5, t6", 0x0000000000005000, 0x0000000000002000, t4,
+ t5, t6);
+ TESTINST_1_2(4, "rem zero, a0, a1", 0x0000000000005000, 0x0000000000002000,
+ zero, a0, a1);
+
+ /* ------------------ remu rd, rs1, rs2 ------------------ */
+ TESTINST_1_2(4, "remu a0, a1, a2", 0x0000000000005000, 0x0000000000002000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remu a0, a1, a2", 0x7fffffffffffffff, 0x0000000000000002,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remu a0, a1, a2", 0x7fffffffffffffff, 0x7fffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remu a0, a1, a2", 0x7fffffffffffffff, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remu a0, a1, a2", 0xffffffffffffffff, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remu a0, a1, a2", 0x8000000000000000, 0x0000000000000002,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remu a0, a1, a2", 0x8000000000000000, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remu a0, a1, a2", 0x8000000000000000, 0x8000000000000000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remu a0, a1, a2", 0x0000000000000001, 0x0000000000000000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remu a0, a1, a2", 0xffffffffffffffff, 0x0000000000000000,
+ a0, a1, a2);
+
+ TESTINST_1_2(4, "remu t4, t5, t6", 0x0000000000005000, 0x0000000000002000,
+ t4, t5, t6);
+ TESTINST_1_2(4, "remu zero, a0, a1", 0x0000000000005000, 0x0000000000002000,
+ zero, a0, a1);
+
+ printf("\n");
+}
+
+static void test_muldiv_additions(void)
+{
+ printf("RV64M multiplication and division instruction set, additions\n");
+
+ /* ------------------ mulw rd, rs1, rs2 ------------------ */
+ TESTINST_1_2(4, "mulw a0, a1, a2", 0x0000000000005000, 0x0000000000002000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulw a0, a1, a2", 0x000000007fffffff, 0x0000000000000002,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulw a0, a1, a2", 0x000000007fffffff, 0x000000007fffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulw a0, a1, a2", 0x000000007fffffff, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulw a0, a1, a2", 0xffffffffffffffff, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulw a0, a1, a2", 0x0000000080000000, 0x0000000000000002,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulw a0, a1, a2", 0x0000000080000000, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulw a0, a1, a2", 0x0000000080000000, 0x0000000080000000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulw a0, a1, a2", 0x0000000000000001, 0x0000000000000000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "mulw a0, a1, a2", 0xffffffffffffffff, 0x0000000000000000,
+ a0, a1, a2);
+
+ TESTINST_1_2(4, "mulw t4, t5, t6", 0x0000000000001000, 0x0000000000002000,
+ t4, t5, t6);
+ TESTINST_1_2(4, "mulw zero, a0, a1", 0x0000000000001000, 0x0000000000002000,
+ zero, a0, a1);
+
+ /* ------------------ divw rd, rs1, rs2 ------------------ */
+ TESTINST_1_2(4, "divw a0, a1, a2", 0x0000000000005000, 0x0000000000002000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divw a0, a1, a2", 0x000000007fffffff, 0x0000000000000002,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divw a0, a1, a2", 0x000000007fffffff, 0x000000007fffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divw a0, a1, a2", 0x000000007fffffff, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divw a0, a1, a2", 0xffffffffffffffff, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divw a0, a1, a2", 0x0000000080000000, 0x0000000000000002,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divw a0, a1, a2", 0x0000000080000000, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divw a0, a1, a2", 0x0000000080000000, 0x0000000080000000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divw a0, a1, a2", 0x0000000000000001, 0x0000000000000000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divw a0, a1, a2", 0xffffffffffffffff, 0x0000000000000000,
+ a0, a1, a2);
+
+ TESTINST_1_2(4, "divw t4, t5, t6", 0x0000000000001000, 0x0000000000002000,
+ t4, t5, t6);
+ TESTINST_1_2(4, "divw zero, a0, a1", 0x0000000000001000, 0x0000000000002000,
+ zero, a0, a1);
+
+ /* ----------------- divuw rd, rs1, rs2 ------------------ */
+ TESTINST_1_2(4, "divuw a0, a1, a2", 0x0000000000005000, 0x0000000000002000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divuw a0, a1, a2", 0x000000007fffffff, 0x0000000000000002,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divuw a0, a1, a2", 0x000000007fffffff, 0x000000007fffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divuw a0, a1, a2", 0x000000007fffffff, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divuw a0, a1, a2", 0xffffffffffffffff, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divuw a0, a1, a2", 0x0000000080000000, 0x0000000000000002,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divuw a0, a1, a2", 0x0000000080000000, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divuw a0, a1, a2", 0x0000000080000000, 0x0000000080000000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divuw a0, a1, a2", 0x0000000000000001, 0x0000000000000000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "divuw a0, a1, a2", 0xffffffffffffffff, 0x0000000000000000,
+ a0, a1, a2);
+
+ TESTINST_1_2(4, "divuw t4, t5, t6", 0x0000000000001000, 0x0000000000002000,
+ t4, t5, t6);
+ TESTINST_1_2(4, "divuw zero, a0, a1", 0x0000000000001000, 0x0000000000002000,
+ zero, a0, a1);
+
+ /* ------------------ remw rd, rs1, rs2 ------------------ */
+ TESTINST_1_2(4, "remw a0, a1, a2", 0x0000000000005000, 0x0000000000002000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remw a0, a1, a2", 0x000000007fffffff, 0x0000000000000002,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remw a0, a1, a2", 0x000000007fffffff, 0x000000007fffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remw a0, a1, a2", 0x000000007fffffff, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remw a0, a1, a2", 0xffffffffffffffff, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remw a0, a1, a2", 0x0000000080000000, 0x0000000000000002,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remw a0, a1, a2", 0x0000000080000000, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remw a0, a1, a2", 0x0000000080000000, 0x0000000080000000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remw a0, a1, a2", 0x0000000000000001, 0x0000000000000000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remw a0, a1, a2", 0xffffffffffffffff, 0x0000000000000000,
+ a0, a1, a2);
+
+ TESTINST_1_2(4, "remw t4, t5, t6", 0x0000000000001000, 0x0000000000002000,
+ t4, t5, t6);
+ TESTINST_1_2(4, "remw zero, a0, a1", 0x0000000000001000, 0x0000000000002000,
+ zero, a0, a1);
+
+ /* ----------------- remuw rd, rs1, rs2 ------------------ */
+ TESTINST_1_2(4, "remuw a0, a1, a2", 0x0000000000005000, 0x0000000000002000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remuw a0, a1, a2", 0x000000007fffffff, 0x0000000000000002,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remuw a0, a1, a2", 0x000000007fffffff, 0x000000007fffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remuw a0, a1, a2", 0x000000007fffffff, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remuw a0, a1, a2", 0xffffffffffffffff, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remuw a0, a1, a2", 0x0000000080000000, 0x0000000000000002,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remuw a0, a1, a2", 0x0000000080000000, 0xffffffffffffffff,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remuw a0, a1, a2", 0x0000000080000000, 0x0000000080000000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remuw a0, a1, a2", 0x0000000000000001, 0x0000000000000000,
+ a0, a1, a2);
+ TESTINST_1_2(4, "remuw a0, a1, a2", 0xffffffffffffffff, 0x0000000000000000,
+ a0, a1, a2);
+
+ TESTINST_1_2(4, "remuw t4, t5, t6", 0x0000000000001000, 0x0000000000002000,
+ t4, t5, t6);
+ TESTINST_1_2(4, "remuw zero, a0, a1", 0x0000000000001000, 0x0000000000002000,
+ zero, a0, a1);
+}
+
+int main(void)
+{
+ test_muldiv_shared();
+ test_muldiv_additions();
+ return 0;
+}
--- /dev/null
+RV64M multiplication and division instruction set, shared operations
+mul a0, a1, a2 ::
+ inputs: a1=0x0000000000005000, a2=0x0000000000002000
+ output: a0=0x000000000a000000
+mul a0, a1, a2 ::
+ inputs: a1=0x7fffffffffffffff, a2=0x0000000000000002
+ output: a0=0xfffffffffffffffe
+mul a0, a1, a2 ::
+ inputs: a1=0x7fffffffffffffff, a2=0x7fffffffffffffff
+ output: a0=0x0000000000000001
+mul a0, a1, a2 ::
+ inputs: a1=0x7fffffffffffffff, a2=0xffffffffffffffff
+ output: a0=0x8000000000000001
+mul a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0xffffffffffffffff
+ output: a0=0x0000000000000001
+mul a0, a1, a2 ::
+ inputs: a1=0x8000000000000000, a2=0x0000000000000002
+ output: a0=0x0000000000000000
+mul a0, a1, a2 ::
+ inputs: a1=0x8000000000000000, a2=0xffffffffffffffff
+ output: a0=0x8000000000000000
+mul a0, a1, a2 ::
+ inputs: a1=0x8000000000000000, a2=0x8000000000000000
+ output: a0=0x0000000000000000
+mul a0, a1, a2 ::
+ inputs: a1=0x0000000000000001, a2=0x0000000000000000
+ output: a0=0x0000000000000000
+mul a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0x0000000000000000
+ output: a0=0x0000000000000000
+mul t4, t5, t6 ::
+ inputs: t5=0x0000000000001000, t6=0x0000000000002000
+ output: t4=0x0000000002000000
+mul zero, a0, a1 ::
+ inputs: a0=0x0000000000001000, a1=0x0000000000002000
+ output: zero=0x0000000000000000
+mulh a0, a1, a2 ::
+ inputs: a1=0x0000000000005000, a2=0x0000000000002000
+ output: a0=0x0000000000000000
+mulh a0, a1, a2 ::
+ inputs: a1=0x7fffffffffffffff, a2=0x0000000000000002
+ output: a0=0x0000000000000000
+mulh a0, a1, a2 ::
+ inputs: a1=0x7fffffffffffffff, a2=0x7fffffffffffffff
+ output: a0=0x3fffffffffffffff
+mulh a0, a1, a2 ::
+ inputs: a1=0x7fffffffffffffff, a2=0xffffffffffffffff
+ output: a0=0xffffffffffffffff
+mulh a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0xffffffffffffffff
+ output: a0=0x0000000000000000
+mulh a0, a1, a2 ::
+ inputs: a1=0x8000000000000000, a2=0x0000000000000002
+ output: a0=0xffffffffffffffff
+mulh a0, a1, a2 ::
+ inputs: a1=0x8000000000000000, a2=0xffffffffffffffff
+ output: a0=0x0000000000000000
+mulh a0, a1, a2 ::
+ inputs: a1=0x8000000000000000, a2=0x8000000000000000
+ output: a0=0x4000000000000000
+mulh a0, a1, a2 ::
+ inputs: a1=0x0000000000000001, a2=0x0000000000000000
+ output: a0=0x0000000000000000
+mulh a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0x0000000000000000
+ output: a0=0x0000000000000000
+mulh t4, t5, t6 ::
+ inputs: t5=0x0000000000001000, t6=0x0000000000002000
+ output: t4=0x0000000000000000
+mulh zero, a0, a1 ::
+ inputs: a0=0x0000000000001000, a1=0x0000000000002000
+ output: zero=0x0000000000000000
+mulhu a0, a1, a2 ::
+ inputs: a1=0x0000000000005000, a2=0x0000000000002000
+ output: a0=0x0000000000000000
+mulhu a0, a1, a2 ::
+ inputs: a1=0x7fffffffffffffff, a2=0x0000000000000002
+ output: a0=0x0000000000000000
+mulhu a0, a1, a2 ::
+ inputs: a1=0x7fffffffffffffff, a2=0x7fffffffffffffff
+ output: a0=0x3fffffffffffffff
+mulhu a0, a1, a2 ::
+ inputs: a1=0x7fffffffffffffff, a2=0xffffffffffffffff
+ output: a0=0x7ffffffffffffffe
+mulhu a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0xffffffffffffffff
+ output: a0=0xfffffffffffffffe
+mulhu a0, a1, a2 ::
+ inputs: a1=0x8000000000000000, a2=0x0000000000000002
+ output: a0=0x0000000000000001
+mulhu a0, a1, a2 ::
+ inputs: a1=0x8000000000000000, a2=0xffffffffffffffff
+ output: a0=0x7fffffffffffffff
+mulhu a0, a1, a2 ::
+ inputs: a1=0x8000000000000000, a2=0x8000000000000000
+ output: a0=0x4000000000000000
+mulhu a0, a1, a2 ::
+ inputs: a1=0x0000000000000001, a2=0x0000000000000000
+ output: a0=0x0000000000000000
+mulhu a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0x0000000000000000
+ output: a0=0x0000000000000000
+mulhu t4, t5, t6 ::
+ inputs: t5=0x0000000000001000, t6=0x0000000000002000
+ output: t4=0x0000000000000000
+mulhu zero, a0, a1 ::
+ inputs: a0=0x0000000000001000, a1=0x0000000000002000
+ output: zero=0x0000000000000000
+div a0, a1, a2 ::
+ inputs: a1=0x0000000000005000, a2=0x0000000000002000
+ output: a0=0x0000000000000002
+div a0, a1, a2 ::
+ inputs: a1=0x7fffffffffffffff, a2=0x0000000000000002
+ output: a0=0x3fffffffffffffff
+div a0, a1, a2 ::
+ inputs: a1=0x7fffffffffffffff, a2=0x7fffffffffffffff
+ output: a0=0x0000000000000001
+div a0, a1, a2 ::
+ inputs: a1=0x7fffffffffffffff, a2=0xffffffffffffffff
+ output: a0=0x8000000000000001
+div a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0xffffffffffffffff
+ output: a0=0x0000000000000001
+div a0, a1, a2 ::
+ inputs: a1=0x8000000000000000, a2=0x0000000000000002
+ output: a0=0xc000000000000000
+div a0, a1, a2 ::
+ inputs: a1=0x8000000000000000, a2=0xffffffffffffffff
+ output: a0=0x8000000000000000
+div a0, a1, a2 ::
+ inputs: a1=0x8000000000000000, a2=0x8000000000000000
+ output: a0=0x0000000000000001
+div a0, a1, a2 ::
+ inputs: a1=0x0000000000000001, a2=0x0000000000000000
+ output: a0=0xffffffffffffffff
+div a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0x0000000000000000
+ output: a0=0xffffffffffffffff
+div t4, t5, t6 ::
+ inputs: t5=0x0000000000005000, t6=0x0000000000002000
+ output: t4=0x0000000000000002
+div zero, a0, a1 ::
+ inputs: a0=0x0000000000005000, a1=0x0000000000002000
+ output: zero=0x0000000000000000
+divu a0, a1, a2 ::
+ inputs: a1=0x0000000000005000, a2=0x0000000000002000
+ output: a0=0x0000000000000002
+divu a0, a1, a2 ::
+ inputs: a1=0x7fffffffffffffff, a2=0x0000000000000002
+ output: a0=0x3fffffffffffffff
+divu a0, a1, a2 ::
+ inputs: a1=0x7fffffffffffffff, a2=0x7fffffffffffffff
+ output: a0=0x0000000000000001
+divu a0, a1, a2 ::
+ inputs: a1=0x7fffffffffffffff, a2=0xffffffffffffffff
+ output: a0=0x0000000000000000
+divu a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0xffffffffffffffff
+ output: a0=0x0000000000000001
+divu a0, a1, a2 ::
+ inputs: a1=0x8000000000000000, a2=0x0000000000000002
+ output: a0=0x4000000000000000
+divu a0, a1, a2 ::
+ inputs: a1=0x8000000000000000, a2=0xffffffffffffffff
+ output: a0=0x0000000000000000
+divu a0, a1, a2 ::
+ inputs: a1=0x8000000000000000, a2=0x8000000000000000
+ output: a0=0x0000000000000001
+divu a0, a1, a2 ::
+ inputs: a1=0x0000000000000001, a2=0x0000000000000000
+ output: a0=0xffffffffffffffff
+divu a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0x0000000000000000
+ output: a0=0xffffffffffffffff
+divu t4, t5, t6 ::
+ inputs: t5=0x0000000000005000, t6=0x0000000000002000
+ output: t4=0x0000000000000002
+divu zero, a0, a1 ::
+ inputs: a0=0x0000000000005000, a1=0x0000000000002000
+ output: zero=0x0000000000000000
+rem a0, a1, a2 ::
+ inputs: a1=0x0000000000005000, a2=0x0000000000002000
+ output: a0=0x0000000000001000
+rem a0, a1, a2 ::
+ inputs: a1=0x7fffffffffffffff, a2=0x0000000000000002
+ output: a0=0x0000000000000001
+rem a0, a1, a2 ::
+ inputs: a1=0x7fffffffffffffff, a2=0x7fffffffffffffff
+ output: a0=0x0000000000000000
+rem a0, a1, a2 ::
+ inputs: a1=0x7fffffffffffffff, a2=0xffffffffffffffff
+ output: a0=0x0000000000000000
+rem a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0xffffffffffffffff
+ output: a0=0x0000000000000000
+rem a0, a1, a2 ::
+ inputs: a1=0x8000000000000000, a2=0x0000000000000002
+ output: a0=0x0000000000000000
+rem a0, a1, a2 ::
+ inputs: a1=0x8000000000000000, a2=0xffffffffffffffff
+ output: a0=0x0000000000000000
+rem a0, a1, a2 ::
+ inputs: a1=0x8000000000000000, a2=0x8000000000000000
+ output: a0=0x0000000000000000
+rem a0, a1, a2 ::
+ inputs: a1=0x0000000000000001, a2=0x0000000000000000
+ output: a0=0x0000000000000001
+rem a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0x0000000000000000
+ output: a0=0xffffffffffffffff
+rem t4, t5, t6 ::
+ inputs: t5=0x0000000000005000, t6=0x0000000000002000
+ output: t4=0x0000000000001000
+rem zero, a0, a1 ::
+ inputs: a0=0x0000000000005000, a1=0x0000000000002000
+ output: zero=0x0000000000000000
+remu a0, a1, a2 ::
+ inputs: a1=0x0000000000005000, a2=0x0000000000002000
+ output: a0=0x0000000000001000
+remu a0, a1, a2 ::
+ inputs: a1=0x7fffffffffffffff, a2=0x0000000000000002
+ output: a0=0x0000000000000001
+remu a0, a1, a2 ::
+ inputs: a1=0x7fffffffffffffff, a2=0x7fffffffffffffff
+ output: a0=0x0000000000000000
+remu a0, a1, a2 ::
+ inputs: a1=0x7fffffffffffffff, a2=0xffffffffffffffff
+ output: a0=0x7fffffffffffffff
+remu a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0xffffffffffffffff
+ output: a0=0x0000000000000000
+remu a0, a1, a2 ::
+ inputs: a1=0x8000000000000000, a2=0x0000000000000002
+ output: a0=0x0000000000000000
+remu a0, a1, a2 ::
+ inputs: a1=0x8000000000000000, a2=0xffffffffffffffff
+ output: a0=0x8000000000000000
+remu a0, a1, a2 ::
+ inputs: a1=0x8000000000000000, a2=0x8000000000000000
+ output: a0=0x0000000000000000
+remu a0, a1, a2 ::
+ inputs: a1=0x0000000000000001, a2=0x0000000000000000
+ output: a0=0x0000000000000001
+remu a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0x0000000000000000
+ output: a0=0xffffffffffffffff
+remu t4, t5, t6 ::
+ inputs: t5=0x0000000000005000, t6=0x0000000000002000
+ output: t4=0x0000000000001000
+remu zero, a0, a1 ::
+ inputs: a0=0x0000000000005000, a1=0x0000000000002000
+ output: zero=0x0000000000000000
+
+RV64M multiplication and division instruction set, additions
+mulw a0, a1, a2 ::
+ inputs: a1=0x0000000000005000, a2=0x0000000000002000
+ output: a0=0x000000000a000000
+mulw a0, a1, a2 ::
+ inputs: a1=0x000000007fffffff, a2=0x0000000000000002
+ output: a0=0xfffffffffffffffe
+mulw a0, a1, a2 ::
+ inputs: a1=0x000000007fffffff, a2=0x000000007fffffff
+ output: a0=0x0000000000000001
+mulw a0, a1, a2 ::
+ inputs: a1=0x000000007fffffff, a2=0xffffffffffffffff
+ output: a0=0xffffffff80000001
+mulw a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0xffffffffffffffff
+ output: a0=0x0000000000000001
+mulw a0, a1, a2 ::
+ inputs: a1=0x0000000080000000, a2=0x0000000000000002
+ output: a0=0x0000000000000000
+mulw a0, a1, a2 ::
+ inputs: a1=0x0000000080000000, a2=0xffffffffffffffff
+ output: a0=0xffffffff80000000
+mulw a0, a1, a2 ::
+ inputs: a1=0x0000000080000000, a2=0x0000000080000000
+ output: a0=0x0000000000000000
+mulw a0, a1, a2 ::
+ inputs: a1=0x0000000000000001, a2=0x0000000000000000
+ output: a0=0x0000000000000000
+mulw a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0x0000000000000000
+ output: a0=0x0000000000000000
+mulw t4, t5, t6 ::
+ inputs: t5=0x0000000000001000, t6=0x0000000000002000
+ output: t4=0x0000000002000000
+mulw zero, a0, a1 ::
+ inputs: a0=0x0000000000001000, a1=0x0000000000002000
+ output: zero=0x0000000000000000
+divw a0, a1, a2 ::
+ inputs: a1=0x0000000000005000, a2=0x0000000000002000
+ output: a0=0x0000000000000002
+divw a0, a1, a2 ::
+ inputs: a1=0x000000007fffffff, a2=0x0000000000000002
+ output: a0=0x000000003fffffff
+divw a0, a1, a2 ::
+ inputs: a1=0x000000007fffffff, a2=0x000000007fffffff
+ output: a0=0x0000000000000001
+divw a0, a1, a2 ::
+ inputs: a1=0x000000007fffffff, a2=0xffffffffffffffff
+ output: a0=0xffffffff80000001
+divw a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0xffffffffffffffff
+ output: a0=0x0000000000000001
+divw a0, a1, a2 ::
+ inputs: a1=0x0000000080000000, a2=0x0000000000000002
+ output: a0=0xffffffffc0000000
+divw a0, a1, a2 ::
+ inputs: a1=0x0000000080000000, a2=0xffffffffffffffff
+ output: a0=0xffffffff80000000
+divw a0, a1, a2 ::
+ inputs: a1=0x0000000080000000, a2=0x0000000080000000
+ output: a0=0x0000000000000001
+divw a0, a1, a2 ::
+ inputs: a1=0x0000000000000001, a2=0x0000000000000000
+ output: a0=0xffffffffffffffff
+divw a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0x0000000000000000
+ output: a0=0xffffffffffffffff
+divw t4, t5, t6 ::
+ inputs: t5=0x0000000000001000, t6=0x0000000000002000
+ output: t4=0x0000000000000000
+divw zero, a0, a1 ::
+ inputs: a0=0x0000000000001000, a1=0x0000000000002000
+ output: zero=0x0000000000000000
+divuw a0, a1, a2 ::
+ inputs: a1=0x0000000000005000, a2=0x0000000000002000
+ output: a0=0x0000000000000002
+divuw a0, a1, a2 ::
+ inputs: a1=0x000000007fffffff, a2=0x0000000000000002
+ output: a0=0x000000003fffffff
+divuw a0, a1, a2 ::
+ inputs: a1=0x000000007fffffff, a2=0x000000007fffffff
+ output: a0=0x0000000000000001
+divuw a0, a1, a2 ::
+ inputs: a1=0x000000007fffffff, a2=0xffffffffffffffff
+ output: a0=0x0000000000000000
+divuw a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0xffffffffffffffff
+ output: a0=0x0000000000000001
+divuw a0, a1, a2 ::
+ inputs: a1=0x0000000080000000, a2=0x0000000000000002
+ output: a0=0x0000000040000000
+divuw a0, a1, a2 ::
+ inputs: a1=0x0000000080000000, a2=0xffffffffffffffff
+ output: a0=0x0000000000000000
+divuw a0, a1, a2 ::
+ inputs: a1=0x0000000080000000, a2=0x0000000080000000
+ output: a0=0x0000000000000001
+divuw a0, a1, a2 ::
+ inputs: a1=0x0000000000000001, a2=0x0000000000000000
+ output: a0=0xffffffffffffffff
+divuw a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0x0000000000000000
+ output: a0=0xffffffffffffffff
+divuw t4, t5, t6 ::
+ inputs: t5=0x0000000000001000, t6=0x0000000000002000
+ output: t4=0x0000000000000000
+divuw zero, a0, a1 ::
+ inputs: a0=0x0000000000001000, a1=0x0000000000002000
+ output: zero=0x0000000000000000
+remw a0, a1, a2 ::
+ inputs: a1=0x0000000000005000, a2=0x0000000000002000
+ output: a0=0x0000000000001000
+remw a0, a1, a2 ::
+ inputs: a1=0x000000007fffffff, a2=0x0000000000000002
+ output: a0=0x0000000000000001
+remw a0, a1, a2 ::
+ inputs: a1=0x000000007fffffff, a2=0x000000007fffffff
+ output: a0=0x0000000000000000
+remw a0, a1, a2 ::
+ inputs: a1=0x000000007fffffff, a2=0xffffffffffffffff
+ output: a0=0x0000000000000000
+remw a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0xffffffffffffffff
+ output: a0=0x0000000000000000
+remw a0, a1, a2 ::
+ inputs: a1=0x0000000080000000, a2=0x0000000000000002
+ output: a0=0x0000000000000000
+remw a0, a1, a2 ::
+ inputs: a1=0x0000000080000000, a2=0xffffffffffffffff
+ output: a0=0x0000000000000000
+remw a0, a1, a2 ::
+ inputs: a1=0x0000000080000000, a2=0x0000000080000000
+ output: a0=0x0000000000000000
+remw a0, a1, a2 ::
+ inputs: a1=0x0000000000000001, a2=0x0000000000000000
+ output: a0=0x0000000000000001
+remw a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0x0000000000000000
+ output: a0=0xffffffffffffffff
+remw t4, t5, t6 ::
+ inputs: t5=0x0000000000001000, t6=0x0000000000002000
+ output: t4=0x0000000000001000
+remw zero, a0, a1 ::
+ inputs: a0=0x0000000000001000, a1=0x0000000000002000
+ output: zero=0x0000000000000000
+remuw a0, a1, a2 ::
+ inputs: a1=0x0000000000005000, a2=0x0000000000002000
+ output: a0=0x0000000000001000
+remuw a0, a1, a2 ::
+ inputs: a1=0x000000007fffffff, a2=0x0000000000000002
+ output: a0=0x0000000000000001
+remuw a0, a1, a2 ::
+ inputs: a1=0x000000007fffffff, a2=0x000000007fffffff
+ output: a0=0x0000000000000000
+remuw a0, a1, a2 ::
+ inputs: a1=0x000000007fffffff, a2=0xffffffffffffffff
+ output: a0=0x000000007fffffff
+remuw a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0xffffffffffffffff
+ output: a0=0x0000000000000000
+remuw a0, a1, a2 ::
+ inputs: a1=0x0000000080000000, a2=0x0000000000000002
+ output: a0=0x0000000000000000
+remuw a0, a1, a2 ::
+ inputs: a1=0x0000000080000000, a2=0xffffffffffffffff
+ output: a0=0xffffffff80000000
+remuw a0, a1, a2 ::
+ inputs: a1=0x0000000080000000, a2=0x0000000080000000
+ output: a0=0x0000000000000000
+remuw a0, a1, a2 ::
+ inputs: a1=0x0000000000000001, a2=0x0000000000000000
+ output: a0=0x0000000000000001
+remuw a0, a1, a2 ::
+ inputs: a1=0xffffffffffffffff, a2=0x0000000000000000
+ output: a0=0xffffffffffffffff
+remuw t4, t5, t6 ::
+ inputs: t5=0x0000000000001000, t6=0x0000000000002000
+ output: t4=0x0000000000001000
+remuw zero, a0, a1 ::
+ inputs: a0=0x0000000000001000, a1=0x0000000000002000
+ output: zero=0x0000000000000000
--- /dev/null
+prog: muldiv
+vgopts: -q
--- /dev/null
+#include "tests/malloc.h"
+#include <stdbool.h>
+#include <stdio.h>
+
+/* Helper functions. */
+
+static inline unsigned char rand_uchar(void)
+{
+ static unsigned int seed = 80021;
+
+ seed = 1103515245 * seed + 12345;
+ return (seed >> 17) & 0xFF;
+}
+
+static void show_block_diff(unsigned char* block1,
+ unsigned char* block2,
+ size_t n,
+ size_t offset)
+{
+ bool block_changed = false;
+ for (size_t i = 0; i < n; i += 16) {
+ bool line_changed = false;
+ for (size_t j = i; j < n && j < i + 16; j++) {
+ if (block1[j] != block2[j]) {
+ line_changed = true;
+ break;
+ }
+ }
+ if (!line_changed)
+ continue;
+
+ if (i < offset)
+ printf(" [-%03zu] ", offset - i);
+ else
+ printf(" [+%03zu] ", i - offset);
+ for (size_t j = i; j < n && j < i + 16; j++) {
+ unsigned char diff = block1[j] - block2[j];
+ if (diff == 0)
+ printf(" ..");
+ else
+ printf(" %02x", block2[j]);
+ }
+ printf("\n");
+
+ block_changed = true;
+ }
+ if (!block_changed)
+ printf(" no memory changes\n");
+}
+
+/* Macros for testing individual instructions
+
+ Naming is in form TESTINST_<#outputs>_<#inputs>_<suffix-id>.
+
+ Environment to test each instruction is set up by a carefully crafted inline
+ assembly. The code implements own handling of input and output operands
+ which most importantly allows also use of the sp register as an instruction
+ operand. Register t1 is reserved for this purpose and must be avoided in
+ instruction tests.
+ */
+
+/* Disable clang-format for the test macros because it would mess up the inline
+ assembly. */
+/* clang-format off */
+
+#define ASMINST_2(instruction) \
+ ".option push;" \
+ ".option rvc;" \
+ instruction ";" \
+ ".option pop"
+
+#define ASMINST_4(instruction) \
+ ".option push;" \
+ ".option norvc;" \
+ instruction ";" \
+ ".option pop"
+
+#define TESTINST_0_0(length, instruction) \
+ { \
+ __asm__ __volatile__(ASMINST_##length(instruction)); \
+ printf("%s ::\n", instruction); \
+ }
+
+#define TESTINST_1_0(length, instruction, rd) \
+ { \
+ unsigned long w[1 /*out*/ + 1 /*spill*/] = {0, 0}; \
+ /* w[0] = output rd value \
+ w[1] = spill slot for rd \
+ */ \
+ register unsigned long* t1 asm("t1") = w; \
+ __asm__ __volatile__( \
+ "sd " #rd ", 8(%[w]);" /* Spill rd. */ \
+ ASMINST_##length(instruction) ";" \
+ "sd " #rd ", 0(%[w]);" /* Save result of the operation. */ \
+ "ld " #rd ", 8(%[w]);" /* Reload rd. */ \
+ : \
+ : [w] "r"(t1) \
+ : "memory"); \
+ printf("%s ::\n", instruction); \
+ printf(" output: %s=0x%016lx\n", #rd, w[0]); \
+ }
+
+#define TESTINST_1_1(length, instruction, rs1_val, rd, rs1) \
+ { \
+ unsigned long w[1 /*out*/ + 1 /*in*/ + 2 /*spill*/] = { \
+ 0, (unsigned long)rs1_val, 0, 0}; \
+ /* w[0] = output rd value \
+ w[1] = input rs1 value \
+ w[2] = spill slot for rd \
+ w[3] = spill slot for rs1 \
+ */ \
+ register unsigned long* t1 asm("t1") = w; \
+ __asm__ __volatile__( \
+ "sd " #rd ", 16(%[w]);" /* Spill rd. */ \
+ "sd " #rs1 ", 24(%[w]);" /* Spill rs1. */ \
+ "ld " #rs1 ", 8(%[w]);" /* Load the first input. */ \
+ ASMINST_##length(instruction) ";" \
+ "sd " #rd ", 0(%[w]);" /* Save result of the operation. */ \
+ "ld " #rd ", 16(%[w]);" /* Reload rd. */ \
+ "ld " #rs1 ", 24(%[w]);" /* Reload rs1. */ \
+ : \
+ : [w] "r"(t1) \
+ : "memory"); \
+ printf("%s ::\n", instruction); \
+ printf(" inputs: %s=0x%016lx\n", #rs1, (unsigned long)rs1_val); \
+ printf(" output: %s=0x%016lx\n", #rd, w[0]); \
+ }
+
+#define TESTINST_1_2(length, instruction, rs1_val, rs2_val, rd, rs1, rs2) \
+ { \
+ unsigned long w[1 /*out*/ + 2 /*in*/ + 3 /*spill*/] = { \
+ 0, (unsigned long)rs1_val, (unsigned long)rs2_val, 0, 0, 0}; \
+ /* w[0] = output rd value \
+ w[1] = input rs1 value \
+ w[2] = input rs2 value \
+ w[3] = spill slot for rd \
+ w[4] = spill slot for rs1 \
+ w[5] = spill slot for rs2 \
+ */ \
+ register unsigned long* t1 asm("t1") = w; \
+ __asm__ __volatile__( \
+ "sd " #rd ", 24(%[w]);" /* Spill rd. */ \
+ "sd " #rs1 ", 32(%[w]);" /* Spill rs1. */ \
+ "sd " #rs2 ", 40(%[w]);" /* Spill rs2. */ \
+ "ld " #rs1 ", 8(%[w]);" /* Load the first input. */ \
+ "ld " #rs2 ", 16(%[w]);" /* Load the second input. */ \
+ ASMINST_##length(instruction) ";" \
+ "sd " #rd ", 0(%[w]);" /* Save result of the operation. */ \
+ "ld " #rd ", 24(%[w]);" /* Reload rd. */ \
+ "ld " #rs1 ", 32(%[w]);" /* Reload rs1. */ \
+ "ld " #rs2 ", 40(%[w]);" /* Reload rs2. */ \
+ : \
+ : [w] "r"(t1) \
+ : "memory"); \
+ printf("%s ::\n", instruction); \
+ printf(" inputs: %s=0x%016lx, %s=0x%016lx\n", #rs1, \
+ (unsigned long)rs1_val, #rs2, (unsigned long)rs2_val); \
+ printf(" output: %s=0x%016lx\n", #rd, w[0]); \
+ }
+
+#define TYPED_LOAD(length, instruction, rd, rs1, ipre) \
+ { \
+ const size_t N = 4096; \
+ unsigned char* area = memalign16(N); \
+ unsigned char* area2 = memalign16(N); \
+ for (size_t i = 0; i < N; i++) \
+ area[i] = area2[i] = rand_uchar(); \
+ unsigned long w[1 /*out*/ + 1 /*in*/ + 2 /*spill*/] = { \
+ 0, (unsigned long)(area2 + N / 2), 0, 0}; \
+ /* w[0] = output rd value \
+ w[1] = input rs1 value \
+ w[2] = spill slot for rd \
+ w[3] = spill slot for rs1 \
+ */ \
+ register unsigned long* t1 asm("t1") = w; \
+ __asm__ __volatile__( \
+ ipre "sd " #rd ", 16(%[w]);" /* Spill rd. */ \
+ "sd " #rs1 ", 24(%[w]);" /* Spill rs1. */ \
+ "ld " #rs1 ", 8(%[w]);" /* Load the first input. */ \
+ ASMINST_##length(instruction) ";" \
+ ipre "sd " #rd ", 0(%[w]);" /* Save result of the operation. */ \
+ ipre "ld " #rd ", 16(%[w]);" /* Reload rd. */ \
+ "ld " #rs1 ", 24(%[w]);" /* Reload rs1. */ \
+ : \
+ : [w] "r"(t1) \
+ : "memory"); \
+ printf("%s ::\n", instruction); \
+ printf(" inputs: %s=&area_mid\n", #rs1); \
+ printf(" output: %s=0x%016lx\n", #rd, w[0]); \
+ show_block_diff(area, area2, N, N / 2); \
+ free(area); \
+ free(area2); \
+ }
+
+#define TESTINST_1_1_LOAD(length, instruction, rd, rs1) \
+ TYPED_LOAD(length, instruction, rd, rs1, "")
+
+#define TESTINST_1_1_FLOAD(length, instruction, rd, rs1) \
+ TYPED_LOAD(length, instruction, rd, rs1, "f")
+
+#define TYPED_STORE(length, instruction, rs2_val, rs2, rs1, ipre) \
+ { \
+ const size_t N = 4096; \
+ unsigned char* area = memalign16(N); \
+ unsigned char* area2 = memalign16(N); \
+ for (size_t i = 0; i < N; i++) \
+ area[i] = area2[i] = rand_uchar(); \
+ unsigned long w[2 /*in*/ + 2 /*spill*/] = { \
+ (unsigned long)rs2_val, (unsigned long)(area2 + N / 2), 0, 0}; \
+ /* w[0] = input rs2 value \
+ w[1] = input rs1 value \
+ w[2] = spill slot for rs2 \
+ w[3] = spill slot for rs1 \
+ */ \
+ register unsigned long* t1 asm("t1") = w; \
+ __asm__ __volatile__( \
+ ipre "sd " #rs2 ", 16(%[w]);" /* Spill rs2. */ \
+ "sd " #rs1 ", 24(%[w]);" /* Spill rs1. */ \
+ ipre "ld " #rs2 ", 0(%[w]);" /* Load the first input. */ \
+ "ld " #rs1 ", 8(%[w]);" /* Load the second input. */ \
+ ASMINST_##length(instruction) ";" \
+ ipre "ld " #rs2 ", 16(%[w]);" /* Reload rs2. */ \
+ "ld " #rs1 ", 24(%[w]);" /* Reload rs1. */ \
+ : \
+ : [w] "r"(t1) \
+ : "memory"); \
+ printf("%s ::\n", instruction); \
+ printf(" inputs: %s=0x%016lx, %s=&area_mid\n", #rs2, \
+ (unsigned long)rs2_val, #rs1); \
+ show_block_diff(area, area2, N, N / 2); \
+ free(area); \
+ free(area2); \
+ }
+
+#define TESTINST_0_2_STORE(length, instruction, rs2_val, rs2, rs1) \
+ TYPED_STORE(length, instruction, rs2_val, rs2, rs1, "")
+
+#define TESTINST_0_2_FSTORE(length, instruction, rs2_val, rs2, rs1) \
+ TYPED_STORE(length, instruction, rs2_val, rs2, rs1, "f")
+
+#define TESTINST_2_1_LRSC(length, lr_instruction, sc_instruction, lr_rd, \
+ sc_rd, rs1) \
+ { \
+ const size_t N = 32; \
+ unsigned char* area = memalign16(N); \
+ unsigned char* area2 = memalign16(N); \
+ for (size_t i = 0; i < N; i++) \
+ area2[i] = rand_uchar(); \
+ unsigned long w[4 /*out*/ + 1 /*in*/ + 3 /*spill*/]; \
+ /* w[0] = output lr_rd value \
+ w[1] = modded lr_rd value \
+ w[2] = output sc_rd value, first instruction \
+ w[3] = output sc_rd value, second instruction \
+ w[4] = address of the area midpoint \
+ w[5] = spill slot for lr_rd \
+ w[6] = spill slot for sc_rd \
+ w[7] = spill slot for rs1 \
+ */ \
+ register unsigned long* t1 asm("t1") = w; \
+ do { \
+ w[0] = w[1] = w[2] = w[3] = w[5] = w[6] = w[7] = 0; \
+ w[4] = (unsigned long)(area2 + N / 2); \
+ for (size_t i = 0; i < N; i++) \
+ area[i] = area2[i]; \
+ __asm__ __volatile__( \
+ "sd " #lr_rd ", 40(%[w]);" /* Spill lr_rd. */ \
+ "sd " #sc_rd ", 48(%[w]);" /* Spill sc_rd. */ \
+ "sd " #rs1 ", 56(%[w]);" /* Spill rs1. */ \
+ "ld " #rs1 ", 32(%[w]);" /* Load the first input. */ \
+ /* Perform a load and create a reservation. */ \
+ ASMINST_##length(lr_instruction) ";" \
+ "mv t2, " #lr_rd ";" /* Record the loaded value. */ \
+ /* Store a negated value which should succeed. */ \
+ "not " #lr_rd ", " #lr_rd ";" /* Modify the loaded value. */ \
+ ASMINST_##length(sc_instruction) ";" \
+ "sd t2, 0(%[w]);" /* Save result of the lr operation. */ \
+ "sd " #lr_rd" , 8(%[w]);" /* Save result of the not operation. */ \
+ "sd " #sc_rd ", 16(%[w]);" /* Save result of the sc operation. */ \
+ /* Store back the original value which should now fail. */ \
+ "mv " #lr_rd ", t2;" /* Get the original value. */ \
+ ASMINST_##length(sc_instruction) ";" \
+ "sd " #sc_rd ", 24(%[w]);" /* Save result of the sc operation. */ \
+ "ld " #lr_rd ", 40(%[w]);" /* Reload lr_rd. */ \
+ "ld " #sc_rd ", 48(%[w]);" /* Reload sc_rd. */ \
+ "ld " #rs1 ", 56(%[w]);" /* Reload rs1. */ \
+ : \
+ : [w] "r"(t1) \
+ : "t2", "memory"); \
+ /* Re-run the test in case it happens that the first sc instruction \
+ unexpectedly fails. */ \
+ } while (w[2] != 0); \
+ printf("%s ::\n", lr_instruction); \
+ printf(" inputs: %s=&area_mid\n", #rs1); \
+ printf(" output: %s=0x%016lx\n", #lr_rd, w[0]); \
+ printf("%s ::\n", sc_instruction); \
+ printf(" inputs: %s=&area_mid, %s=0x%016lx\n", #rs1, #lr_rd, w[1]); \
+ printf(" output: %s=0x%016lx\n", #sc_rd, w[2]); \
+ show_block_diff(area, area2, N, N / 2); \
+ printf("%s ::\n", sc_instruction); \
+ printf(" inputs: %s=&area_mid, %s=0x%016lx\n", #rs1, #lr_rd, w[0]); \
+ printf(" output: %s=0x%016lx\n", #sc_rd, w[3]); \
+ free(area); \
+ free(area2); \
+ }
+
+#define TESTINST_1_2_AMOX(length, instruction, rs2_val, rd, rs2, rs1) \
+ { \
+ const size_t N = 32; \
+ unsigned char* area = memalign16(N); \
+ unsigned char* area2 = memalign16(N); \
+ for (size_t i = 0; i < N; i++) \
+ area[i] = area2[i] = rand_uchar(); \
+ unsigned long w[1 /*out*/ + 2 /*in*/ + 3 /*spill*/] = { \
+ 0, (unsigned long)rs2_val, (unsigned long)(area2 + N / 2), 0, 0, 0}; \
+ /* w[0] = output rd value \
+ w[1] = input rs2 value \
+ w[2] = address of the area midpoint \
+ w[3] = spill slot for rd \
+ w[4] = spill slot for rs2 \
+ w[5] = spill slot for rs1 \
+ */ \
+ register unsigned long* t1 asm("t1") = w; \
+ __asm__ __volatile__( \
+ "sd " #rd ", 24(%[w]);" /* Spill rd. */ \
+ "sd " #rs2 ", 32(%[w]);" /* Spill rs2. */ \
+ "sd " #rs1 ", 40(%[w]);" /* Spill rs1. */ \
+ "ld " #rs2 ", 8(%[w]);" /* Load the first input. */ \
+ "ld " #rs1 ", 16(%[w]);" /* Load the second input. */ \
+ ASMINST_##length(instruction) ";" \
+ "sd " #rd ", 0(%[w]);" /* Save result of the operation. */ \
+ "ld " #rd ", 24(%[w]);" /* Reload rd. */ \
+ "ld " #rs2 ", 32(%[w]);" /* Reload rs2. */ \
+ "ld " #rs1 ", 40(%[w]);" /* Reload rs1. */ \
+ : \
+ : [w] "r"(t1) \
+ : "memory"); \
+ printf("%s ::\n", instruction); \
+ printf(" inputs: %s=0x%016lx, %s=&area_mid\n", #rs2, \
+ (unsigned long)rs2_val, #rs1); \
+ printf(" output: %s=0x%016lx\n", #rd, w[0]); \
+ show_block_diff(area, area2, N, N / 2); \
+ free(area); \
+ free(area2); \
+ }
+
+#define DEST_FMT_zero "0x%016lx"
+#define DEST_DIFF_zero(dest, base) (dest)
+
+#define DEST_FMT_norm "1f%+ld"
+#define DEST_DIFF_norm(dest, base) ((long)(dest - base))
+#define DEST_FMT_ra DEST_FMT_norm
+#define DEST_DIFF_ra(dest, base) DEST_DIFF_norm(dest, base)
+#define DEST_FMT_a0 DEST_FMT_norm
+#define DEST_DIFF_a0(dest, base) DEST_DIFF_norm(dest, base)
+#define DEST_FMT_t0 DEST_FMT_norm
+#define DEST_DIFF_t0(dest, base) DEST_DIFF_norm(dest, base)
+#define DEST_FMT_t6 DEST_FMT_norm
+#define DEST_DIFF_t6(dest, base) DEST_DIFF_norm(dest, base)
+
+#define DEST_FMT_unused "%s"
+#define DEST_DIFF_unused(dest, base) "unused"
+
+#define TESTINST_1_0_AUIPC(length, instruction, rd) \
+ { \
+ unsigned long w[2 /*out*/ + 1 /*spill*/] = {0, 0, 0}; \
+ /* w[0] = output rd value \
+ w[1] = address of the test instruction \
+ w[2] = spill slot for rd \
+ */ \
+ register unsigned long* t1 asm("t1") = w; \
+ __asm__ __volatile__( \
+ "sd " #rd ", 16(%[w]);" /* Spill rd. */ \
+ "1:;" \
+ ASMINST_##length(instruction) ";" \
+ "sd " #rd ", 0(%[w]);" /* Save result of the operation. */ \
+ "la t2, 1b;" \
+ "sd t2, 8(%[w]);" /* Store address of the test instr. */ \
+ "ld " #rd ", 16(%[w]);" /* Reload rd. */ \
+ : \
+ : [w] "r"(t1) \
+ : "t2", "memory"); \
+ printf("%s ::\n", instruction); \
+ printf(" output: %s=" DEST_FMT_##rd "\n", #rd, \
+ DEST_DIFF_##rd(w[0], w[1])); \
+ }
+
+#define JMP_RANGE(length, instruction, rs1_val, rs2_val, offset, rd, rs1, rs2) \
+ { \
+ unsigned long w[5 /*out*/ + 3 /*spill*/] = {0, 0, 0, 0, 0, 0, 0, 0}; \
+ /* w[0] = output rd value \
+ w[1] = address of the test instruction \
+ w[2] = flag that rd is valid \
+ w[3] = flag that rs1 is valid \
+ w[4] = flag that rs2 is valid \
+ w[5] = spill slot for rd \
+ w[6] = spill slot for rs1 \
+ w[7] = spill slot for rs2 \
+ */ \
+ register unsigned long* t1 asm("t1") = w; \
+ __asm__ __volatile__( \
+ ".if \"" #rd "\" != \"unused\";" \
+ "sd " #rd ", 40(%[w]);" /* Spill rd. */ \
+ ".endif;" \
+ ".if \"" #rs1 "\" != \"unused\";" \
+ "sd " #rs1 ", 48(%[w]);" /* Spill rs1. */ \
+ "la " #rs1 ", " rs1_val ";" /* Load the first input. */ \
+ ".endif;" \
+ ".if \"" #rs2 "\" != \"unused\";" \
+ "sd " #rs2 ", 56(%[w]);" /* Spill rs2. */ \
+ "la " #rs2 ", " rs2_val ";" /* Load the second input. */ \
+ ".endif;" \
+ "j 1f;" \
+ ".option push;" \
+ ".option norvc;" \
+ /* Generate a target area for negative offset. */ \
+ ".if " #offset " < 0;" \
+ ".if 4096 + " #offset " > 0; .space 4096 + " #offset "; .endif;" \
+ "j 2f;" \
+ ".if -" #offset " - 4 > 0; .space -" #offset " - 4; .endif;" \
+ ".else;" \
+ ".space 4096;" \
+ ".endif;" \
+ "1:;" \
+ ASMINST_##length(instruction) ";" \
+ /* Generate a target area for positive offset. */ \
+ ".if " #length " == 2; .space 2; .endif;" \
+ ".if " #offset " > 0;" \
+ ".if " #offset " - 4 > 0; .space " #offset " - 4; .endif;" \
+ "j 2f;" \
+ ".if 4094 - " #offset " > 0; .space 4094 - " #offset "; .endif;" \
+ ".else;" \
+ ".space 4094;" \
+ ".endif;" \
+ "2:;" \
+ ".option pop;" \
+ ".if \"" #rd "\" != \"unused\";" \
+ "sd " #rd ", 0(%[w]);" /* Store the output return address. */ \
+ "la t2, 1b;" \
+ "sd t2, 8(%[w]);" /* Store address of the test instr. */ \
+ "li t2, 1;" \
+ "sd t2, 16(%[w]);" /* Flag that rd is valid. */ \
+ ".endif;" \
+ ".if \"" #rs1 "\" != \"unused\";" \
+ "li t2, 1;" \
+ "sd t2, 24(%[w]);" /* Flag that rs1 is valid. */ \
+ ".endif;" \
+ ".if \"" #rs2 "\" != \"unused\";" \
+ "li t2, 1;" \
+ "sd t2, 32(%[w]);" /* Flag that rs2 is valid. */ \
+ ".endif;" \
+ ".if \"" #rd "\" != \"unused\";" \
+ "ld " #rd ", 40(%[w]);" /* Reload rd. */ \
+ ".endif;" \
+ ".if \"" #rs1 "\" != \"unused\";" \
+ "ld " #rs1 ", 48(%[w]);" /* Reload rs1. */ \
+ ".endif;" \
+ ".if \"" #rs2 "\" != \"unused\";" \
+ "ld " #rs2 ", 56(%[w]);" /* Reload rs2. */ \
+ ".endif;" \
+ : \
+ : [w] "r"(t1) \
+ : "t2", "memory"); \
+ printf("%s ::\n", instruction); \
+ if (w[3] != 0) { /* If rs1 is valid. */ \
+ printf(" inputs: %s=%s", #rs1, rs1_val); \
+ if (w[4] != 0) /* If rs2 is valid. */ \
+ printf(", %s=%s", #rs2, rs2_val); \
+ printf("\n"); \
+ } \
+ if (w[2] != 0) /* If rd is valid. */ \
+ printf(" output: %s=" DEST_FMT_##rd "\n", #rd, \
+ DEST_DIFF_##rd(w[0], w[1])); \
+ printf(" target: reached\n"); \
+ }
+
+#define TESTINST_0_0_J_RANGE(length, instruction, offset) \
+ JMP_RANGE(length, instruction, "0", "0", offset, unused, unused, unused)
+
+#define TESTINST_0_1_JR_RANGE(length, instruction, rs1_val, offset, rs1) \
+ JMP_RANGE(length, instruction, rs1_val, "0", offset, unused, rs1, unused)
+
+#define TESTINST_1_0_JAL_RANGE(length, instruction, offset, rd) \
+ JMP_RANGE(length, instruction, "0", "0", offset, rd, unused, unused)
+
+#define TESTINST_1_1_JALR_RANGE(length, instruction, rs1_val, offset, rd, rs1) \
+ JMP_RANGE(length, instruction, rs1_val, "0", offset, rd, rs1, unused)
+
+#define TESTINST_0_1_BxxZ_RANGE(length, instruction, rs1_val, offset, rs1) \
+ JMP_RANGE(length, instruction, #rs1_val, "0", offset, unused, rs1, unused)
+
+#define TESTINST_0_2_Bxx_RANGE(length, instruction, rs1_val, rs2_val, offset, \
+ rs1, rs2) \
+ JMP_RANGE(length, instruction, #rs1_val, #rs2_val, offset, unused, rs1, rs2)
+
+#define JMP_COND(length, instruction, rs1_val, rs2_val, rs1, rs2) \
+ { \
+ unsigned long w[3 /*out*/ + 2 /*spill*/] = {0, 0, 0, 0, 0}; \
+ /* w[0] = flag that the branch was taken \
+ w[1] = flag that rs1 is valid \
+ w[2] = flag that rs2 is valid \
+ w[3] = spill slot for rs1 \
+ w[4] = spill slot for rs2 \
+ */ \
+ register unsigned long* t1 asm("t1") = w; \
+ __asm__ __volatile__( \
+ "li t2, 1;" \
+ "sd t2, 0(%[w]);" /* Set result to "taken". */ \
+ ".if \"" #rs1 "\" != \"unused\";" \
+ "sd " #rs1 ", 24(%[w]);" /* Spill rs1. */ \
+ "la " #rs1 ", " rs1_val ";" /* Load the first input. */ \
+ ".endif;" \
+ ".if \"" #rs2 "\" != \"unused\";" \
+ "sd " #rs2 ", 32(%[w]);" /* Spill rs2. */ \
+ "la " #rs2 ", " rs2_val ";" /* Load the second input. */ \
+ ".endif;" \
+ ASMINST_##length(instruction) ";" \
+ "li t2, 0;" \
+ "sd t2, 0(%[w]);" /* Set result to "not taken". */ \
+ "1:;" \
+ ".if \"" #rs1 "\" != \"unused\";" \
+ "li t2, 1;" \
+ "sd t2, 8(%[w]);" /* Flag that rs1 is valid. */ \
+ ".endif;" \
+ ".if \"" #rs2 "\" != \"unused\";" \
+ "li t2, 1;" \
+ "sd t2, 16(%[w]);" /* Flag that rs2 is valid. */ \
+ ".endif;" \
+ ".if \"" #rs1 "\" != \"unused\";" \
+ "ld " #rs1 ", 24(%[w]);" /* Reload rs1. */ \
+ ".endif;" \
+ ".if \"" #rs2 "\" != \"unused\";" \
+ "ld " #rs2 ", 32(%[w]);" /* Reload rs2. */ \
+ ".endif;" \
+ : \
+ : [w] "r"(t1) \
+ : "t2", "memory"); \
+ printf("%s ::\n", instruction); \
+ if (w[1] != 0) { /* If rs1 is valid. */ \
+ printf(" inputs: %s=%s", #rs1, rs1_val); \
+ if (w[2] != 0) /* If rs2 is valid. */ \
+ printf(", %s=%s", #rs2, rs2_val); \
+ printf("\n"); \
+ } \
+ printf(" branch: %s\n", w[0] ? "taken" : "not taken"); \
+ }
+
+#define TESTINST_0_1_BxxZ_COND(length, instruction, rs1_val, rs1) \
+ JMP_COND(length, instruction, #rs1_val, "0", rs1, unused)
+
+#define TESTINST_0_2_Bxx_COND(length, instruction, rs1_val, rs2_val, rs1, rs2) \
+ JMP_COND(length, instruction, #rs1_val, #rs2_val, rs1, rs2)
+
+#define TYPED_X_X(length, instruction, rs1_val, fcsr_val, rd, rs1, dpre, spre) \
+ { \
+ unsigned long w[2 /*out*/ + 2 /*in*/ + 3 /*spill*/] = { \
+ 0, 0, (unsigned long)rs1_val, (unsigned long)fcsr_val, 0, 0, 0}; \
+ /* w[0] = output rd value \
+ w[1] = output fcsr value \
+ w[2] = input rs1 value \
+ w[3] = input fcsr value \
+ w[4] = spill slot for rd \
+ w[5] = spill slot for fcsr \
+ w[6] = spill slot for rs1 \
+ */ \
+ register unsigned long* t1 asm("t1") = w; \
+ __asm__ __volatile__( \
+ dpre "sd " #rd ", 32(%[w]);" /* Spill rd. */ \
+ "frcsr t2;" \
+ "sd t2, 40(%[w]);" /* Spill fcsr. */ \
+ spre "sd " #rs1 ", 48(%[w]);" /* Spill rs1. */ \
+ "ld t2, 24(%[w]);" \
+ "fscsr t2;" /* Load fcsr. */ \
+ spre "ld " #rs1 ", 16(%[w]);" /* Load the first input. */ \
+ ASMINST_##length(instruction) ";" \
+ dpre "sd " #rd ", 0(%[w]);" /* Save result of the operation. */ \
+ "frcsr t2;" \
+ "sd t2, 8(%[w]);" /* Save fcsr. */ \
+ "ld t2, 40(%[w]);" \
+ "fscsr t2;" /* Reload fcsr. */ \
+ dpre "ld " #rd ", 32(%[w]);" /* Reload rd. */ \
+ spre "ld " #rs1 ", 48(%[w]);" /* Reload rs1. */ \
+ : \
+ : [w] "r"(t1) \
+ : "t2", "memory"); \
+ printf("%s ::\n", instruction); \
+ printf(" inputs: %s=0x%016lx, fcsr=0x%08lx\n", #rs1, \
+ (unsigned long)rs1_val, (unsigned long)fcsr_val); \
+ printf(" output: %s=0x%016lx, fcsr=0x%08lx\n", #rd, w[0], w[1]); \
+ }
+
+#define TESTINST_1_1_F(length, instruction, rs1_val, fcsr_val, rd, rs1) \
+ TYPED_X_X(length, instruction, rs1_val, fcsr_val, rd, rs1, "f", "f")
+
+#define TESTINST_1_1_IF(length, instruction, rs1_val, fcsr_val, rd, rs1) \
+ TYPED_X_X(length, instruction, rs1_val, fcsr_val, rd, rs1, "", "f")
+
+#define TESTINST_1_1_FI(length, instruction, rs1_val, fcsr_val, rd, rs1) \
+ TYPED_X_X(length, instruction, rs1_val, fcsr_val, rd, rs1, "f", "")
+
+#define TYPED_X_FF(length, instruction, rs1_val, rs2_val, fcsr_val, rd, rs1, \
+ rs2, dpre) \
+ { \
+ unsigned long w[2 /*out*/ + 3 /*in*/ + 4 /*spill*/] = { \
+ 0, 0, (unsigned long)rs1_val, (unsigned long)rs2_val, \
+ (unsigned long)fcsr_val, 0, 0, 0, 0}; \
+ /* w[0] = output rd value \
+ w[1] = output fcsr value \
+ w[2] = input rs1 value \
+ w[3] = input rs2 value \
+ w[4] = input fcsr value \
+ w[5] = spill slot for rd \
+ w[6] = spill slot for fcsr \
+ w[7] = spill slot for rs1 \
+ w[8] = spill slot for rs2 \
+ */ \
+ register unsigned long* t1 asm("t1") = w; \
+ __asm__ __volatile__( \
+ dpre "sd " #rd ", 40(%[w]);" /* Spill rd. */ \
+ "frcsr t2;" \
+ "sd t2, 48(%[w]);" /* Spill fcsr. */ \
+ "fsd " #rs1 ", 56(%[w]);" /* Spill rs1. */ \
+ "fsd " #rs2 ", 64(%[w]);" /* Spill rs2. */ \
+ "ld t2, 32(%[w]);" \
+ "fscsr t2;" /* Load fcsr. */ \
+ "fld " #rs1 ", 16(%[w]);" /* Load the first input. */ \
+ "fld " #rs2 ", 24(%[w]);" /* Load the second input. */ \
+ ASMINST_##length(instruction) ";" \
+ dpre "sd " #rd ", 0(%[w]);" /* Save result of the operation. */ \
+ "frcsr t2;" \
+ "sd t2, 8(%[w]);" /* Save fcsr. */ \
+ "ld t2, 48(%[w]);" \
+ "fscsr t2;" /* Reload fcsr. */ \
+ dpre "ld " #rd ", 40(%[w]);" /* Reload rd. */ \
+ "fld " #rs1 ", 56(%[w]);" /* Reload rs1. */ \
+ "fld " #rs2 ", 64(%[w]);" /* Reload rs2. */ \
+ : \
+ : [w] "r"(t1) \
+ : "t2", "memory"); \
+ printf("%s ::\n", instruction); \
+ printf(" inputs: %s=0x%016lx, %s=0x%016lx, fcsr=0x%08lx\n", #rs1, \
+ (unsigned long)rs1_val, #rs2, (unsigned long)rs2_val, \
+ (unsigned long)fcsr_val); \
+ printf(" output: %s=0x%016lx, fcsr=0x%08lx\n", #rd, w[0], w[1]); \
+ }
+
+#define TESTINST_1_2_F(length, instruction, rs1_val, rs2_val, fcsr_val, rd, \
+ rs1, rs2) \
+ TYPED_X_FF(length, instruction, rs1_val, rs2_val, fcsr_val, rd, rs1, rs2, \
+ "f")
+
+#define TESTINST_1_2_FCMP(length, instruction, rs1_val, rs2_val, fcsr_val, rd, \
+ rs1, rs2) \
+ TYPED_X_FF(length, instruction, rs1_val, rs2_val, fcsr_val, rd, rs1, rs2, \
+ "")
+
+#define TESTINST_1_3_F(length, instruction, rs1_val, rs2_val, rs3_val, \
+ fcsr_val, rd, rs1, rs2, rs3) \
+ { \
+ unsigned long w[2 /*out*/ + 4 /*in*/ + 5 /*spill*/] = { \
+ 0, 0, (unsigned long)rs1_val, (unsigned long)rs2_val, \
+ (unsigned long)rs3_val, (unsigned long)fcsr_val, 0, 0, 0, 0, 0}; \
+ /* w[0] = output rd value \
+ w[1] = output fcsr value \
+ w[2] = input rs1 value \
+ w[3] = input rs2 value \
+ w[4] = input rs3 value \
+ w[5] = input fcsr value \
+ w[6] = spill slot for rd \
+ w[7] = spill slot for fcsr \
+ w[8] = spill slot for rs1 \
+ w[9] = spill slot for rs2 \
+ w[10] = spill slot for rs3 \
+ */ \
+ register unsigned long* t1 asm("t1") = w; \
+ __asm__ __volatile__( \
+ "fsd " #rd ", 48(%[w]);" /* Spill rd. */ \
+ "frcsr t2;" \
+ "sd t2, 56(%[w]);" /* Spill fcsr. */ \
+ "fsd " #rs1 ", 64(%[w]);" /* Spill rs1. */ \
+ "fsd " #rs2 ", 72(%[w]);" /* Spill rs2. */ \
+ "fsd " #rs3 ", 80(%[w]);" /* Spill rs3. */ \
+ "ld t2, 40(%[w]);" \
+ "fscsr t2;" /* Load fcsr. */ \
+ "fld " #rs1 ", 16(%[w]);" /* Load the first input. */ \
+ "fld " #rs2 ", 24(%[w]);" /* Load the second input. */ \
+ "fld " #rs3 ", 32(%[w]);" /* Load the third input. */ \
+ ASMINST_##length(instruction) ";" \
+ "fsd " #rd ", 0(%[w]);" /* Save result of the operation. */ \
+ "frcsr t2;" \
+ "sd t2, 8(%[w]);" /* Save fcsr. */ \
+ "ld t2, 56(%[w]);" \
+ "fscsr t2;" /* Reload fcsr. */ \
+ "fld " #rd ", 48(%[w]);" /* Reload rd. */ \
+ "fld " #rs1 ", 64(%[w]);" /* Reload rs1. */ \
+ "fld " #rs2 ", 72(%[w]);" /* Reload rs2. */ \
+ "fld " #rs3 ", 80(%[w]);" /* Reload rs2. */ \
+ : \
+ : [w] "r"(t1) \
+ : "t2", "memory"); \
+ printf("%s ::\n", instruction); \
+ printf(" inputs: %s=0x%016lx, %s=0x%016lx, %s=0x%016lx, " \
+ "fcsr=0x%08lx\n", #rs1, (unsigned long)rs1_val, #rs2, \
+ (unsigned long)rs2_val, #rs3, (unsigned long)rs3_val, \
+ (unsigned long)fcsr_val); \
+ printf(" output: %s=0x%016lx, fcsr=0x%08lx\n", #rd, w[0], w[1]); \
+ }
+
+#define TESTINST_1_1_CSR(length, instruction, csr_val, rs1_val, rd, csr, rs1) \
+ { \
+ unsigned long w[2 /*out*/ + 2 /*in*/ + 3 /*spill*/] = { \
+ 0, 0, (unsigned long)csr_val, (unsigned long)rs1_val, 0, 0, 0}; \
+ /* w[0] = output rd value \
+ w[1] = output csr value \
+ w[2] = input csr value \
+ w[3] = input rs1 value \
+ w[4] = spill slot for rd \
+ w[5] = spill slot for csr \
+ w[6] = spill slot for rs1 \
+ */ \
+ register unsigned long* t1 asm("t1") = w; \
+ __asm__ __volatile__( \
+ ".if \"" #rd "\" != \"unused\";" \
+ "sd " #rd ", 32(%[w]);" /* Spill rd. */ \
+ ".endif;" \
+ "csrr t2, " #csr ";" \
+ "sd t2, 40(%[w]);" /* Spill csr. */ \
+ ".if \"" #rs1 "\" != \"unused\";" \
+ "sd " #rs1 ", 48(%[w]);" /* Spill rs1. */ \
+ ".endif;" \
+ "ld t2, 16(%[w]);" \
+ "csrw " #csr ", t2;" /* Load csr. */ \
+ ".if \"" #rs1 "\" != \"unused\";" \
+ "ld " #rs1 ", 24(%[w]);" /* Load the first input. */ \
+ ".endif;" \
+ ASMINST_##length(instruction) ";" \
+ ".if \"" #rd "\" != \"unused\";" \
+ "sd " #rd ", 0(%[w]);" /* Save result of the operation. */ \
+ ".endif;" \
+ "csrr t2, " #csr ";" \
+ "sd t2, 8(%[w]);" /* Save csr. */ \
+ "ld t2, 40(%[w]);" \
+ "csrw " #csr ", t2;" /* Reload csr. */ \
+ ".if \"" #rd "\" != \"unused\";" \
+ "ld " #rd ", 32(%[w]);" /* Reload rd. */ \
+ ".endif;" \
+ ".if \"" #rs1 "\" != \"unused\";" \
+ "ld " #rs1 ", 48(%[w]);" /* Reload rs1. */ \
+ ".endif;" \
+ : \
+ : [w] "r"(t1) \
+ : "t2", "memory"); \
+ printf("%s ::\n", instruction); \
+ printf(" inputs: %s=0x%016lx, %s=0x%016lx\n", #rs1, \
+ (unsigned long)rs1_val, #csr, (unsigned long)csr_val); \
+ printf(" output: %s=0x%016lx, %s=0x%016lx\n", #rd, w[0], #csr, w[1]); \
+ }
+
+/* clang-format on */
projects / thirdparty / valgrind.git / commitdiff
