ARM: dts: aspeed: bletchley: Enable wdtrst1

Enable WDTRST1 external signal to send a reset pulse to peripherals while
BMC reset.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Link: https://lore.kernel.org/r/20221226054535.2836110-3-potin.lai.pt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>

diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts b/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts
index 791f83aaac5060a8326a570e9b0085f61bdc2642..e899de681f4752d4077b55a0cd4f8858c6e23df0 100644 (file)
--- a/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts
@@ -1064,3 +1064,14 @@
                bias-disable;
        };
 };
+
+&wdt1 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_wdtrst1_default>;
+       aspeed,reset-type = "soc";
+       aspeed,external-signal;
+       aspeed,ext-push-pull;
+       aspeed,ext-active-high;
+       aspeed,ext-pulse-duration = <256>;
+};