+++ /dev/null
-From df4f7e39e4a5fc13da2d0ccc3c9adb07799a6fe0 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Thu, 13 May 2021 06:46:15 -0500
-Subject: arm64: dts: renesas: beacon: Fix USB extal reference
-
-From: Adam Ford <aford173@gmail.com>
-
-[ Upstream commit 56bc54496f5d6bc638127bfc9df3742cbf0039e7 ]
-
-The USB extal clock reference isn't associated to a crystal, it's
-associated to a programmable clock, so remove the extal reference,
-add the usb2_clksel. Since usb_extal is referenced by the versaclock,
-reference it here so the usb2_clksel can get the proper clock speed
-of 50MHz.
-
-Signed-off-by: Adam Ford <aford173@gmail.com>
-Link: https://lore.kernel.org/r/20210513114617.30191-1-aford173@gmail.com
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
-index 289cf711307d..e3773b05c403 100644
---- a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
-+++ b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
-@@ -295,8 +295,10 @@
- status = "okay";
- };
-
--&usb_extal_clk {
-- clock-frequency = <50000000>;
-+&usb2_clksel {
-+ clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
-+ <&versaclock5 3>, <&usb3s0_clk>;
-+ status = "okay";
- };
-
- &usb3s0_clk {
---
-2.30.2
-
+++ /dev/null
-From 1327aafd2b4553266475b8fea56ca346f902e038 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Thu, 13 May 2021 06:46:16 -0500
-Subject: arm64: dts: renesas: beacon: Fix USB ref clock references
-
-From: Adam Ford <aford173@gmail.com>
-
-[ Upstream commit ebc666f39ff67a01e748c34d670ddf05a9e45220 ]
-
-The RZ/G2 boards expect there to be an external clock reference for
-USB2 EHCI controllers. For the Beacon boards, this reference clock
-is controlled by a programmable versaclock. Because the RZ/G2
-family has a special clock driver when using an external clock,
-the third clock reference in the EHCI node needs to point to this
-special clock, called usb2_clksel.
-
-Since the usb2_clksel does not keep the usb_extal clock enabled,
-the 4th clock entry for the EHCI nodes needs to reference it to
-keep the clock running and make USB functional.
-
-Signed-off-by: Adam Ford <aford173@gmail.com>
-Link: https://lore.kernel.org/r/20210513114617.30191-2-aford173@gmail.com
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
-index 597388f87127..bc4bb5dd8bae 100644
---- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
-+++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
-@@ -271,12 +271,12 @@
- &ehci0 {
- dr_mode = "otg";
- status = "okay";
-- clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
-+ clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&usb2_clksel>, <&versaclock5 3>;
- };
-
- &ehci1 {
- status = "okay";
-- clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
-+ clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&usb2_clksel>, <&versaclock5 3>;
- };
-
- &hdmi0 {
---
-2.30.2
-
arm-dts-ux500-fix-orientation-of-accelerometer.patch
arm-dts-imx6dl-riotboard-configure-phy-clock-and-set.patch
rtc-mxc_v2-add-missing-module_device_table.patch
-arm64-dts-renesas-beacon-fix-usb-extal-reference.patch
-arm64-dts-renesas-beacon-fix-usb-ref-clock-reference.patch
kbuild-sink-stdout-from-cmd-for-silent-build.patch
arm-dts-am57xx-cl-som-am57x-fix-ti-no-reset-on-init-.patch
arm-dts-am437x-gp-evm-fix-ti-no-reset-on-init-flag-f.patch