]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
accel/ivpu: Add initial Panther Lake support
authorMaciej Falkowski <maciej.falkowski@linux.intel.com>
Fri, 4 Oct 2024 16:25:04 +0000 (18:25 +0200)
committerJacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com>
Fri, 11 Oct 2024 10:52:58 +0000 (12:52 +0200)
Add support for the 5th generation of Intel NPU that
is going to be present in PTL_P (Panther Lake) CPUs.
NPU5 code reuses almost all of previous driver code.

Signed-off-by: Maciej Falkowski <maciej.falkowski@linux.intel.com>
Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241004162505.1695605-2-maciej.falkowski@linux.intel.com
Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com>
drivers/accel/ivpu/ivpu_drv.c
drivers/accel/ivpu/ivpu_drv.h
drivers/accel/ivpu/ivpu_fw.c

index dc983140128b46579fc7077525b2aadfe6063988..e7d8967c02f297da2923bd76dbfcb3c7f1ad20a1 100644 (file)
@@ -742,6 +742,7 @@ static struct pci_device_id ivpu_pci_ids[] = {
        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_MTL) },
        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_ARL) },
        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_LNL) },
+       { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PTL_P) },
        { }
 };
 MODULE_DEVICE_TABLE(pci, ivpu_pci_ids);
index 5b43f91f20155cbe1d98bd87b091e18d969a51de..f905021ac17481ccc17801f7e3ef77fbffd113c9 100644 (file)
 #define DRIVER_NAME "intel_vpu"
 #define DRIVER_DESC "Driver for Intel NPU (Neural Processing Unit)"
 
-#define PCI_DEVICE_ID_MTL   0x7d1d
-#define PCI_DEVICE_ID_ARL   0xad1d
-#define PCI_DEVICE_ID_LNL   0x643e
+#define PCI_DEVICE_ID_MTL      0x7d1d
+#define PCI_DEVICE_ID_ARL      0xad1d
+#define PCI_DEVICE_ID_LNL      0x643e
+#define PCI_DEVICE_ID_PTL_P    0xb03e
 
 #define IVPU_HW_IP_37XX 37
 #define IVPU_HW_IP_40XX 40
@@ -224,6 +225,8 @@ static inline int ivpu_hw_ip_gen(struct ivpu_device *vdev)
                return IVPU_HW_IP_37XX;
        case PCI_DEVICE_ID_LNL:
                return IVPU_HW_IP_40XX;
+       case PCI_DEVICE_ID_PTL_P:
+               return IVPU_HW_IP_50XX;
        default:
                dump_stack();
                ivpu_err(vdev, "Unknown NPU IP generation\n");
@@ -238,6 +241,7 @@ static inline int ivpu_hw_btrs_gen(struct ivpu_device *vdev)
        case PCI_DEVICE_ID_ARL:
                return IVPU_HW_BTRS_MTL;
        case PCI_DEVICE_ID_LNL:
+       case PCI_DEVICE_ID_PTL_P:
                return IVPU_HW_BTRS_LNL;
        default:
                dump_stack();
index 4d59dd19f6847873ec167d86c1697f0dff0398b8..be367465e7df4c40f5c2d3c9d5c76ed8e427dddf 100644 (file)
@@ -57,11 +57,14 @@ static struct {
        { IVPU_HW_IP_37XX, "intel/vpu/vpu_37xx_v0.0.bin" },
        { IVPU_HW_IP_40XX, "vpu_40xx.bin" },
        { IVPU_HW_IP_40XX, "intel/vpu/vpu_40xx_v0.0.bin" },
+       { IVPU_HW_IP_50XX, "vpu_50xx.bin" },
+       { IVPU_HW_IP_50XX, "intel/vpu/vpu_50xx_v0.0.bin" },
 };
 
 /* Production fw_names from the table above */
 MODULE_FIRMWARE("intel/vpu/vpu_37xx_v0.0.bin");
 MODULE_FIRMWARE("intel/vpu/vpu_40xx_v0.0.bin");
+MODULE_FIRMWARE("intel/vpu/vpu_50xx_v0.0.bin");
 
 static int ivpu_fw_request(struct ivpu_device *vdev)
 {