--- /dev/null
+From 87be3e7a2d0030cda6314d2ec96b37991f636ccd Mon Sep 17 00:00:00 2001
+From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+Date: Mon, 30 Jun 2025 14:12:04 +0200
+Subject: firmware: qcom: scm: initialize tzmem before marking SCM as available
+
+From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+
+commit 87be3e7a2d0030cda6314d2ec96b37991f636ccd upstream.
+
+Now that qcom_scm_shm_bridge_enable() uses the struct device passed to
+it as argument to make the QCOM_SCM_MP_SHM_BRIDGE_ENABLE SCM call, we
+can move the TZMem initialization before the assignment of the __scm
+pointer in the SCM driver (which marks SCM as ready to users) thus
+fixing the potential race between consumer calls and the memory pool
+initialization.
+
+Reported-by: Johan Hovold <johan+linaro@kernel.org>
+Closes: https://lore.kernel.org/all/20250120151000.13870-1-johan+linaro@kernel.org/
+Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+Link: https://lore.kernel.org/r/20250630-qcom-scm-race-v2-3-fa3851c98611@linaro.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/firmware/qcom/qcom_scm.c | 53 +++++++++++++++++++--------------------
+ 1 file changed, 26 insertions(+), 27 deletions(-)
+
+--- a/drivers/firmware/qcom/qcom_scm.c
++++ b/drivers/firmware/qcom/qcom_scm.c
+@@ -2256,7 +2256,32 @@ static int qcom_scm_probe(struct platfor
+ if (ret)
+ return ret;
+
+- /* Paired with smp_load_acquire() in qcom_scm_is_available(). */
++ ret = of_reserved_mem_device_init(scm->dev);
++ if (ret && ret != -ENODEV)
++ return dev_err_probe(scm->dev, ret,
++ "Failed to setup the reserved memory region for TZ mem\n");
++
++ ret = qcom_tzmem_enable(scm->dev);
++ if (ret)
++ return dev_err_probe(scm->dev, ret,
++ "Failed to enable the TrustZone memory allocator\n");
++
++ memset(&pool_config, 0, sizeof(pool_config));
++ pool_config.initial_size = 0;
++ pool_config.policy = QCOM_TZMEM_POLICY_ON_DEMAND;
++ pool_config.max_size = SZ_256K;
++
++ scm->mempool = devm_qcom_tzmem_pool_new(scm->dev, &pool_config);
++ if (IS_ERR(scm->mempool))
++ return dev_err_probe(scm->dev, PTR_ERR(scm->mempool),
++ "Failed to create the SCM memory pool\n");
++
++ /*
++ * Paired with smp_load_acquire() in qcom_scm_is_available().
++ *
++ * This marks the SCM API as ready to accept user calls and can only
++ * be called after the TrustZone memory pool is initialized.
++ */
+ smp_store_release(&__scm, scm);
+
+ irq = platform_get_irq_optional(pdev, 0);
+@@ -2289,32 +2314,6 @@ static int qcom_scm_probe(struct platfor
+ if (of_property_read_bool(pdev->dev.of_node, "qcom,sdi-enabled") || !download_mode)
+ qcom_scm_disable_sdi();
+
+- ret = of_reserved_mem_device_init(__scm->dev);
+- if (ret && ret != -ENODEV) {
+- dev_err_probe(__scm->dev, ret,
+- "Failed to setup the reserved memory region for TZ mem\n");
+- goto err;
+- }
+-
+- ret = qcom_tzmem_enable(__scm->dev);
+- if (ret) {
+- dev_err_probe(__scm->dev, ret,
+- "Failed to enable the TrustZone memory allocator\n");
+- goto err;
+- }
+-
+- memset(&pool_config, 0, sizeof(pool_config));
+- pool_config.initial_size = 0;
+- pool_config.policy = QCOM_TZMEM_POLICY_ON_DEMAND;
+- pool_config.max_size = SZ_256K;
+-
+- __scm->mempool = devm_qcom_tzmem_pool_new(__scm->dev, &pool_config);
+- if (IS_ERR(__scm->mempool)) {
+- ret = dev_err_probe(__scm->dev, PTR_ERR(__scm->mempool),
+- "Failed to create the SCM memory pool\n");
+- goto err;
+- }
+-
+ /*
+ * Initialize the QSEECOM interface.
+ *
--- /dev/null
+From 23972da96e1eee7f10c8ef641d56202ab9af8ba7 Mon Sep 17 00:00:00 2001
+From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+Date: Mon, 30 Jun 2025 14:12:02 +0200
+Subject: firmware: qcom: scm: remove unused arguments from SHM bridge routines
+
+From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+
+commit 23972da96e1eee7f10c8ef641d56202ab9af8ba7 upstream.
+
+qcom_scm_shm_bridge_create() and qcom_scm_shm_bridge_delete() take
+struct device as argument but don't use it. Remove it from these
+functions' prototypes.
+
+Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
+Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+Link: https://lore.kernel.org/r/20250630-qcom-scm-race-v2-1-fa3851c98611@linaro.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/firmware/qcom/qcom_scm.c | 4 ++--
+ drivers/firmware/qcom/qcom_tzmem.c | 8 ++++----
+ include/linux/firmware/qcom/qcom_scm.h | 4 ++--
+ 3 files changed, 8 insertions(+), 8 deletions(-)
+
+--- a/drivers/firmware/qcom/qcom_scm.c
++++ b/drivers/firmware/qcom/qcom_scm.c
+@@ -1631,7 +1631,7 @@ int qcom_scm_shm_bridge_enable(void)
+ }
+ EXPORT_SYMBOL_GPL(qcom_scm_shm_bridge_enable);
+
+-int qcom_scm_shm_bridge_create(struct device *dev, u64 pfn_and_ns_perm_flags,
++int qcom_scm_shm_bridge_create(u64 pfn_and_ns_perm_flags,
+ u64 ipfn_and_s_perm_flags, u64 size_and_flags,
+ u64 ns_vmids, u64 *handle)
+ {
+@@ -1659,7 +1659,7 @@ int qcom_scm_shm_bridge_create(struct de
+ }
+ EXPORT_SYMBOL_GPL(qcom_scm_shm_bridge_create);
+
+-int qcom_scm_shm_bridge_delete(struct device *dev, u64 handle)
++int qcom_scm_shm_bridge_delete(u64 handle)
+ {
+ struct qcom_scm_desc desc = {
+ .svc = QCOM_SCM_SVC_MP,
+--- a/drivers/firmware/qcom/qcom_tzmem.c
++++ b/drivers/firmware/qcom/qcom_tzmem.c
+@@ -124,9 +124,9 @@ static int qcom_tzmem_init_area(struct q
+ if (!handle)
+ return -ENOMEM;
+
+- ret = qcom_scm_shm_bridge_create(qcom_tzmem_dev, pfn_and_ns_perm,
+- ipfn_and_s_perm, size_and_flags,
+- QCOM_SCM_VMID_HLOS, handle);
++ ret = qcom_scm_shm_bridge_create(pfn_and_ns_perm, ipfn_and_s_perm,
++ size_and_flags, QCOM_SCM_VMID_HLOS,
++ handle);
+ if (ret)
+ return ret;
+
+@@ -142,7 +142,7 @@ static void qcom_tzmem_cleanup_area(stru
+ if (!qcom_tzmem_using_shm_bridge)
+ return;
+
+- qcom_scm_shm_bridge_delete(qcom_tzmem_dev, *handle);
++ qcom_scm_shm_bridge_delete(*handle);
+ kfree(handle);
+ }
+
+--- a/include/linux/firmware/qcom/qcom_scm.h
++++ b/include/linux/firmware/qcom/qcom_scm.h
+@@ -149,10 +149,10 @@ bool qcom_scm_lmh_dcvsh_available(void);
+ int qcom_scm_gpu_init_regs(u32 gpu_req);
+
+ int qcom_scm_shm_bridge_enable(void);
+-int qcom_scm_shm_bridge_create(struct device *dev, u64 pfn_and_ns_perm_flags,
++int qcom_scm_shm_bridge_create(u64 pfn_and_ns_perm_flags,
+ u64 ipfn_and_s_perm_flags, u64 size_and_flags,
+ u64 ns_vmids, u64 *handle);
+-int qcom_scm_shm_bridge_delete(struct device *dev, u64 handle);
++int qcom_scm_shm_bridge_delete(u64 handle);
+
+ #ifdef CONFIG_QCOM_QSEECOM
+
--- /dev/null
+From 7ab36b51c6bee56e1a1939063dd10d602fe49d13 Mon Sep 17 00:00:00 2001
+From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+Date: Mon, 30 Jun 2025 14:12:05 +0200
+Subject: firmware: qcom: scm: request the waitqueue irq *after* initializing SCM
+
+From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+
+commit 7ab36b51c6bee56e1a1939063dd10d602fe49d13 upstream.
+
+There's a subtle race in the SCM driver: we assign the __scm pointer
+before requesting the waitqueue interrupt. Assigning __scm marks the SCM
+API as ready to accept calls. It's possible that a user makes a call
+right after we set __scm and the firmware raises an interrupt before the
+driver's ready to service it. Move the __scm assignment after we request
+the interrupt.
+
+This has the added benefit of allowing us to drop the goto label.
+
+Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
+Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+Link: https://lore.kernel.org/r/20250630-qcom-scm-race-v2-4-fa3851c98611@linaro.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/firmware/qcom/qcom_scm.c | 36 ++++++++++++++----------------------
+ 1 file changed, 14 insertions(+), 22 deletions(-)
+
+--- a/drivers/firmware/qcom/qcom_scm.c
++++ b/drivers/firmware/qcom/qcom_scm.c
+@@ -2276,29 +2276,27 @@ static int qcom_scm_probe(struct platfor
+ return dev_err_probe(scm->dev, PTR_ERR(scm->mempool),
+ "Failed to create the SCM memory pool\n");
+
++ irq = platform_get_irq_optional(pdev, 0);
++ if (irq < 0) {
++ if (irq != -ENXIO)
++ return irq;
++ } else {
++ ret = devm_request_threaded_irq(scm->dev, irq, NULL, qcom_scm_irq_handler,
++ IRQF_ONESHOT, "qcom-scm", scm);
++ if (ret < 0)
++ return dev_err_probe(scm->dev, ret,
++ "Failed to request qcom-scm irq\n");
++ }
++
+ /*
+ * Paired with smp_load_acquire() in qcom_scm_is_available().
+ *
+ * This marks the SCM API as ready to accept user calls and can only
+- * be called after the TrustZone memory pool is initialized.
++ * be called after the TrustZone memory pool is initialized and the
++ * waitqueue interrupt requested.
+ */
+ smp_store_release(&__scm, scm);
+
+- irq = platform_get_irq_optional(pdev, 0);
+- if (irq < 0) {
+- if (irq != -ENXIO) {
+- ret = irq;
+- goto err;
+- }
+- } else {
+- ret = devm_request_threaded_irq(__scm->dev, irq, NULL, qcom_scm_irq_handler,
+- IRQF_ONESHOT, "qcom-scm", __scm);
+- if (ret < 0) {
+- dev_err_probe(scm->dev, ret, "Failed to request qcom-scm irq\n");
+- goto err;
+- }
+- }
+-
+ __get_convention();
+
+ /*
+@@ -2328,12 +2326,6 @@ static int qcom_scm_probe(struct platfor
+ WARN(ret < 0, "failed to initialize qseecom: %d\n", ret);
+
+ return 0;
+-
+-err:
+- /* Paired with smp_load_acquire() in qcom_scm_is_available(). */
+- smp_store_release(&__scm, NULL);
+-
+- return ret;
+ }
+
+ static void qcom_scm_shutdown(struct platform_device *pdev)
--- /dev/null
+From dc3f4e75c54c19bad9a70419afae00ce6baf3ebf Mon Sep 17 00:00:00 2001
+From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+Date: Mon, 30 Jun 2025 14:12:03 +0200
+Subject: firmware: qcom: scm: take struct device as argument in SHM bridge enable
+
+From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+
+commit dc3f4e75c54c19bad9a70419afae00ce6baf3ebf upstream.
+
+qcom_scm_shm_bridge_enable() is used early in the SCM initialization
+routine. It makes an SCM call and so expects the internal __scm pointer
+in the SCM driver to be assigned. For this reason the tzmem memory pool
+is allocated *after* this pointer is assigned. However, this can lead to
+a crash if another consumer of the SCM API makes a call using the memory
+pool between the assignment of the __scm pointer and the initialization
+of the tzmem memory pool.
+
+As qcom_scm_shm_bridge_enable() is a special case, not meant to be
+called by ordinary users, pull it into the local SCM header. Make it
+take struct device as argument. This is the device that will be used to
+make the SCM call as opposed to the global __scm pointer. This will
+allow us to move the tzmem initialization *before* the __scm assignment
+in the core SCM driver.
+
+Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
+Link: https://lore.kernel.org/r/20250630-qcom-scm-race-v2-2-fa3851c98611@linaro.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/firmware/qcom/qcom_scm.c | 12 +++++++++---
+ drivers/firmware/qcom/qcom_scm.h | 1 +
+ drivers/firmware/qcom/qcom_tzmem.c | 3 ++-
+ include/linux/firmware/qcom/qcom_scm.h | 1 -
+ 4 files changed, 12 insertions(+), 5 deletions(-)
+
+--- a/drivers/firmware/qcom/qcom_scm.c
++++ b/drivers/firmware/qcom/qcom_scm.c
+@@ -1603,7 +1603,13 @@ bool qcom_scm_lmh_dcvsh_available(void)
+ }
+ EXPORT_SYMBOL_GPL(qcom_scm_lmh_dcvsh_available);
+
+-int qcom_scm_shm_bridge_enable(void)
++/*
++ * This is only supposed to be called once by the TZMem module. It takes the
++ * SCM struct device as argument and uses it to pass the call as at the time
++ * the SHM Bridge is enabled, the SCM is not yet fully set up and doesn't
++ * accept global user calls. Don't try to use the __scm pointer here.
++ */
++int qcom_scm_shm_bridge_enable(struct device *scm_dev)
+ {
+ int ret;
+
+@@ -1615,11 +1621,11 @@ int qcom_scm_shm_bridge_enable(void)
+
+ struct qcom_scm_res res;
+
+- if (!__qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_MP,
++ if (!__qcom_scm_is_call_available(scm_dev, QCOM_SCM_SVC_MP,
+ QCOM_SCM_MP_SHM_BRIDGE_ENABLE))
+ return -EOPNOTSUPP;
+
+- ret = qcom_scm_call(__scm->dev, &desc, &res);
++ ret = qcom_scm_call(scm_dev, &desc, &res);
+
+ if (ret)
+ return ret;
+--- a/drivers/firmware/qcom/qcom_scm.h
++++ b/drivers/firmware/qcom/qcom_scm.h
+@@ -83,6 +83,7 @@ int scm_legacy_call(struct device *dev,
+ struct qcom_scm_res *res);
+
+ struct qcom_tzmem_pool *qcom_scm_get_tzmem_pool(void);
++int qcom_scm_shm_bridge_enable(struct device *scm_dev);
+
+ #define QCOM_SCM_SVC_BOOT 0x01
+ #define QCOM_SCM_BOOT_SET_ADDR 0x01
+--- a/drivers/firmware/qcom/qcom_tzmem.c
++++ b/drivers/firmware/qcom/qcom_tzmem.c
+@@ -20,6 +20,7 @@
+ #include <linux/spinlock.h>
+ #include <linux/types.h>
+
++#include "qcom_scm.h"
+ #include "qcom_tzmem.h"
+
+ struct qcom_tzmem_area {
+@@ -94,7 +95,7 @@ static int qcom_tzmem_init(void)
+ goto notsupp;
+ }
+
+- ret = qcom_scm_shm_bridge_enable();
++ ret = qcom_scm_shm_bridge_enable(qcom_tzmem_dev);
+ if (ret == -EOPNOTSUPP)
+ goto notsupp;
+
+--- a/include/linux/firmware/qcom/qcom_scm.h
++++ b/include/linux/firmware/qcom/qcom_scm.h
+@@ -148,7 +148,6 @@ bool qcom_scm_lmh_dcvsh_available(void);
+
+ int qcom_scm_gpu_init_regs(u32 gpu_req);
+
+-int qcom_scm_shm_bridge_enable(void);
+ int qcom_scm_shm_bridge_create(u64 pfn_and_ns_perm_flags,
+ u64 ipfn_and_s_perm_flags, u64 size_and_flags,
+ u64 ns_vmids, u64 *handle);
--- /dev/null
+From imre.deak@intel.com Tue Sep 2 13:50:59 2025
+From: Imre Deak <imre.deak@intel.com>
+Date: Thu, 28 Aug 2025 20:49:29 +0300
+Subject: Revert "drm/dp: Change AUX DPCD probe address from DPCD_REV to LANE0_1_STATUS"
+To: <stable@vger.kernel.org>
+Cc: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org>, Sasha Levin <sashal@kernel.org>
+
+From: Imre Deak <imre.deak@intel.com>
+
+This reverts commit 944e732be9c3a33e64e9fb0f5451a37fc252ddfc which is
+commit a40c5d727b8111b5db424a1e43e14a1dcce1e77f upstream.
+
+The upstream commit a40c5d727b8111b5db424a1e43e14a1dcce1e77f ("drm/dp:
+Change AUX DPCD probe address from DPCD_REV to LANE0_1_STATUS") the
+reverted commit backported causes a regression, on one eDP panel at
+least resulting in display flickering, described in detail at the Link:
+below. The issue fixed by the upstream commit will need a different
+solution, revert the backport for now.
+
+Cc: intel-gfx@lists.freedesktop.org
+Cc: dri-devel@lists.freedesktop.org
+Cc: Sasha Levin <sashal@kernel.org>
+Link: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14558
+Signed-off-by: Imre Deak <imre.deak@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/display/drm_dp_helper.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/display/drm_dp_helper.c
++++ b/drivers/gpu/drm/display/drm_dp_helper.c
+@@ -725,7 +725,7 @@ ssize_t drm_dp_dpcd_read(struct drm_dp_a
+ * monitor doesn't power down exactly after the throw away read.
+ */
+ if (!aux->is_remote) {
+- ret = drm_dp_dpcd_probe(aux, DP_LANE0_1_STATUS);
++ ret = drm_dp_dpcd_probe(aux, DP_DPCD_REV);
+ if (ret < 0)
+ return ret;
+ }
drm-amdgpu-gfx11-set-mqd-as-appriopriate-for-queue-types.patch
drm-amdgpu-gfx12-set-mqd-as-appriopriate-for-queue-types.patch
net-rose-fix-a-typo-in-rose_clear_routes.patch
+firmware-qcom-scm-remove-unused-arguments-from-shm-bridge-routines.patch
+firmware-qcom-scm-take-struct-device-as-argument-in-shm-bridge-enable.patch
+firmware-qcom-scm-initialize-tzmem-before-marking-scm-as-available.patch
+firmware-qcom-scm-request-the-waitqueue-irq-after-initializing-scm.patch
+revert-drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch
+thermal-drivers-mediatek-lvts_thermal-change-lvts-commands-array-to-static-const.patch
+thermal-drivers-mediatek-lvts_thermal-add-lvts-commands-and-their-sizes-to-driver-data.patch
+thermal-drivers-mediatek-lvts_thermal-add-mt7988-lvts-commands.patch
--- /dev/null
+From 6203a5e6fd090ed05f6d9b92e33bc7e7679a3dd6 Mon Sep 17 00:00:00 2001
+From: Mason Chang <mason-cw.chang@mediatek.com>
+Date: Mon, 26 May 2025 18:26:58 +0800
+Subject: thermal/drivers/mediatek/lvts_thermal: Add lvts commands and their sizes to driver data
+
+From: Mason Chang <mason-cw.chang@mediatek.com>
+
+commit 6203a5e6fd090ed05f6d9b92e33bc7e7679a3dd6 upstream.
+
+Add LVTS commands and their sizes to driver data in preparation for
+adding different commands.
+
+Signed-off-by: Mason Chang <mason-cw.chang@mediatek.com>
+Link: https://lore.kernel.org/r/20250526102659.30225-3-mason-cw.chang@mediatek.com
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/thermal/mediatek/lvts_thermal.c | 65 +++++++++++++++++++++++++-------
+ 1 file changed, 52 insertions(+), 13 deletions(-)
+
+--- a/drivers/thermal/mediatek/lvts_thermal.c
++++ b/drivers/thermal/mediatek/lvts_thermal.c
+@@ -96,17 +96,6 @@
+
+ #define LVTS_MINIMUM_THRESHOLD 20000
+
+-static const u32 default_conn_cmds[] = { 0xC103FFFF, 0xC502FF55 };
+-/*
+- * Write device mask: 0xC1030000
+- */
+-static const u32 default_init_cmds[] = {
+- 0xC1030E01, 0xC1030CFC, 0xC1030A8C, 0xC103098D, 0xC10308F1,
+- 0xC10307A6, 0xC10306B8, 0xC1030500, 0xC1030420, 0xC1030300,
+- 0xC1030030, 0xC10300F6, 0xC1030050, 0xC1030060, 0xC10300AC,
+- 0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
+-};
+-
+ static int golden_temp = LVTS_GOLDEN_TEMP_DEFAULT;
+ static int golden_temp_offset;
+
+@@ -136,7 +125,11 @@ struct lvts_ctrl_data {
+
+ struct lvts_data {
+ const struct lvts_ctrl_data *lvts_ctrl;
++ const u32 *conn_cmd;
++ const u32 *init_cmd;
+ int num_lvts_ctrl;
++ int num_conn_cmd;
++ int num_init_cmd;
+ int temp_factor;
+ int temp_offset;
+ int gt_calib_bit_offset;
+@@ -996,9 +989,10 @@ static int lvts_ctrl_set_enable(struct l
+
+ static int lvts_ctrl_connect(struct device *dev, struct lvts_ctrl *lvts_ctrl)
+ {
++ const struct lvts_data *lvts_data = lvts_ctrl->lvts_data;
+ u32 id;
+
+- lvts_write_config(lvts_ctrl, default_conn_cmds, ARRAY_SIZE(default_conn_cmds));
++ lvts_write_config(lvts_ctrl, lvts_data->conn_cmd, lvts_data->num_conn_cmd);
+
+ /*
+ * LVTS_ID : Get ID and status of the thermal controller
+@@ -1017,7 +1011,9 @@ static int lvts_ctrl_connect(struct devi
+
+ static int lvts_ctrl_initialize(struct device *dev, struct lvts_ctrl *lvts_ctrl)
+ {
+- lvts_write_config(lvts_ctrl, default_init_cmds, ARRAY_SIZE(default_init_cmds));
++ const struct lvts_data *lvts_data = lvts_ctrl->lvts_data;
++
++ lvts_write_config(lvts_ctrl, lvts_data->init_cmd, lvts_data->num_init_cmd);
+
+ return 0;
+ }
+@@ -1446,6 +1442,17 @@ static int lvts_resume(struct device *de
+ return 0;
+ }
+
++static const u32 default_conn_cmds[] = { 0xC103FFFF, 0xC502FF55 };
++/*
++ * Write device mask: 0xC1030000
++ */
++static const u32 default_init_cmds[] = {
++ 0xC1030E01, 0xC1030CFC, 0xC1030A8C, 0xC103098D, 0xC10308F1,
++ 0xC10307A6, 0xC10306B8, 0xC1030500, 0xC1030420, 0xC1030300,
++ 0xC1030030, 0xC10300F6, 0xC1030050, 0xC1030060, 0xC10300AC,
++ 0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
++};
++
+ /*
+ * The MT8186 calibration data is stored as packed 3-byte little-endian
+ * values using a weird layout that makes sense only when viewed as a 32-bit
+@@ -1740,7 +1747,11 @@ static const struct lvts_ctrl_data mt819
+
+ static const struct lvts_data mt7988_lvts_ap_data = {
+ .lvts_ctrl = mt7988_lvts_ap_data_ctrl,
++ .conn_cmd = default_conn_cmds,
++ .init_cmd = default_init_cmds,
+ .num_lvts_ctrl = ARRAY_SIZE(mt7988_lvts_ap_data_ctrl),
++ .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
++ .num_init_cmd = ARRAY_SIZE(default_init_cmds),
+ .temp_factor = LVTS_COEFF_A_MT7988,
+ .temp_offset = LVTS_COEFF_B_MT7988,
+ .gt_calib_bit_offset = 24,
+@@ -1748,7 +1759,11 @@ static const struct lvts_data mt7988_lvt
+
+ static const struct lvts_data mt8186_lvts_data = {
+ .lvts_ctrl = mt8186_lvts_data_ctrl,
++ .conn_cmd = default_conn_cmds,
++ .init_cmd = default_init_cmds,
+ .num_lvts_ctrl = ARRAY_SIZE(mt8186_lvts_data_ctrl),
++ .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
++ .num_init_cmd = ARRAY_SIZE(default_init_cmds),
+ .temp_factor = LVTS_COEFF_A_MT7988,
+ .temp_offset = LVTS_COEFF_B_MT7988,
+ .gt_calib_bit_offset = 24,
+@@ -1757,7 +1772,11 @@ static const struct lvts_data mt8186_lvt
+
+ static const struct lvts_data mt8188_lvts_mcu_data = {
+ .lvts_ctrl = mt8188_lvts_mcu_data_ctrl,
++ .conn_cmd = default_conn_cmds,
++ .init_cmd = default_init_cmds,
+ .num_lvts_ctrl = ARRAY_SIZE(mt8188_lvts_mcu_data_ctrl),
++ .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
++ .num_init_cmd = ARRAY_SIZE(default_init_cmds),
+ .temp_factor = LVTS_COEFF_A_MT8195,
+ .temp_offset = LVTS_COEFF_B_MT8195,
+ .gt_calib_bit_offset = 20,
+@@ -1766,7 +1785,11 @@ static const struct lvts_data mt8188_lvt
+
+ static const struct lvts_data mt8188_lvts_ap_data = {
+ .lvts_ctrl = mt8188_lvts_ap_data_ctrl,
++ .conn_cmd = default_conn_cmds,
++ .init_cmd = default_init_cmds,
+ .num_lvts_ctrl = ARRAY_SIZE(mt8188_lvts_ap_data_ctrl),
++ .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
++ .num_init_cmd = ARRAY_SIZE(default_init_cmds),
+ .temp_factor = LVTS_COEFF_A_MT8195,
+ .temp_offset = LVTS_COEFF_B_MT8195,
+ .gt_calib_bit_offset = 20,
+@@ -1775,7 +1798,11 @@ static const struct lvts_data mt8188_lvt
+
+ static const struct lvts_data mt8192_lvts_mcu_data = {
+ .lvts_ctrl = mt8192_lvts_mcu_data_ctrl,
++ .conn_cmd = default_conn_cmds,
++ .init_cmd = default_init_cmds,
+ .num_lvts_ctrl = ARRAY_SIZE(mt8192_lvts_mcu_data_ctrl),
++ .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
++ .num_init_cmd = ARRAY_SIZE(default_init_cmds),
+ .temp_factor = LVTS_COEFF_A_MT8195,
+ .temp_offset = LVTS_COEFF_B_MT8195,
+ .gt_calib_bit_offset = 24,
+@@ -1784,7 +1811,11 @@ static const struct lvts_data mt8192_lvt
+
+ static const struct lvts_data mt8192_lvts_ap_data = {
+ .lvts_ctrl = mt8192_lvts_ap_data_ctrl,
++ .conn_cmd = default_conn_cmds,
++ .init_cmd = default_init_cmds,
+ .num_lvts_ctrl = ARRAY_SIZE(mt8192_lvts_ap_data_ctrl),
++ .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
++ .num_init_cmd = ARRAY_SIZE(default_init_cmds),
+ .temp_factor = LVTS_COEFF_A_MT8195,
+ .temp_offset = LVTS_COEFF_B_MT8195,
+ .gt_calib_bit_offset = 24,
+@@ -1793,7 +1824,11 @@ static const struct lvts_data mt8192_lvt
+
+ static const struct lvts_data mt8195_lvts_mcu_data = {
+ .lvts_ctrl = mt8195_lvts_mcu_data_ctrl,
++ .conn_cmd = default_conn_cmds,
++ .init_cmd = default_init_cmds,
+ .num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_mcu_data_ctrl),
++ .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
++ .num_init_cmd = ARRAY_SIZE(default_init_cmds),
+ .temp_factor = LVTS_COEFF_A_MT8195,
+ .temp_offset = LVTS_COEFF_B_MT8195,
+ .gt_calib_bit_offset = 24,
+@@ -1802,7 +1837,11 @@ static const struct lvts_data mt8195_lvt
+
+ static const struct lvts_data mt8195_lvts_ap_data = {
+ .lvts_ctrl = mt8195_lvts_ap_data_ctrl,
++ .conn_cmd = default_conn_cmds,
++ .init_cmd = default_init_cmds,
+ .num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_ap_data_ctrl),
++ .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
++ .num_init_cmd = ARRAY_SIZE(default_init_cmds),
+ .temp_factor = LVTS_COEFF_A_MT8195,
+ .temp_offset = LVTS_COEFF_B_MT8195,
+ .gt_calib_bit_offset = 24,
--- /dev/null
+From 685a755089f95b7e205c0202567d9a647f9de096 Mon Sep 17 00:00:00 2001
+From: Mason Chang <mason-cw.chang@mediatek.com>
+Date: Mon, 26 May 2025 18:26:59 +0800
+Subject: thermal/drivers/mediatek/lvts_thermal: Add mt7988 lvts commands
+
+From: Mason Chang <mason-cw.chang@mediatek.com>
+
+commit 685a755089f95b7e205c0202567d9a647f9de096 upstream.
+
+These commands are necessary to avoid severely abnormal and inaccurate
+temperature readings that are caused by using the default commands.
+
+Signed-off-by: Mason Chang <mason-cw.chang@mediatek.com>
+Link: https://lore.kernel.org/r/20250526102659.30225-4-mason-cw.chang@mediatek.com
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/thermal/mediatek/lvts_thermal.c | 16 ++++++++++++----
+ 1 file changed, 12 insertions(+), 4 deletions(-)
+
+--- a/drivers/thermal/mediatek/lvts_thermal.c
++++ b/drivers/thermal/mediatek/lvts_thermal.c
+@@ -1443,6 +1443,8 @@ static int lvts_resume(struct device *de
+ }
+
+ static const u32 default_conn_cmds[] = { 0xC103FFFF, 0xC502FF55 };
++static const u32 mt7988_conn_cmds[] = { 0xC103FFFF, 0xC502FC55 };
++
+ /*
+ * Write device mask: 0xC1030000
+ */
+@@ -1453,6 +1455,12 @@ static const u32 default_init_cmds[] = {
+ 0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
+ };
+
++static const u32 mt7988_init_cmds[] = {
++ 0xC1030300, 0xC1030420, 0xC1030500, 0xC10307A6, 0xC1030CFC,
++ 0xC1030A8C, 0xC103098D, 0xC10308F1, 0xC1030B04, 0xC1030E01,
++ 0xC10306B8
++};
++
+ /*
+ * The MT8186 calibration data is stored as packed 3-byte little-endian
+ * values using a weird layout that makes sense only when viewed as a 32-bit
+@@ -1747,11 +1755,11 @@ static const struct lvts_ctrl_data mt819
+
+ static const struct lvts_data mt7988_lvts_ap_data = {
+ .lvts_ctrl = mt7988_lvts_ap_data_ctrl,
+- .conn_cmd = default_conn_cmds,
+- .init_cmd = default_init_cmds,
++ .conn_cmd = mt7988_conn_cmds,
++ .init_cmd = mt7988_init_cmds,
+ .num_lvts_ctrl = ARRAY_SIZE(mt7988_lvts_ap_data_ctrl),
+- .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
+- .num_init_cmd = ARRAY_SIZE(default_init_cmds),
++ .num_conn_cmd = ARRAY_SIZE(mt7988_conn_cmds),
++ .num_init_cmd = ARRAY_SIZE(mt7988_init_cmds),
+ .temp_factor = LVTS_COEFF_A_MT7988,
+ .temp_offset = LVTS_COEFF_B_MT7988,
+ .gt_calib_bit_offset = 24,
--- /dev/null
+From c5d5a72c01f7faabe7cc0fd63942c18372101daf Mon Sep 17 00:00:00 2001
+From: Mason Chang <mason-cw.chang@mediatek.com>
+Date: Mon, 26 May 2025 18:26:57 +0800
+Subject: thermal/drivers/mediatek/lvts_thermal: Change lvts commands array to static const
+
+From: Mason Chang <mason-cw.chang@mediatek.com>
+
+commit c5d5a72c01f7faabe7cc0fd63942c18372101daf upstream.
+
+Change the LVTS commands array to static const in preparation for
+adding different commands.
+
+Signed-off-by: Mason Chang <mason-cw.chang@mediatek.com>
+Link: https://lore.kernel.org/r/20250526102659.30225-2-mason-cw.chang@mediatek.com
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/thermal/mediatek/lvts_thermal.c | 29 +++++++++++++++--------------
+ 1 file changed, 15 insertions(+), 14 deletions(-)
+
+--- a/drivers/thermal/mediatek/lvts_thermal.c
++++ b/drivers/thermal/mediatek/lvts_thermal.c
+@@ -96,6 +96,17 @@
+
+ #define LVTS_MINIMUM_THRESHOLD 20000
+
++static const u32 default_conn_cmds[] = { 0xC103FFFF, 0xC502FF55 };
++/*
++ * Write device mask: 0xC1030000
++ */
++static const u32 default_init_cmds[] = {
++ 0xC1030E01, 0xC1030CFC, 0xC1030A8C, 0xC103098D, 0xC10308F1,
++ 0xC10307A6, 0xC10306B8, 0xC1030500, 0xC1030420, 0xC1030300,
++ 0xC1030030, 0xC10300F6, 0xC1030050, 0xC1030060, 0xC10300AC,
++ 0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
++};
++
+ static int golden_temp = LVTS_GOLDEN_TEMP_DEFAULT;
+ static int golden_temp_offset;
+
+@@ -902,7 +913,7 @@ static void lvts_ctrl_monitor_enable(str
+ * each write in the configuration register must be separated by a
+ * delay of 2 us.
+ */
+-static void lvts_write_config(struct lvts_ctrl *lvts_ctrl, u32 *cmds, int nr_cmds)
++static void lvts_write_config(struct lvts_ctrl *lvts_ctrl, const u32 *cmds, int nr_cmds)
+ {
+ int i;
+
+@@ -985,9 +996,9 @@ static int lvts_ctrl_set_enable(struct l
+
+ static int lvts_ctrl_connect(struct device *dev, struct lvts_ctrl *lvts_ctrl)
+ {
+- u32 id, cmds[] = { 0xC103FFFF, 0xC502FF55 };
++ u32 id;
+
+- lvts_write_config(lvts_ctrl, cmds, ARRAY_SIZE(cmds));
++ lvts_write_config(lvts_ctrl, default_conn_cmds, ARRAY_SIZE(default_conn_cmds));
+
+ /*
+ * LVTS_ID : Get ID and status of the thermal controller
+@@ -1006,17 +1017,7 @@ static int lvts_ctrl_connect(struct devi
+
+ static int lvts_ctrl_initialize(struct device *dev, struct lvts_ctrl *lvts_ctrl)
+ {
+- /*
+- * Write device mask: 0xC1030000
+- */
+- u32 cmds[] = {
+- 0xC1030E01, 0xC1030CFC, 0xC1030A8C, 0xC103098D, 0xC10308F1,
+- 0xC10307A6, 0xC10306B8, 0xC1030500, 0xC1030420, 0xC1030300,
+- 0xC1030030, 0xC10300F6, 0xC1030050, 0xC1030060, 0xC10300AC,
+- 0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
+- };
+-
+- lvts_write_config(lvts_ctrl, cmds, ARRAY_SIZE(cmds));
++ lvts_write_config(lvts_ctrl, default_init_cmds, ARRAY_SIZE(default_init_cmds));
+
+ return 0;
+ }
projects / thirdparty / kernel / stable-queue.git / commitdiff
