+++ /dev/null
-From 95eef14cdad150fed43147bcd4f29eea3d0a3f03 Mon Sep 17 00:00:00 2001
-From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
-Date: Mon, 10 Jun 2019 11:19:14 +0300
-Subject: drm/i915/perf: fix ICL perf register offsets
-
-From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
-
-commit 95eef14cdad150fed43147bcd4f29eea3d0a3f03 upstream.
-
-We got the wrong offsets (could they have changed?). New values were
-computed off an error state by looking up the register offset in the
-context image as written by the HW.
-
-Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
-Fixes: 1de401c08fa805 ("drm/i915/perf: enable perf support on ICL")
-Cc: <stable@vger.kernel.org> # v4.18+
-Acked-by: Kenneth Graunke <kenneth@whitecape.org>
-Link: https://patchwork.freedesktop.org/patch/msgid/20190610081914.25428-1-lionel.g.landwerlin@intel.com
-(cherry picked from commit 8dcfdfb4501012a8d36d2157dc73925715f2befb)
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
----
- drivers/gpu/drm/i915/i915_perf.c | 10 +++++++---
- 1 file changed, 7 insertions(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_perf.c
-+++ b/drivers/gpu/drm/i915/i915_perf.c
-@@ -3552,9 +3552,13 @@ void i915_perf_init(struct drm_i915_priv
- dev_priv->perf.oa.ops.enable_metric_set = gen8_enable_metric_set;
- dev_priv->perf.oa.ops.disable_metric_set = gen10_disable_metric_set;
-
-- dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128;
-- dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de;
--
-+ if (IS_GEN(dev_priv, 10)) {
-+ dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128;
-+ dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de;
-+ } else {
-+ dev_priv->perf.oa.ctx_oactxctrl_offset = 0x124;
-+ dev_priv->perf.oa.ctx_flexeu0_offset = 0x78e;
-+ }
- dev_priv->perf.oa.gen8_valid_ctx_bit = (1<<16);
- }
- }