]> git.ipfire.org Git - thirdparty/qemu.git/commitdiff
m68k: correct typos
authorManos Pitsidianakis <manos.pitsidianakis@linaro.org>
Tue, 20 Feb 2024 08:52:26 +0000 (10:52 +0200)
committerMichael Tokarev <mjt@tls.msk.ru>
Wed, 21 Feb 2024 05:16:58 +0000 (08:16 +0300)
Correct typos automatically found with the `typos` tool
<https://crates.io/crates/typos>

Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
(mjt: trivial fixup "covers" suggested by Thomas)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
target/m68k/cpu.h

index aca4aa610b2905dd45d9b999a66362e4c2398d24..646cacbdf164245228a26d3449ef6169d0e30af6 100644 (file)
@@ -478,10 +478,11 @@ void do_m68k_semihosting(CPUM68KState *env, int nr);
  * The 68000 family is defined in six main CPU classes, the 680[012346]0.
  * Generally each successive CPU adds enhanced data/stack/instructions.
  * However, some features are only common to one, or a few classes.
- * The features covers those subsets of instructons.
+ * The features cover those subsets of instructions.
  *
- * CPU32/32+ are basically 680010 compatible with some 68020 class instructons,
- * and some additional CPU32 instructions. Mostly Supervisor state differences.
+ * CPU32/32+ are basically 680010 compatible with some 68020 class
+ * instructions, and some additional CPU32 instructions. Mostly Supervisor
+ * state differences.
  *
  * The ColdFire core ISA is a RISC-style reduction of the 68000 series cpu.
  * There are 4 ColdFire core ISA revisions: A, A+, B and C.