--- /dev/null
+From 4aea7a5c5e940c1723add439f4088844cd26196d Mon Sep 17 00:00:00 2001
+From: Benjamin Poirier <bpoirier@suse.com>
+Date: Fri, 21 Jul 2017 11:36:27 -0700
+Subject: e1000e: Avoid receiver overrun interrupt bursts
+
+From: Benjamin Poirier <bpoirier@suse.com>
+
+commit 4aea7a5c5e940c1723add439f4088844cd26196d upstream.
+
+When e1000e_poll() is not fast enough to keep up with incoming traffic, the
+adapter (when operating in msix mode) raises the Other interrupt to signal
+Receiver Overrun.
+
+This is a double problem because 1) at the moment e1000_msix_other()
+assumes that it is only called in case of Link Status Change and 2) if the
+condition persists, the interrupt is repeatedly raised again in quick
+succession.
+
+Ideally we would configure the Other interrupt to not be raised in case of
+receiver overrun but this doesn't seem possible on this adapter. Instead,
+we handle the first part of the problem by reverting to the practice of
+reading ICR in the other interrupt handler, like before commit 16ecba59bc33
+("e1000e: Do not read ICR in Other interrupt"). Thanks to commit
+0a8047ac68e5 ("e1000e: Fix msi-x interrupt automask") which cleared IAME
+from CTRL_EXT, reading ICR doesn't interfere with RxQ0, TxQ0 interrupts
+anymore. We handle the second part of the problem by not re-enabling the
+Other interrupt right away when there is overrun. Instead, we wait until
+traffic subsides, napi polling mode is exited and interrupts are
+re-enabled.
+
+Reported-by: Lennart Sorensen <lsorense@csclub.uwaterloo.ca>
+Fixes: 16ecba59bc33 ("e1000e: Do not read ICR in Other interrupt")
+Signed-off-by: Benjamin Poirier <bpoirier@suse.com>
+Tested-by: Aaron Brown <aaron.f.brown@intel.com>
+Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
+Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/ethernet/intel/e1000e/defines.h | 1
+ drivers/net/ethernet/intel/e1000e/netdev.c | 31 +++++++++++++++++++++-------
+ 2 files changed, 25 insertions(+), 7 deletions(-)
+
+--- a/drivers/net/ethernet/intel/e1000e/defines.h
++++ b/drivers/net/ethernet/intel/e1000e/defines.h
+@@ -398,6 +398,7 @@
+ #define E1000_ICR_LSC 0x00000004 /* Link Status Change */
+ #define E1000_ICR_RXSEQ 0x00000008 /* Rx sequence error */
+ #define E1000_ICR_RXDMT0 0x00000010 /* Rx desc min. threshold (0) */
++#define E1000_ICR_RXO 0x00000040 /* Receiver Overrun */
+ #define E1000_ICR_RXT0 0x00000080 /* Rx timer intr (ring 0) */
+ #define E1000_ICR_ECCER 0x00400000 /* Uncorrectable ECC Error */
+ /* If this bit asserted, the driver should claim the interrupt */
+--- a/drivers/net/ethernet/intel/e1000e/netdev.c
++++ b/drivers/net/ethernet/intel/e1000e/netdev.c
+@@ -1905,14 +1905,30 @@ static irqreturn_t e1000_msix_other(int
+ struct net_device *netdev = data;
+ struct e1000_adapter *adapter = netdev_priv(netdev);
+ struct e1000_hw *hw = &adapter->hw;
++ u32 icr;
++ bool enable = true;
+
+- hw->mac.get_link_status = true;
++ icr = er32(ICR);
++ if (icr & E1000_ICR_RXO) {
++ ew32(ICR, E1000_ICR_RXO);
++ enable = false;
++ /* napi poll will re-enable Other, make sure it runs */
++ if (napi_schedule_prep(&adapter->napi)) {
++ adapter->total_rx_bytes = 0;
++ adapter->total_rx_packets = 0;
++ __napi_schedule(&adapter->napi);
++ }
++ }
++ if (icr & E1000_ICR_LSC) {
++ ew32(ICR, E1000_ICR_LSC);
++ hw->mac.get_link_status = true;
++ /* guard against interrupt when we're going down */
++ if (!test_bit(__E1000_DOWN, &adapter->state))
++ mod_timer(&adapter->watchdog_timer, jiffies + 1);
++ }
+
+- /* guard against interrupt when we're going down */
+- if (!test_bit(__E1000_DOWN, &adapter->state)) {
+- mod_timer(&adapter->watchdog_timer, jiffies + 1);
++ if (enable && !test_bit(__E1000_DOWN, &adapter->state))
+ ew32(IMS, E1000_IMS_OTHER);
+- }
+
+ return IRQ_HANDLED;
+ }
+@@ -2683,7 +2699,8 @@ static int e1000e_poll(struct napi_struc
+ napi_complete_done(napi, work_done);
+ if (!test_bit(__E1000_DOWN, &adapter->state)) {
+ if (adapter->msix_entries)
+- ew32(IMS, adapter->rx_ring->ims_val);
++ ew32(IMS, adapter->rx_ring->ims_val |
++ E1000_IMS_OTHER);
+ else
+ e1000_irq_enable(adapter);
+ }
+@@ -4178,7 +4195,7 @@ static void e1000e_trigger_lsc(struct e1
+ struct e1000_hw *hw = &adapter->hw;
+
+ if (adapter->msix_entries)
+- ew32(ICS, E1000_ICS_OTHER);
++ ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER);
+ else
+ ew32(ICS, E1000_ICS_LSC);
+ }
--- /dev/null
+From c4c40e51f9c32c6dd8adf606624c930a1c4d9bbb Mon Sep 17 00:00:00 2001
+From: Benjamin Poirier <bpoirier@suse.com>
+Date: Fri, 21 Jul 2017 11:36:23 -0700
+Subject: e1000e: Fix error path in link detection
+
+From: Benjamin Poirier <bpoirier@suse.com>
+
+commit c4c40e51f9c32c6dd8adf606624c930a1c4d9bbb upstream.
+
+In case of error from e1e_rphy(), the loop will exit early and "success"
+will be set to true erroneously.
+
+Signed-off-by: Benjamin Poirier <bpoirier@suse.com>
+Tested-by: Aaron Brown <aaron.f.brown@intel.com>
+Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
+Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/ethernet/intel/e1000e/phy.c | 7 ++++---
+ 1 file changed, 4 insertions(+), 3 deletions(-)
+
+--- a/drivers/net/ethernet/intel/e1000e/phy.c
++++ b/drivers/net/ethernet/intel/e1000e/phy.c
+@@ -1744,6 +1744,7 @@ s32 e1000e_phy_has_link_generic(struct e
+ s32 ret_val = 0;
+ u16 i, phy_status;
+
++ *success = false;
+ for (i = 0; i < iterations; i++) {
+ /* Some PHYs require the MII_BMSR register to be read
+ * twice due to the link bit being sticky. No harm doing
+@@ -1763,16 +1764,16 @@ s32 e1000e_phy_has_link_generic(struct e
+ ret_val = e1e_rphy(hw, MII_BMSR, &phy_status);
+ if (ret_val)
+ break;
+- if (phy_status & BMSR_LSTATUS)
++ if (phy_status & BMSR_LSTATUS) {
++ *success = true;
+ break;
++ }
+ if (usec_interval >= 1000)
+ msleep(usec_interval / 1000);
+ else
+ udelay(usec_interval);
+ }
+
+- *success = (i < iterations);
+-
+ return ret_val;
+ }
+
--- /dev/null
+From d3509f8bc7b0560044c15f0e3ecfde1d9af757a6 Mon Sep 17 00:00:00 2001
+From: Benjamin Poirier <bpoirier@suse.com>
+Date: Fri, 21 Jul 2017 11:36:25 -0700
+Subject: e1000e: Fix return value test
+
+From: Benjamin Poirier <bpoirier@suse.com>
+
+commit d3509f8bc7b0560044c15f0e3ecfde1d9af757a6 upstream.
+
+All the helpers return -E1000_ERR_PHY.
+
+Signed-off-by: Benjamin Poirier <bpoirier@suse.com>
+Tested-by: Aaron Brown <aaron.f.brown@intel.com>
+Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
+Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/ethernet/intel/e1000e/netdev.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/intel/e1000e/netdev.c
++++ b/drivers/net/ethernet/intel/e1000e/netdev.c
+@@ -5074,7 +5074,7 @@ static bool e1000e_has_link(struct e1000
+ break;
+ }
+
+- if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
++ if ((ret_val == -E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
+ (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
+ /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
+ e_info("Gigabit has been disabled, downgrading speed\n");
--- /dev/null
+From 19110cfbb34d4af0cdfe14cd243f3b09dc95b013 Mon Sep 17 00:00:00 2001
+From: Benjamin Poirier <bpoirier@suse.com>
+Date: Fri, 21 Jul 2017 11:36:26 -0700
+Subject: e1000e: Separate signaling for link check/link up
+
+From: Benjamin Poirier <bpoirier@suse.com>
+
+commit 19110cfbb34d4af0cdfe14cd243f3b09dc95b013 upstream.
+
+Lennart reported the following race condition:
+
+\ e1000_watchdog_task
+ \ e1000e_has_link
+ \ hw->mac.ops.check_for_link() === e1000e_check_for_copper_link
+ /* link is up */
+ mac->get_link_status = false;
+
+ /* interrupt */
+ \ e1000_msix_other
+ hw->mac.get_link_status = true;
+
+ link_active = !hw->mac.get_link_status
+ /* link_active is false, wrongly */
+
+This problem arises because the single flag get_link_status is used to
+signal two different states: link status needs checking and link status is
+down.
+
+Avoid the problem by using the return value of .check_for_link to signal
+the link status to e1000e_has_link().
+
+Reported-by: Lennart Sorensen <lsorense@csclub.uwaterloo.ca>
+Signed-off-by: Benjamin Poirier <bpoirier@suse.com>
+Tested-by: Aaron Brown <aaron.f.brown@intel.com>
+Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
+Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/ethernet/intel/e1000e/mac.c | 11 ++++++++---
+ drivers/net/ethernet/intel/e1000e/netdev.c | 2 +-
+ 2 files changed, 9 insertions(+), 4 deletions(-)
+
+--- a/drivers/net/ethernet/intel/e1000e/mac.c
++++ b/drivers/net/ethernet/intel/e1000e/mac.c
+@@ -410,6 +410,9 @@ void e1000e_clear_hw_cntrs_base(struct e
+ * Checks to see of the link status of the hardware has changed. If a
+ * change in link status has been detected, then we read the PHY registers
+ * to get the current speed/duplex if link exists.
++ *
++ * Returns a negative error code (-E1000_ERR_*) or 0 (link down) or 1 (link
++ * up).
+ **/
+ s32 e1000e_check_for_copper_link(struct e1000_hw *hw)
+ {
+@@ -423,7 +426,7 @@ s32 e1000e_check_for_copper_link(struct
+ * Change or Rx Sequence Error interrupt.
+ */
+ if (!mac->get_link_status)
+- return 0;
++ return 1;
+
+ /* First we want to see if the MII Status Register reports
+ * link. If so, then we want to get the current speed/duplex
+@@ -461,10 +464,12 @@ s32 e1000e_check_for_copper_link(struct
+ * different link partner.
+ */
+ ret_val = e1000e_config_fc_after_link_up(hw);
+- if (ret_val)
++ if (ret_val) {
+ e_dbg("Error configuring flow control\n");
++ return ret_val;
++ }
+
+- return ret_val;
++ return 1;
+ }
+
+ /**
+--- a/drivers/net/ethernet/intel/e1000e/netdev.c
++++ b/drivers/net/ethernet/intel/e1000e/netdev.c
+@@ -5056,7 +5056,7 @@ static bool e1000e_has_link(struct e1000
+ case e1000_media_type_copper:
+ if (hw->mac.get_link_status) {
+ ret_val = hw->mac.ops.check_for_link(hw);
+- link_active = !hw->mac.get_link_status;
++ link_active = ret_val > 0;
+ } else {
+ link_active = true;
+ }
--- /dev/null
+From foo@baz Tue Nov 28 10:15:23 CET 2017
+Date: Tue, 28 Nov 2017 10:15:23 +0100
+To: Greg KH <gregkh@linuxfoundation.org>
+From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Subject: Revert "drm/i915: Do not rely on wm preservation for ILK watermarks"
+
+This reverts commit 7de694782cbe7840f2c0de6f1e70f41fc1b8b6e8 which is
+commit 8777b927b92cf5b6c29f9f9d3c737addea9ac8a7 upstream.
+
+It was reported to cause flickering and other regressions.
+
+Reported-by: Rainer Fiebig <jrf@mailbox.org>
+Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Cc: Matt Roper <matthew.d.roper@intel.com>
+Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
+Cc: Jani Nikula <jani.nikula@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+reverted:
+---
+ drivers/gpu/drm/i915/intel_drv.h | 1
+ drivers/gpu/drm/i915/intel_pm.c | 52 ++++++++++++++++++++++-----------------
+ 2 files changed, 31 insertions(+), 22 deletions(-)
+
+--- a/drivers/gpu/drm/i915/intel_drv.h
++++ b/drivers/gpu/drm/i915/intel_drv.h
+@@ -457,6 +457,7 @@ struct intel_crtc_scaler_state {
+
+ struct intel_pipe_wm {
+ struct intel_wm_level wm[5];
++ struct intel_wm_level raw_wm[5];
+ uint32_t linetime;
+ bool fbc_wm_enabled;
+ bool pipe_enabled;
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -27,7 +27,6 @@
+
+ #include <linux/cpufreq.h>
+ #include <drm/drm_plane_helper.h>
+-#include <drm/drm_atomic_helper.h>
+ #include "i915_drv.h"
+ #include "intel_drv.h"
+ #include "../../../platform/x86/intel_ips.h"
+@@ -2018,9 +2017,9 @@ static void ilk_compute_wm_level(const s
+ const struct intel_crtc *intel_crtc,
+ int level,
+ struct intel_crtc_state *cstate,
+- const struct intel_plane_state *pristate,
+- const struct intel_plane_state *sprstate,
+- const struct intel_plane_state *curstate,
++ struct intel_plane_state *pristate,
++ struct intel_plane_state *sprstate,
++ struct intel_plane_state *curstate,
+ struct intel_wm_level *result)
+ {
+ uint16_t pri_latency = dev_priv->wm.pri_latency[level];
+@@ -2342,24 +2341,28 @@ static int ilk_compute_pipe_wm(struct in
+ struct intel_pipe_wm *pipe_wm;
+ struct drm_device *dev = state->dev;
+ const struct drm_i915_private *dev_priv = to_i915(dev);
+- struct drm_plane *plane;
+- const struct drm_plane_state *plane_state;
+- const struct intel_plane_state *pristate = NULL;
+- const struct intel_plane_state *sprstate = NULL;
+- const struct intel_plane_state *curstate = NULL;
++ struct intel_plane *intel_plane;
++ struct intel_plane_state *pristate = NULL;
++ struct intel_plane_state *sprstate = NULL;
++ struct intel_plane_state *curstate = NULL;
+ int level, max_level = ilk_wm_max_level(dev), usable_level;
+ struct ilk_wm_maximums max;
+
+ pipe_wm = &cstate->wm.ilk.optimal;
+
+- drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, &cstate->base) {
+- const struct intel_plane_state *ps = to_intel_plane_state(plane_state);
++ for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
++ struct intel_plane_state *ps;
+
+- if (plane->type == DRM_PLANE_TYPE_PRIMARY)
++ ps = intel_atomic_get_existing_plane_state(state,
++ intel_plane);
++ if (!ps)
++ continue;
++
++ if (intel_plane->base.type == DRM_PLANE_TYPE_PRIMARY)
+ pristate = ps;
+- else if (plane->type == DRM_PLANE_TYPE_OVERLAY)
++ else if (intel_plane->base.type == DRM_PLANE_TYPE_OVERLAY)
+ sprstate = ps;
+- else if (plane->type == DRM_PLANE_TYPE_CURSOR)
++ else if (intel_plane->base.type == DRM_PLANE_TYPE_CURSOR)
+ curstate = ps;
+ }
+
+@@ -2381,9 +2384,11 @@ static int ilk_compute_pipe_wm(struct in
+ if (pipe_wm->sprites_scaled)
+ usable_level = 0;
+
+- memset(&pipe_wm->wm, 0, sizeof(pipe_wm->wm));
+ ilk_compute_wm_level(dev_priv, intel_crtc, 0, cstate,
+- pristate, sprstate, curstate, &pipe_wm->wm[0]);
++ pristate, sprstate, curstate, &pipe_wm->raw_wm[0]);
++
++ memset(&pipe_wm->wm, 0, sizeof(pipe_wm->wm));
++ pipe_wm->wm[0] = pipe_wm->raw_wm[0];
+
+ if (IS_HASWELL(dev) || IS_BROADWELL(dev))
+ pipe_wm->linetime = hsw_compute_linetime_wm(cstate);
+@@ -2393,8 +2398,8 @@ static int ilk_compute_pipe_wm(struct in
+
+ ilk_compute_wm_reg_maximums(dev, 1, &max);
+
+- for (level = 1; level <= usable_level; level++) {
+- struct intel_wm_level *wm = &pipe_wm->wm[level];
++ for (level = 1; level <= max_level; level++) {
++ struct intel_wm_level *wm = &pipe_wm->raw_wm[level];
+
+ ilk_compute_wm_level(dev_priv, intel_crtc, level, cstate,
+ pristate, sprstate, curstate, wm);
+@@ -2404,10 +2409,13 @@ static int ilk_compute_pipe_wm(struct in
+ * register maximums since such watermarks are
+ * always invalid.
+ */
+- if (!ilk_validate_wm_level(level, &max, wm)) {
+- memset(wm, 0, sizeof(*wm));
+- break;
+- }
++ if (level > usable_level)
++ continue;
++
++ if (ilk_validate_wm_level(level, &max, wm))
++ pipe_wm->wm[level] = *wm;
++ else
++ usable_level = level;
+ }
+
+ return 0;
fscrypt-lock-mutex-before-checking-for-bounce-page-pool.patch
net-9p-switch-to-wait_event_killable.patch
pm-opp-add-missing-of_node_put-np.patch
+revert-drm-i915-do-not-rely-on-wm-preservation-for-ilk-watermarks.patch
+e1000e-fix-error-path-in-link-detection.patch
+e1000e-fix-return-value-test.patch
+e1000e-separate-signaling-for-link-check-link-up.patch
+e1000e-avoid-receiver-overrun-interrupt-bursts.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
