net: stmmac: mediatek: use PHY_INTF_SEL_x

Use PHY_INTF_SEL_x definitions for the fields that correspond to the
phy_intf_sel inputs to the dwmac core.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Link: https://patch.msgid.link/E1vIjTu-0000000DqtI-2sUB@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c
index f1b36f0a401de084b1116f1e228457c3fa22eb84..dcdf28418fecc978a5685b6dc27a05eef21c7561 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c
@@ -17,9 +17,6 @@
 
 /* Peri Configuration register for mt2712 */
 #define PERI_ETH_PHY_INTF_SEL  0x418
-#define PHY_INTF_MII           0
-#define PHY_INTF_RGMII         1
-#define PHY_INTF_RMII          4
 #define RMII_CLK_SRC_RXC       BIT(4)
 #define RMII_CLK_SRC_INTERNAL  BIT(5)
 
@@ -118,16 +115,16 @@ static int mt2712_set_interface(struct mediatek_dwmac_plat_data *plat)
        /* select phy interface in top control domain */
        switch (plat->phy_mode) {
        case PHY_INTERFACE_MODE_MII:
-               intf_val |= PHY_INTF_MII;
+               intf_val |= PHY_INTF_SEL_GMII_MII;
                break;
        case PHY_INTERFACE_MODE_RMII:
-               intf_val |= (PHY_INTF_RMII | rmii_rxc | rmii_clk_from_mac);
+               intf_val |= PHY_INTF_SEL_RMII | rmii_rxc | rmii_clk_from_mac;
                break;
        case PHY_INTERFACE_MODE_RGMII:
        case PHY_INTERFACE_MODE_RGMII_TXID:
        case PHY_INTERFACE_MODE_RGMII_RXID:
        case PHY_INTERFACE_MODE_RGMII_ID:
-               intf_val |= PHY_INTF_RGMII;
+               intf_val |= PHY_INTF_SEL_RGMII;
                break;
        default:
                dev_err(plat->dev, "phy interface not supported\n");
@@ -297,17 +294,18 @@ static int mt8195_set_interface(struct mediatek_dwmac_plat_data *plat)
        /* select phy interface in top control domain */
        switch (plat->phy_mode) {
        case PHY_INTERFACE_MODE_MII:
-               intf_val |= FIELD_PREP(MT8195_ETH_INTF_SEL, PHY_INTF_MII);
+               intf_val |= FIELD_PREP(MT8195_ETH_INTF_SEL,
+                                      PHY_INTF_SEL_GMII_MII);
                break;
        case PHY_INTERFACE_MODE_RMII:
-               intf_val |= (rmii_rxc | rmii_clk_from_mac);
-               intf_val |= FIELD_PREP(MT8195_ETH_INTF_SEL, PHY_INTF_RMII);
+               intf_val |= rmii_rxc | rmii_clk_from_mac;
+               intf_val |= FIELD_PREP(MT8195_ETH_INTF_SEL, PHY_INTF_SEL_RMII);
                break;
        case PHY_INTERFACE_MODE_RGMII:
        case PHY_INTERFACE_MODE_RGMII_TXID:
        case PHY_INTERFACE_MODE_RGMII_RXID:
        case PHY_INTERFACE_MODE_RGMII_ID:
-               intf_val |= FIELD_PREP(MT8195_ETH_INTF_SEL, PHY_INTF_RGMII);
+               intf_val |= FIELD_PREP(MT8195_ETH_INTF_SEL, PHY_INTF_SEL_RGMII);
                break;
        default:
                dev_err(plat->dev, "phy interface not supported\n");