* doc/install.texi: Fix typos.

	* doc/invoke.texi: Likewise.
	* doc/tm.texi: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@68951 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f393bfa544c53cd773ccf2647d447798a4e064fe..4cf39f31324797e3836cce7a0bfe4377ca11b8de 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2003-07-04  Kazu Hirata  <kazu@cs.umass.edu>
+
+       * doc/install.texi: Fix typos.
+       * doc/invoke.texi: Likewise.
+       * doc/tm.texi: Likewise.
+
 2003-07-04  Kazu Hirata  <kazu@cs.umass.edu>
 
        * config/pa/fptr.c: Fix comment typos.

diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index 8fe1b7129a13424dc2b5793511ea1e4644c6806e..620a19955e13c736e365c8e1db7dbe4d2e617542 100644 (file)
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -2111,7 +2111,7 @@ require GNU binutils 2.13 or newer.  Such subtargets include:
 <hr />
 @end html
 @heading @anchor{arm-*-coff}arm-*-coff
-ARM-family processors.  Note that there are two diffierent varieties
+ARM-family processors.  Note that there are two different varieties
 of PE format subtarget supported: @code{arm-wince-pe} and
 @code{arm-pe} as well as a standard COFF target @code{arm-*-coff}.
 

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index eb4b696ae0ab1425ceeac654e932907df3fcfdfc..9518e0f54a5dc5bd836c211a402f02eabd863a81 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -3954,7 +3954,7 @@ sense when scheduling before register allocation, i.e.@: with
 
 @item -fsched2-use-superblocks
 @opindex fsched2-use-superblocks
-When schedulilng after register allocation, do use superblock scheduling
+When scheduling after register allocation, do use superblock scheduling
 algorithm.  Superblock scheduling allows motion across basic block boundaries
 resulting on faster schedules.  This option is experimental, as not all machine
 descriptions used by GCC model the CPU closely enough to avoid unreliable

diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index df61b0dfbdd165a55ebadbabda0aa2e63340a7d3..9fea987a04d219bfe4ce6617ef907738d2250510 100644 (file)
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -3256,7 +3256,7 @@ If this macro is not defined, it defaults to
 
 Define this macro if the target's representation for dwarf registers
 is different than the internal representation for unwind column.
-Given a dwarf register, this macro should return the interal unwind
+Given a dwarf register, this macro should return the internal unwind
 column number to use instead.
 
 See the PowerPC's SPE target for an example.