]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
6.1-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 12 Jul 2025 12:09:33 +0000 (14:09 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 12 Jul 2025 12:09:33 +0000 (14:09 +0200)
added patches:
x86-cpu-amd-properly-check-the-tsa-microcode.patch

queue-6.1/series
queue-6.1/x86-cpu-amd-properly-check-the-tsa-microcode.patch [new file with mode: 0644]

index 51aceb47f35b32dbab2a027942751f0c555d06e3..4e9d966f220de05b9d3107df072b971267ab4c9b 100644 (file)
@@ -16,3 +16,4 @@ atm-clip-fix-memory-leak-of-struct-clip_vcc.patch
 atm-clip-fix-infinite-recursive-call-of-clip_push.patch
 atm-clip-fix-null-pointer-dereference-in-vcc_sendmsg.patch
 net-sched-abort-__tc_modify_qdisc-if-parent-class-do.patch
+x86-cpu-amd-properly-check-the-tsa-microcode.patch
diff --git a/queue-6.1/x86-cpu-amd-properly-check-the-tsa-microcode.patch b/queue-6.1/x86-cpu-amd-properly-check-the-tsa-microcode.patch
new file mode 100644 (file)
index 0000000..a97099e
--- /dev/null
@@ -0,0 +1,65 @@
+From bp@alien8.de  Sat Jul 12 14:03:07 2025
+From: Borislav Petkov <bp@alien8.de>
+Date: Fri, 11 Jul 2025 21:30:39 +0200
+Subject: x86/CPU/AMD: Properly check the TSA microcode
+To: stable@vger.kernel.org
+Cc: Thomas Voegtle <tv@lio96.de>, kim.phillips@amd.com
+Message-ID: <20250711193039.GKaHFmX8215MRwSR_z@fat_crate.local>
+Content-Disposition: inline
+
+From: "Borislav Petkov (AMD)" <bp@alien8.de>
+
+In order to simplify backports, I resorted to an older version of the
+microcode revision checking which didn't pull in the whole struct
+x86_cpu_id matching machinery.
+
+My simpler method, however, forgot to add the extended CPU model to the
+patch revision, which lead to mismatches when determining whether TSA
+mitigation support is present.
+
+So add that forgotten extended model.
+
+Also, fix a backport mismerge which put tsa_init() where it doesn't
+belong.
+
+This is a stable-only fix and the preference is to do it this way
+because it is a lot simpler. Also, the Fixes: tag below points to the
+respective stable patch.
+
+Fixes: 90293047df18 ("x86/bugs: Add a Transient Scheduler Attacks mitigation")
+Reported-by: Thomas Voegtle <tv@lio96.de>
+Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
+Message-ID: <04ea0a8e-edb0-c59e-ce21-5f3d5d167af3@lio96.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/x86/kernel/cpu/amd.c |    5 +++--
+ 1 file changed, 3 insertions(+), 2 deletions(-)
+
+--- a/arch/x86/kernel/cpu/amd.c
++++ b/arch/x86/kernel/cpu/amd.c
+@@ -561,6 +561,7 @@ static bool amd_check_tsa_microcode(void
+       p.ext_fam       = c->x86 - 0xf;
+       p.model         = c->x86_model;
++      p.ext_model     = c->x86_model >> 4;
+       p.stepping      = c->x86_stepping;
+       if (c->x86 == 0x19) {
+@@ -675,6 +676,8 @@ static void bsp_init_amd(struct cpuinfo_
+       }
+       resctrl_cpu_detect(c);
++
++      tsa_init(c);
+ }
+ static void early_detect_mem_encrypt(struct cpuinfo_x86 *c)
+@@ -719,8 +722,6 @@ static void early_detect_mem_encrypt(str
+                       goto clear_sev;
+-      tsa_init(c);
+-
+               return;
+ clear_all: