+++ /dev/null
-From de4dcce44501a59369374ea4bc8a5e3c42b5d7c3 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Fri, 30 Sep 2022 22:54:23 +0800
-Subject: arm64: dts: imx8mp: correct usb clocks
-
-From: Li Jun <jun.li@nxp.com>
-
-[ Upstream commit 8a1ed98fe0f2e7669f0409de0f46f317b275f8be ]
-
-After commit cf7f3f4fa9e5 ("clk: imx8mp: fix usb_root_clk parent"),
-usb_root_clk is no longer for suspend clock so update dts accordingly
-to use right bus clock and suspend clock.
-
-Fixes: fb8587a2c165 ("arm64: dtsi: imx8mp: add usb nodes")
-Cc: stable@vger.kernel.org # ed1f4ccfe947: clk: imx: imx8mp: add shared clk gate for usb suspend clk
-Cc: stable@vger.kernel.org # v5.19+
-Reviewed-by: Peng Fan <peng.fan@nxp.com>
-Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
-Signed-off-by: Li Jun <jun.li@nxp.com>
-Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
-index ab670b5d641b1..7f338c28a5173 100644
---- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
-+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
-@@ -890,7 +890,7 @@
- compatible = "fsl,imx8mp-dwc3";
- reg = <0x32f10100 0x8>;
- clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
-- <&clk IMX8MP_CLK_USB_ROOT>;
-+ <&clk IMX8MP_CLK_USB_SUSP>;
- clock-names = "hsio", "suspend";
- interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
-@@ -902,9 +902,9 @@
- usb_dwc3_0: usb@38100000 {
- compatible = "snps,dwc3";
- reg = <0x38100000 0x10000>;
-- clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
-+ clocks = <&clk IMX8MP_CLK_USB_ROOT>,
- <&clk IMX8MP_CLK_USB_CORE_REF>,
-- <&clk IMX8MP_CLK_USB_ROOT>;
-+ <&clk IMX8MP_CLK_USB_SUSP>;
- clock-names = "bus_early", "ref", "suspend";
- assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>;
- assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
-@@ -931,7 +931,7 @@
- compatible = "fsl,imx8mp-dwc3";
- reg = <0x32f10108 0x8>;
- clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
-- <&clk IMX8MP_CLK_USB_ROOT>;
-+ <&clk IMX8MP_CLK_USB_SUSP>;
- clock-names = "hsio", "suspend";
- interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
-@@ -943,9 +943,9 @@
- usb_dwc3_1: usb@38200000 {
- compatible = "snps,dwc3";
- reg = <0x38200000 0x10000>;
-- clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
-+ clocks = <&clk IMX8MP_CLK_USB_ROOT>,
- <&clk IMX8MP_CLK_USB_CORE_REF>,
-- <&clk IMX8MP_CLK_USB_ROOT>;
-+ <&clk IMX8MP_CLK_USB_SUSP>;
- clock-names = "bus_early", "ref", "suspend";
- assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>;
- assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
---
-2.39.2
-