]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
riscv: dts: thead: th1520: Add PMU event node
authorInochi Amaoto <inochiama@outlook.com>
Thu, 30 May 2024 11:18:35 +0000 (19:18 +0800)
committerConor Dooley <conor.dooley@microchip.com>
Wed, 19 Jun 2024 10:05:43 +0000 (11:05 +0100)
T-HEAD th1520 uses standard C910 chip and its pmu is already supported
by OpenSBI.

Add the pmu event description for T-HEAD th1520 SoC.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://www.xrvm.com/product/xuantie/4240217381324001280?spm=xrvm.27140568.0.0.7f979b29nzIa1m
Reviewed-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
arch/riscv/boot/dts/thead/th1520.dtsi

index d2fa25839012c3852867e331cd3c042bf0474ea7..3c9974062c206b870ebe85b91da2a04e5bc7b879 100644 (file)
                };
        };
 
+       pmu {
+               compatible = "riscv,pmu";
+               riscv,event-to-mhpmcounters =
+                       <0x00003 0x00003 0x0007fff8>,
+                       <0x00004 0x00004 0x0007fff8>,
+                       <0x00005 0x00005 0x0007fff8>,
+                       <0x00006 0x00006 0x0007fff8>,
+                       <0x00007 0x00007 0x0007fff8>,
+                       <0x00008 0x00008 0x0007fff8>,
+                       <0x00009 0x00009 0x0007fff8>,
+                       <0x0000a 0x0000a 0x0007fff8>,
+                       <0x10000 0x10000 0x0007fff8>,
+                       <0x10001 0x10001 0x0007fff8>,
+                       <0x10002 0x10002 0x0007fff8>,
+                       <0x10003 0x10003 0x0007fff8>,
+                       <0x10010 0x10010 0x0007fff8>,
+                       <0x10011 0x10011 0x0007fff8>,
+                       <0x10012 0x10012 0x0007fff8>,
+                       <0x10013 0x10013 0x0007fff8>;
+               riscv,event-to-mhpmevent =
+                       <0x00003 0x00000000 0x00000001>,
+                       <0x00004 0x00000000 0x00000002>,
+                       <0x00006 0x00000000 0x00000006>,
+                       <0x00005 0x00000000 0x00000007>,
+                       <0x00007 0x00000000 0x00000008>,
+                       <0x00008 0x00000000 0x00000009>,
+                       <0x00009 0x00000000 0x0000000a>,
+                       <0x0000a 0x00000000 0x0000000b>,
+                       <0x10000 0x00000000 0x0000000c>,
+                       <0x10001 0x00000000 0x0000000d>,
+                       <0x10002 0x00000000 0x0000000e>,
+                       <0x10003 0x00000000 0x0000000f>,
+                       <0x10010 0x00000000 0x00000010>,
+                       <0x10011 0x00000000 0x00000011>,
+                       <0x10012 0x00000000 0x00000012>,
+                       <0x10013 0x00000000 0x00000013>;
+               riscv,raw-event-to-mhpmcounters =
+                       <0x00000000 0x00000001 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000002 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000003 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000004 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000005 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000006 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000007 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000008 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000009 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x0000000a 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x0000000b 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x0000000c 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x0000000d 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x0000000e 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x0000000f 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000010 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000011 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000012 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000013 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000014 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000015 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000016 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000017 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000018 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000019 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x0000001a 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x0000001b 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x0000001c 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x0000001d 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x0000001e 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x0000001f 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000020 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000021 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000022 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000023 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000024 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000025 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000026 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000027 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000028 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x00000029 0xffffffff 0xffffffff 0x0007fff8>,
+                       <0x00000000 0x0000002a 0xffffffff 0xffffffff 0x0007fff8>;
+       };
+
        osc: oscillator {
                compatible = "fixed-clock";
                clock-output-names = "osc_24m";