]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: mediatek: mt8195: Add power domain for dp_intf0
authorMacpaul Lin <macpaul.lin@mediatek.com>
Wed, 25 Sep 2024 08:05:15 +0000 (16:05 +0800)
committerAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tue, 15 Apr 2025 07:49:56 +0000 (09:49 +0200)
During inspecting dtbs_check errors, we found the power domain
setting of DPI node "dp_intf0" is missing. Add power domain setting
to "MT8195_POWER_DOMAIN_VDOSYS0" for "dp_intf0"

Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Tommy Chen <tommyyl.chen@mediatek.com>
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240925080515.16377-1-macpaul.lin@mediatek.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
arch/arm64/boot/dts/mediatek/mt8195.dtsi

index 1ded4b3f87605fbe46d58ffe388197c3fd36f846..dd065b1bf94a3d6893a82d4d998c138bf6b76526 100644 (file)
                        compatible = "mediatek,mt8195-dp-intf";
                        reg = <0 0x1c015000 0 0x1000>;
                        interrupts = <GIC_SPI 657 IRQ_TYPE_LEVEL_HIGH 0>;
+                       power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
                        clocks = <&vdosys0 CLK_VDO0_DP_INTF0_DP_INTF>,
                                 <&vdosys0  CLK_VDO0_DP_INTF0>,
                                 <&apmixedsys CLK_APMIXED_TVDPLL1>;