Manually add ChangeLog entry for r14-5312-g040e5b0edbca861196d9e2ea2af5e805769c8d5d...

This commit got ignored because ChangeLog update can't parse its log message.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a90a43daec4928da3265eba47d27c337ea9e817d..2e8b8d7a547dfa62b32cb152d0b6da950d8e4590 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -603,6 +603,14 @@
 
        * config/riscv/autovec.md (vec_init<mode><vel>): Split patterns.
 
+2023-11-10  Pan Li  <pan2.li@intel.com>
+
+       Revert:
+       2023-11-10  Pan Li  <pan2.li@intel.com>
+       * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem):
+       New fun impl to expand the insn when trailing same elements.
+       (expand_vec_init): Try trailing same elements when vec_init.
+
 2023-11-10  Pan Li  <pan2.li@intel.com>
 
        * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem):

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 1cc65b0eb9a1fcbd597d79ca2a83ca43897c4491..5e42221221f2a5c5feed32429c0da42e2e9d69eb 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -2207,6 +2207,29 @@
        PR middle-end/112469
        * gcc.dg/torture/pr112469.c: New testcase.
 
+2023-11-10  Pan Li  <pan2.li@intel.com>
+
+       Revert:
+       2023-11-10  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/vls-vlmax/init-same-tail-1.c: New test.
+       * gcc.target/riscv/rvv/autovec/vls-vlmax/init-same-tail-2.c: New test.
+       * gcc.target/riscv/rvv/autovec/vls-vlmax/init-same-tail-3.c: New test.
+       * gcc.target/riscv/rvv/autovec/vls-vlmax/init-same-tail-4.c: New test.
+       * gcc.target/riscv/rvv/autovec/vls-vlmax/init-same-tail-5.c: New test.
+       * gcc.target/riscv/rvv/autovec/vls-vlmax/init-same-tail-run-1.c: New test.
+       * gcc.target/riscv/rvv/autovec/vls-vlmax/init-same-tail-run-2.c: New test.
+       * gcc.target/riscv/rvv/autovec/vls-vlmax/init-same-tail-run-3.c: New test.
+       * gcc.target/riscv/rvv/autovec/vls/init-same-tail-1.c: New test.
+       * gcc.target/riscv/rvv/autovec/vls/init-same-tail-2.c: New test.
+       * gcc.target/riscv/rvv/autovec/vls/init-same-tail-3.c: New test.
+       * gcc.target/riscv/rvv/autovec/vls/init-same-tail-4.c: New test.
+       * gcc.target/riscv/rvv/autovec/vls/init-same-tail-5.c: New test.
+       * gcc.target/riscv/rvv/autovec/vls/init-same-tail-6.c: New test.
+       * gcc.target/riscv/rvv/autovec/vls/init-same-tail-7.c: New test.
+       * gcc.target/riscv/rvv/autovec/vls/init-same-tail-8.c: New test.
+       * gcc.target/riscv/rvv/autovec/vls/init-same-tail-9.c: New test.
+
 2023-11-10  Pan Li  <pan2.li@intel.com>
 
        * gcc.target/riscv/rvv/autovec/vls-vlmax/init-same-tail-1.c: New test.