We can handle bitwise-operation reductions and reductions on mask
vectors just fine.
PR tree-optimization/122110
* tree-vect-loop.cc (vectorizable_reduction): Relax restriction
to mode-precision operations.
return false;
/* Do not try to vectorize bit-precision reductions. */
- if (!type_has_mode_precision_p (op.type))
+ if (!VECTOR_BOOLEAN_TYPE_P (vectype_out)
+ && !type_has_mode_precision_p (op.type)
+ && op.code != BIT_AND_EXPR
+ && op.code != BIT_IOR_EXPR
+ && op.code != BIT_XOR_EXPR)
return false;
/* Lane-reducing ops also never can be used in a SLP reduction group