--- /dev/null
+From a0d4c7eb71dd08a89ad631177bb0cbbabd598f84 Mon Sep 17 00:00:00 2001
+From: Chaotian Jing <chaotian.jing@mediatek.com>
+Date: Thu, 5 Sep 2019 15:53:18 +0800
+Subject: mmc: block: Add CMD13 polling for MMC IOCTLS with R1B response
+
+From: Chaotian Jing <chaotian.jing@mediatek.com>
+
+commit a0d4c7eb71dd08a89ad631177bb0cbbabd598f84 upstream.
+
+MMC IOCTLS with R1B responses may cause the card to enter the busy state,
+which means it's not ready to receive a new request. To prevent new
+requests from being sent to the card, use a CMD13 polling loop to verify
+that the card returns to the transfer state, before completing the request.
+
+Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
+Reviewed-by: Avri Altman <avri.altman@wdc.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/core/block.c | 147 +++++++++++++++++------------------------------
+ 1 file changed, 55 insertions(+), 92 deletions(-)
+
+--- a/drivers/mmc/core/block.c
++++ b/drivers/mmc/core/block.c
+@@ -408,38 +408,6 @@ static int mmc_blk_ioctl_copy_to_user(st
+ return 0;
+ }
+
+-static int ioctl_rpmb_card_status_poll(struct mmc_card *card, u32 *status,
+- u32 retries_max)
+-{
+- int err;
+- u32 retry_count = 0;
+-
+- if (!status || !retries_max)
+- return -EINVAL;
+-
+- do {
+- err = __mmc_send_status(card, status, 5);
+- if (err)
+- break;
+-
+- if (!R1_STATUS(*status) &&
+- (R1_CURRENT_STATE(*status) != R1_STATE_PRG))
+- break; /* RPMB programming operation complete */
+-
+- /*
+- * Rechedule to give the MMC device a chance to continue
+- * processing the previous command without being polled too
+- * frequently.
+- */
+- usleep_range(1000, 5000);
+- } while (++retry_count < retries_max);
+-
+- if (retry_count == retries_max)
+- err = -EPERM;
+-
+- return err;
+-}
+-
+ static int ioctl_do_sanitize(struct mmc_card *card)
+ {
+ int err;
+@@ -468,6 +436,58 @@ out:
+ return err;
+ }
+
++static inline bool mmc_blk_in_tran_state(u32 status)
++{
++ /*
++ * Some cards mishandle the status bits, so make sure to check both the
++ * busy indication and the card state.
++ */
++ return status & R1_READY_FOR_DATA &&
++ (R1_CURRENT_STATE(status) == R1_STATE_TRAN);
++}
++
++static int card_busy_detect(struct mmc_card *card, unsigned int timeout_ms,
++ u32 *resp_errs)
++{
++ unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
++ int err = 0;
++ u32 status;
++
++ do {
++ bool done = time_after(jiffies, timeout);
++
++ err = __mmc_send_status(card, &status, 5);
++ if (err) {
++ dev_err(mmc_dev(card->host),
++ "error %d requesting status\n", err);
++ return err;
++ }
++
++ /* Accumulate any response error bits seen */
++ if (resp_errs)
++ *resp_errs |= status;
++
++ /*
++ * Timeout if the device never becomes ready for data and never
++ * leaves the program state.
++ */
++ if (done) {
++ dev_err(mmc_dev(card->host),
++ "Card stuck in wrong state! %s status: %#x\n",
++ __func__, status);
++ return -ETIMEDOUT;
++ }
++
++ /*
++ * Some cards mishandle the status bits,
++ * so make sure to check both the busy
++ * indication and the card state.
++ */
++ } while (!mmc_blk_in_tran_state(status));
++
++ return err;
++}
++
+ static int __mmc_blk_ioctl_cmd(struct mmc_card *card, struct mmc_blk_data *md,
+ struct mmc_blk_ioc_data *idata)
+ {
+@@ -477,7 +497,6 @@ static int __mmc_blk_ioctl_cmd(struct mm
+ struct scatterlist sg;
+ int err;
+ unsigned int target_part;
+- u32 status = 0;
+
+ if (!card || !md || !idata)
+ return -EINVAL;
+@@ -611,16 +630,12 @@ static int __mmc_blk_ioctl_cmd(struct mm
+
+ memcpy(&(idata->ic.response), cmd.resp, sizeof(cmd.resp));
+
+- if (idata->rpmb) {
++ if (idata->rpmb || (cmd.flags & MMC_RSP_R1B)) {
+ /*
+- * Ensure RPMB command has completed by polling CMD13
++ * Ensure RPMB/R1B command has completed by polling CMD13
+ * "Send Status".
+ */
+- err = ioctl_rpmb_card_status_poll(card, &status, 5);
+- if (err)
+- dev_err(mmc_dev(card->host),
+- "%s: Card Status=0x%08X, error %d\n",
+- __func__, status, err);
++ err = card_busy_detect(card, MMC_BLK_TIMEOUT_MS, NULL);
+ }
+
+ return err;
+@@ -970,58 +985,6 @@ static unsigned int mmc_blk_data_timeout
+ return ms;
+ }
+
+-static inline bool mmc_blk_in_tran_state(u32 status)
+-{
+- /*
+- * Some cards mishandle the status bits, so make sure to check both the
+- * busy indication and the card state.
+- */
+- return status & R1_READY_FOR_DATA &&
+- (R1_CURRENT_STATE(status) == R1_STATE_TRAN);
+-}
+-
+-static int card_busy_detect(struct mmc_card *card, unsigned int timeout_ms,
+- u32 *resp_errs)
+-{
+- unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
+- int err = 0;
+- u32 status;
+-
+- do {
+- bool done = time_after(jiffies, timeout);
+-
+- err = __mmc_send_status(card, &status, 5);
+- if (err) {
+- dev_err(mmc_dev(card->host),
+- "error %d requesting status\n", err);
+- return err;
+- }
+-
+- /* Accumulate any response error bits seen */
+- if (resp_errs)
+- *resp_errs |= status;
+-
+- /*
+- * Timeout if the device never becomes ready for data and never
+- * leaves the program state.
+- */
+- if (done) {
+- dev_err(mmc_dev(card->host),
+- "Card stuck in wrong state! %s status: %#x\n",
+- __func__, status);
+- return -ETIMEDOUT;
+- }
+-
+- /*
+- * Some cards mishandle the status bits,
+- * so make sure to check both the busy
+- * indication and the card state.
+- */
+- } while (!mmc_blk_in_tran_state(status));
+-
+- return err;
+-}
+-
+ static int mmc_blk_reset(struct mmc_blk_data *md, struct mmc_host *host,
+ int type)
+ {
--- /dev/null
+From 3869468e0c4800af52bfe1e0b72b338dcdae2cfc Mon Sep 17 00:00:00 2001
+From: Chaotian Jing <chaotian.jing@mediatek.com>
+Date: Thu, 5 Sep 2019 15:53:17 +0800
+Subject: mmc: block: Make card_busy_detect() a bit more generic
+
+From: Chaotian Jing <chaotian.jing@mediatek.com>
+
+commit 3869468e0c4800af52bfe1e0b72b338dcdae2cfc upstream.
+
+To prepare for more users of card_busy_detect(), let's drop the struct
+request * as an in-parameter and convert to log the error message via
+dev_err() instead of pr_err().
+
+Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
+Reviewed-by: Avri Altman <avri.altman@wdc.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/core/block.c | 16 ++++++++--------
+ 1 file changed, 8 insertions(+), 8 deletions(-)
+
+--- a/drivers/mmc/core/block.c
++++ b/drivers/mmc/core/block.c
+@@ -981,7 +981,7 @@ static inline bool mmc_blk_in_tran_state
+ }
+
+ static int card_busy_detect(struct mmc_card *card, unsigned int timeout_ms,
+- struct request *req, u32 *resp_errs)
++ u32 *resp_errs)
+ {
+ unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
+ int err = 0;
+@@ -992,8 +992,8 @@ static int card_busy_detect(struct mmc_c
+
+ err = __mmc_send_status(card, &status, 5);
+ if (err) {
+- pr_err("%s: error %d requesting status\n",
+- req->rq_disk->disk_name, err);
++ dev_err(mmc_dev(card->host),
++ "error %d requesting status\n", err);
+ return err;
+ }
+
+@@ -1006,9 +1006,9 @@ static int card_busy_detect(struct mmc_c
+ * leaves the program state.
+ */
+ if (done) {
+- pr_err("%s: Card stuck in wrong state! %s %s status: %#x\n",
+- mmc_hostname(card->host),
+- req->rq_disk->disk_name, __func__, status);
++ dev_err(mmc_dev(card->host),
++ "Card stuck in wrong state! %s status: %#x\n",
++ __func__, status);
+ return -ETIMEDOUT;
+ }
+
+@@ -1671,7 +1671,7 @@ static int mmc_blk_fix_state(struct mmc_
+
+ mmc_blk_send_stop(card, timeout);
+
+- err = card_busy_detect(card, timeout, req, NULL);
++ err = card_busy_detect(card, timeout, NULL);
+
+ mmc_retune_release(card->host);
+
+@@ -1895,7 +1895,7 @@ static int mmc_blk_card_busy(struct mmc_
+ if (mmc_host_is_spi(card->host) || rq_data_dir(req) == READ)
+ return 0;
+
+- err = card_busy_detect(card, MMC_BLK_TIMEOUT_MS, req, &status);
++ err = card_busy_detect(card, MMC_BLK_TIMEOUT_MS, &status);
+
+ /*
+ * Do not assume data transferred correctly if there are any error bits
--- /dev/null
+From 99b4ddd8b76a6f60a8c2b3775849d65d21a418fc Mon Sep 17 00:00:00 2001
+From: Ulf Hansson <ulf.hansson@linaro.org>
+Date: Thu, 10 Oct 2019 15:54:37 +0200
+Subject: mmc: core: Drop check for mmc_card_is_removable() in mmc_rescan()
+
+From: Ulf Hansson <ulf.hansson@linaro.org>
+
+commit 99b4ddd8b76a6f60a8c2b3775849d65d21a418fc upstream.
+
+Upfront in mmc_rescan() we use the host->rescan_entered flag, to allow
+scanning only once for non-removable cards. Therefore, it's also not
+possible that we can have a corresponding card bus attached (host->bus_ops
+is NULL), when we are scanning non-removable cards.
+
+For this reason, let' drop the check for mmc_card_is_removable() as it's
+redundant.
+
+Reviewed-by: Douglas Anderson <dianders@chromium.org>
+Tested-by: Douglas Anderson <dianders@chromium.org>
+Cc: stable@vger.kernel.org # v5.4+
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/core/core.c | 7 ++-----
+ 1 file changed, 2 insertions(+), 5 deletions(-)
+
+--- a/drivers/mmc/core/core.c
++++ b/drivers/mmc/core/core.c
+@@ -2297,11 +2297,8 @@ void mmc_rescan(struct work_struct *work
+
+ mmc_bus_get(host);
+
+- /*
+- * if there is a _removable_ card registered, check whether it is
+- * still present
+- */
+- if (host->bus_ops && !host->bus_dead && mmc_card_is_removable(host))
++ /* Verify a registered card to be functional, else remove it. */
++ if (host->bus_ops && !host->bus_dead)
+ host->bus_ops->detect(host);
+
+ host->detect_change = 0;
--- /dev/null
+From 2ac55d5e5ec9ad0a07e194f0eaca865fe5aa3c40 Mon Sep 17 00:00:00 2001
+From: Ulf Hansson <ulf.hansson@linaro.org>
+Date: Thu, 17 Oct 2019 15:25:36 +0200
+Subject: mmc: core: Re-work HW reset for SDIO cards
+
+From: Ulf Hansson <ulf.hansson@linaro.org>
+
+commit 2ac55d5e5ec9ad0a07e194f0eaca865fe5aa3c40 upstream.
+
+It have turned out that it's not a good idea to unconditionally do a power
+cycle and then to re-initialize the SDIO card, as currently done through
+mmc_hw_reset() -> mmc_sdio_hw_reset(). This because there may be multiple
+SDIO func drivers probed, who also shares the same SDIO card.
+
+To address these scenarios, one may be tempted to use a notification
+mechanism, as to allow the core to inform each of the probed func drivers,
+about an ongoing HW reset. However, supporting such an operation from the
+func driver point of view, may not be entirely trivial.
+
+Therefore, let's use a more simplistic approach to solve the problem, by
+instead forcing the card to be removed and re-detected, via scheduling a
+rescan-work. In this way, we can rely on existing infrastructure, as the
+func driver's ->remove() and ->probe() callbacks, becomes invoked to deal
+with the cleanup and the re-initialization.
+
+This solution may be considered as rather heavy, especially if a func
+driver doesn't share its card with other func drivers. To address this,
+let's keep the current immediate HW reset option as well, but run it only
+when there is one func driver probed for the card.
+
+Finally, to allow the caller of mmc_hw_reset(), to understand if the reset
+is being asynchronously managed from a scheduled work, it returns 1
+(propagated from mmc_sdio_hw_reset()). If the HW reset is executed
+successfully and synchronously it returns 0, which maintains the existing
+behaviour.
+
+Reviewed-by: Douglas Anderson <dianders@chromium.org>
+Tested-by: Douglas Anderson <dianders@chromium.org>
+Cc: stable@vger.kernel.org # v5.4+
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/core/core.c | 5 ++---
+ drivers/mmc/core/core.h | 2 ++
+ drivers/mmc/core/sdio.c | 28 +++++++++++++++++++++++++++-
+ drivers/mmc/core/sdio_bus.c | 9 ++++++++-
+ include/linux/mmc/card.h | 1 +
+ 5 files changed, 40 insertions(+), 5 deletions(-)
+
+--- a/drivers/mmc/core/core.c
++++ b/drivers/mmc/core/core.c
+@@ -1469,8 +1469,7 @@ void mmc_detach_bus(struct mmc_host *hos
+ mmc_bus_put(host);
+ }
+
+-static void _mmc_detect_change(struct mmc_host *host, unsigned long delay,
+- bool cd_irq)
++void _mmc_detect_change(struct mmc_host *host, unsigned long delay, bool cd_irq)
+ {
+ /*
+ * If the device is configured as wakeup, we prevent a new sleep for
+@@ -2129,7 +2128,7 @@ int mmc_hw_reset(struct mmc_host *host)
+ ret = host->bus_ops->hw_reset(host);
+ mmc_bus_put(host);
+
+- if (ret)
++ if (ret < 0)
+ pr_warn("%s: tried to HW reset card, got error %d\n",
+ mmc_hostname(host), ret);
+
+--- a/drivers/mmc/core/core.h
++++ b/drivers/mmc/core/core.h
+@@ -70,6 +70,8 @@ void mmc_rescan(struct work_struct *work
+ void mmc_start_host(struct mmc_host *host);
+ void mmc_stop_host(struct mmc_host *host);
+
++void _mmc_detect_change(struct mmc_host *host, unsigned long delay,
++ bool cd_irq);
+ int _mmc_detect_card_removed(struct mmc_host *host);
+ int mmc_detect_card_removed(struct mmc_host *host);
+
+--- a/drivers/mmc/core/sdio.c
++++ b/drivers/mmc/core/sdio.c
+@@ -1048,9 +1048,35 @@ static int mmc_sdio_runtime_resume(struc
+ return ret;
+ }
+
++/*
++ * SDIO HW reset
++ *
++ * Returns 0 if the HW reset was executed synchronously, returns 1 if the HW
++ * reset was asynchronously scheduled, else a negative error code.
++ */
+ static int mmc_sdio_hw_reset(struct mmc_host *host)
+ {
+- mmc_power_cycle(host, host->card->ocr);
++ struct mmc_card *card = host->card;
++
++ /*
++ * In case the card is shared among multiple func drivers, reset the
++ * card through a rescan work. In this way it will be removed and
++ * re-detected, thus all func drivers becomes informed about it.
++ */
++ if (atomic_read(&card->sdio_funcs_probed) > 1) {
++ if (mmc_card_removed(card))
++ return 1;
++ host->rescan_entered = 0;
++ mmc_card_set_removed(card);
++ _mmc_detect_change(host, 0, false);
++ return 1;
++ }
++
++ /*
++ * A single func driver has been probed, then let's skip the heavy
++ * hotplug dance above and execute the reset immediately.
++ */
++ mmc_power_cycle(host, card->ocr);
+ return mmc_sdio_reinit_card(host);
+ }
+
+--- a/drivers/mmc/core/sdio_bus.c
++++ b/drivers/mmc/core/sdio_bus.c
+@@ -138,6 +138,8 @@ static int sdio_bus_probe(struct device
+ if (ret)
+ return ret;
+
++ atomic_inc(&func->card->sdio_funcs_probed);
++
+ /* Unbound SDIO functions are always suspended.
+ * During probe, the function is set active and the usage count
+ * is incremented. If the driver supports runtime PM,
+@@ -153,7 +155,10 @@ static int sdio_bus_probe(struct device
+ /* Set the default block size so the driver is sure it's something
+ * sensible. */
+ sdio_claim_host(func);
+- ret = sdio_set_block_size(func, 0);
++ if (mmc_card_removed(func->card))
++ ret = -ENOMEDIUM;
++ else
++ ret = sdio_set_block_size(func, 0);
+ sdio_release_host(func);
+ if (ret)
+ goto disable_runtimepm;
+@@ -165,6 +170,7 @@ static int sdio_bus_probe(struct device
+ return 0;
+
+ disable_runtimepm:
++ atomic_dec(&func->card->sdio_funcs_probed);
+ if (func->card->host->caps & MMC_CAP_POWER_OFF_CARD)
+ pm_runtime_put_noidle(dev);
+ dev_pm_domain_detach(dev, false);
+@@ -181,6 +187,7 @@ static int sdio_bus_remove(struct device
+ pm_runtime_get_sync(dev);
+
+ drv->remove(func);
++ atomic_dec(&func->card->sdio_funcs_probed);
+
+ if (func->irq_handler) {
+ pr_warn("WARNING: driver %s did not remove its interrupt handler!\n",
+--- a/include/linux/mmc/card.h
++++ b/include/linux/mmc/card.h
+@@ -291,6 +291,7 @@ struct mmc_card {
+ struct sd_switch_caps sw_caps; /* switch (CMD6) caps */
+
+ unsigned int sdio_funcs; /* number of SDIO functions */
++ atomic_t sdio_funcs_probed; /* number of probed SDIO funcs */
+ struct sdio_cccr cccr; /* common card info */
+ struct sdio_cis cis; /* common tuple info */
+ struct sdio_func *sdio_func[SDIO_MAX_FUNCS]; /* SDIO functions (devices) */
--- /dev/null
+From f338bb9f0179cb959977b74e8331b312264d720b Mon Sep 17 00:00:00 2001
+From: George Cherian <george.cherian@marvell.com>
+Date: Mon, 11 Nov 2019 02:43:03 +0000
+Subject: PCI: Apply Cavium ACS quirk to ThunderX2 and ThunderX3
+
+From: George Cherian <george.cherian@marvell.com>
+
+commit f338bb9f0179cb959977b74e8331b312264d720b upstream.
+
+Enhance the ACS quirk for Cavium Processors. Add the root port vendor IDs
+for ThunderX2 and ThunderX3 series of processors.
+
+[bhelgaas: add Fixes: and stable tag]
+Fixes: f2ddaf8dfd4a ("PCI: Apply Cavium ThunderX ACS quirk to more Root Ports")
+Link: https://lore.kernel.org/r/20191111024243.GA11408@dc5-eodlnx05.marvell.com
+Signed-off-by: George Cherian <george.cherian@marvell.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Reviewed-by: Robert Richter <rrichter@marvell.com>
+Cc: stable@vger.kernel.org # v4.12+
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/pci/quirks.c | 20 +++++++++++++-------
+ 1 file changed, 13 insertions(+), 7 deletions(-)
+
+--- a/drivers/pci/quirks.c
++++ b/drivers/pci/quirks.c
+@@ -4313,15 +4313,21 @@ static int pci_quirk_amd_sb_acs(struct p
+
+ static bool pci_quirk_cavium_acs_match(struct pci_dev *dev)
+ {
++ if (!pci_is_pcie(dev) || pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT)
++ return false;
++
++ switch (dev->device) {
+ /*
+- * Effectively selects all downstream ports for whole ThunderX 1
+- * family by 0xf800 mask (which represents 8 SoCs), while the lower
+- * bits of device ID are used to indicate which subdevice is used
+- * within the SoC.
++ * Effectively selects all downstream ports for whole ThunderX1
++ * (which represents 8 SoCs).
+ */
+- return (pci_is_pcie(dev) &&
+- (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) &&
+- ((dev->device & 0xf800) == 0xa000));
++ case 0xa000 ... 0xa7ff: /* ThunderX1 */
++ case 0xaf84: /* ThunderX2 */
++ case 0xb884: /* ThunderX3 */
++ return true;
++ default:
++ return false;
++ }
+ }
+
+ static int pci_quirk_cavium_acs(struct pci_dev *dev, u16 acs_flags)
--- /dev/null
+From 73884a7082f466ce6686bb8dd7e6571dd42313b4 Mon Sep 17 00:00:00 2001
+From: Subbaraya Sundeep <sbhatta@marvell.com>
+Date: Mon, 4 Nov 2019 12:27:44 +0530
+Subject: PCI: Do not use bus number zero from EA capability
+
+From: Subbaraya Sundeep <sbhatta@marvell.com>
+
+commit 73884a7082f466ce6686bb8dd7e6571dd42313b4 upstream.
+
+As per PCIe r5.0, sec 7.8.5.2, fixed bus numbers of a bridge must be zero
+when no function that uses EA is located behind it. Hence, if EA supplies
+bus numbers of zero, assign bus numbers normally. A secondary bus can
+never have a bus number of zero, so setting a bridge's Secondary Bus Number
+to zero makes downstream devices unreachable.
+
+[bhelgaas: retain bool return value so "zero is invalid" logic is local]
+Fixes: 2dbce5901179 ("PCI: Assign bus numbers present in EA capability for bridges")
+Link: https://lore.kernel.org/r/1572850664-9861-1-git-send-email-sundeep.lkml@gmail.com
+Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Cc: stable@vger.kernel.org # v5.2+
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/pci/probe.c | 16 +++++++++++-----
+ 1 file changed, 11 insertions(+), 5 deletions(-)
+
+--- a/drivers/pci/probe.c
++++ b/drivers/pci/probe.c
+@@ -1089,14 +1089,15 @@ static unsigned int pci_scan_child_bus_e
+ * @sec: updated with secondary bus number from EA
+ * @sub: updated with subordinate bus number from EA
+ *
+- * If @dev is a bridge with EA capability, update @sec and @sub with
+- * fixed bus numbers from the capability and return true. Otherwise,
+- * return false.
++ * If @dev is a bridge with EA capability that specifies valid secondary
++ * and subordinate bus numbers, return true with the bus numbers in @sec
++ * and @sub. Otherwise return false.
+ */
+ static bool pci_ea_fixed_busnrs(struct pci_dev *dev, u8 *sec, u8 *sub)
+ {
+ int ea, offset;
+ u32 dw;
++ u8 ea_sec, ea_sub;
+
+ if (dev->hdr_type != PCI_HEADER_TYPE_BRIDGE)
+ return false;
+@@ -1108,8 +1109,13 @@ static bool pci_ea_fixed_busnrs(struct p
+
+ offset = ea + PCI_EA_FIRST_ENT;
+ pci_read_config_dword(dev, offset, &dw);
+- *sec = dw & PCI_EA_SEC_BUS_MASK;
+- *sub = (dw & PCI_EA_SUB_BUS_MASK) >> PCI_EA_SUB_BUS_SHIFT;
++ ea_sec = dw & PCI_EA_SEC_BUS_MASK;
++ ea_sub = (dw & PCI_EA_SUB_BUS_MASK) >> PCI_EA_SUB_BUS_SHIFT;
++ if (ea_sec == 0 || ea_sub < ea_sec)
++ return false;
++
++ *sec = ea_sec;
++ *sub = ea_sub;
+ return true;
+ }
+
--- /dev/null
+From d8558ac8c93d429d65d7490b512a3a67e559d0d4 Mon Sep 17 00:00:00 2001
+From: Steffen Liebergeld <steffen.liebergeld@kernkonzept.com>
+Date: Wed, 18 Sep 2019 15:16:52 +0200
+Subject: PCI: Fix Intel ACS quirk UPDCR register address
+
+From: Steffen Liebergeld <steffen.liebergeld@kernkonzept.com>
+
+commit d8558ac8c93d429d65d7490b512a3a67e559d0d4 upstream.
+
+According to documentation [0] the correct offset for the Upstream Peer
+Decode Configuration Register (UPDCR) is 0x1014. It was previously defined
+as 0x1114.
+
+d99321b63b1f ("PCI: Enable quirks for PCIe ACS on Intel PCH root ports")
+intended to enforce isolation between PCI devices allowing them to be put
+into separate IOMMU groups. Due to the wrong register offset the intended
+isolation was not fully enforced. This is fixed with this patch.
+
+Please note that I did not test this patch because I have no hardware that
+implements this register.
+
+[0] https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/4th-gen-core-family-mobile-i-o-datasheet.pdf (page 325)
+Fixes: d99321b63b1f ("PCI: Enable quirks for PCIe ACS on Intel PCH root ports")
+Link: https://lore.kernel.org/r/7a3505df-79ba-8a28-464c-88b83eefffa6@kernkonzept.com
+Signed-off-by: Steffen Liebergeld <steffen.liebergeld@kernkonzept.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Reviewed-by: Andrew Murray <andrew.murray@arm.com>
+Acked-by: Ashok Raj <ashok.raj@intel.com>
+Cc: stable@vger.kernel.org # v3.15+
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/pci/quirks.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/pci/quirks.c
++++ b/drivers/pci/quirks.c
+@@ -4706,7 +4706,7 @@ int pci_dev_specific_acs_enabled(struct
+ #define INTEL_BSPR_REG_BPPD (1 << 9)
+
+ /* Upstream Peer Decode Configuration Register */
+-#define INTEL_UPDCR_REG 0x1114
++#define INTEL_UPDCR_REG 0x1014
+ /* 5:0 Peer Decode Enable bits */
+ #define INTEL_UPDCR_REG_MASK 0x3f
+
--- /dev/null
+From e045fa29e89383c717e308609edd19d2fd29e1be Mon Sep 17 00:00:00 2001
+From: Jian-Hong Pan <jian-hong@endlessm.com>
+Date: Tue, 8 Oct 2019 11:42:39 +0800
+Subject: PCI/MSI: Fix incorrect MSI-X masking on resume
+
+From: Jian-Hong Pan <jian-hong@endlessm.com>
+
+commit e045fa29e89383c717e308609edd19d2fd29e1be upstream.
+
+When a driver enables MSI-X, msix_program_entries() reads the MSI-X Vector
+Control register for each vector and saves it in desc->masked. Each
+register is 32 bits and bit 0 is the actual Mask bit.
+
+When we restored these registers during resume, we previously set the Mask
+bit if *any* bit in desc->masked was set instead of when the Mask bit
+itself was set:
+
+ pci_restore_state
+ pci_restore_msi_state
+ __pci_restore_msix_state
+ for_each_pci_msi_entry
+ msix_mask_irq(entry, entry->masked) <-- entire u32 word
+ __pci_msix_desc_mask_irq(desc, flag)
+ mask_bits = desc->masked & ~PCI_MSIX_ENTRY_CTRL_MASKBIT
+ if (flag) <-- testing entire u32, not just bit 0
+ mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT
+ writel(mask_bits, desc_addr + PCI_MSIX_ENTRY_VECTOR_CTRL)
+
+This means that after resume, MSI-X vectors were masked when they shouldn't
+be, which leads to timeouts like this:
+
+ nvme nvme0: I/O 978 QID 3 timeout, completion polled
+
+On resume, set the Mask bit only when the saved Mask bit from suspend was
+set.
+
+This should remove the need for 19ea025e1d28 ("nvme: Add quirk for Kingston
+NVME SSD running FW E8FK11.T").
+
+[bhelgaas: commit log, move fix to __pci_msix_desc_mask_irq()]
+Link: https://bugzilla.kernel.org/show_bug.cgi?id=204887
+Link: https://lore.kernel.org/r/20191008034238.2503-1-jian-hong@endlessm.com
+Fixes: f2440d9acbe8 ("PCI MSI: Refactor interrupt masking code")
+Signed-off-by: Jian-Hong Pan <jian-hong@endlessm.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/pci/msi.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/pci/msi.c
++++ b/drivers/pci/msi.c
+@@ -213,12 +213,13 @@ u32 __pci_msix_desc_mask_irq(struct msi_
+
+ if (pci_msi_ignore_mask)
+ return 0;
++
+ desc_addr = pci_msix_desc_addr(desc);
+ if (!desc_addr)
+ return 0;
+
+ mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT;
+- if (flag)
++ if (flag & PCI_MSIX_ENTRY_CTRL_MASKBIT)
+ mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT;
+
+ writel(mask_bits, desc_addr + PCI_MSIX_ENTRY_VECTOR_CTRL);
--- /dev/null
+From 157c1062fcd86ade3c674503705033051fd3d401 Mon Sep 17 00:00:00 2001
+From: Lukas Wunner <lukas@wunner.de>
+Date: Fri, 9 Aug 2019 12:28:43 +0200
+Subject: PCI: pciehp: Avoid returning prematurely from sysfs requests
+
+From: Lukas Wunner <lukas@wunner.de>
+
+commit 157c1062fcd86ade3c674503705033051fd3d401 upstream.
+
+A sysfs request to enable or disable a PCIe hotplug slot should not
+return before it has been carried out. That is sought to be achieved by
+waiting until the controller's "pending_events" have been cleared.
+
+However the IRQ thread pciehp_ist() clears the "pending_events" before
+it acts on them. If pciehp_sysfs_enable_slot() / _disable_slot() happen
+to check the "pending_events" after they have been cleared but while
+pciehp_ist() is still running, the functions may return prematurely
+with an incorrect return value.
+
+Fix by introducing an "ist_running" flag which must be false before a sysfs
+request is allowed to return.
+
+Fixes: 32a8cef274fe ("PCI: pciehp: Enable/disable exclusively from IRQ thread")
+Link: https://lore.kernel.org/linux-pci/1562226638-54134-1-git-send-email-wangxiongfeng2@huawei.com
+Link: https://lore.kernel.org/r/4174210466e27eb7e2243dd1d801d5f75baaffd8.1565345211.git.lukas@wunner.de
+Reported-and-tested-by: Xiongfeng Wang <wangxiongfeng2@huawei.com>
+Signed-off-by: Lukas Wunner <lukas@wunner.de>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Cc: stable@vger.kernel.org # v4.19+
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/pci/hotplug/pciehp.h | 2 ++
+ drivers/pci/hotplug/pciehp_ctrl.c | 6 ++++--
+ drivers/pci/hotplug/pciehp_hpc.c | 2 ++
+ 3 files changed, 8 insertions(+), 2 deletions(-)
+
+--- a/drivers/pci/hotplug/pciehp.h
++++ b/drivers/pci/hotplug/pciehp.h
+@@ -72,6 +72,7 @@ extern int pciehp_poll_time;
+ * @reset_lock: prevents access to the Data Link Layer Link Active bit in the
+ * Link Status register and to the Presence Detect State bit in the Slot
+ * Status register during a slot reset which may cause them to flap
++ * @ist_running: flag to keep user request waiting while IRQ thread is running
+ * @request_result: result of last user request submitted to the IRQ thread
+ * @requester: wait queue to wake up on completion of user request,
+ * used for synchronous slot enable/disable request via sysfs
+@@ -101,6 +102,7 @@ struct controller {
+
+ struct hotplug_slot hotplug_slot; /* hotplug core interface */
+ struct rw_semaphore reset_lock;
++ unsigned int ist_running;
+ int request_result;
+ wait_queue_head_t requester;
+ };
+--- a/drivers/pci/hotplug/pciehp_ctrl.c
++++ b/drivers/pci/hotplug/pciehp_ctrl.c
+@@ -375,7 +375,8 @@ int pciehp_sysfs_enable_slot(struct hotp
+ ctrl->request_result = -ENODEV;
+ pciehp_request(ctrl, PCI_EXP_SLTSTA_PDC);
+ wait_event(ctrl->requester,
+- !atomic_read(&ctrl->pending_events));
++ !atomic_read(&ctrl->pending_events) &&
++ !ctrl->ist_running);
+ return ctrl->request_result;
+ case POWERON_STATE:
+ ctrl_info(ctrl, "Slot(%s): Already in powering on state\n",
+@@ -408,7 +409,8 @@ int pciehp_sysfs_disable_slot(struct hot
+ mutex_unlock(&ctrl->state_lock);
+ pciehp_request(ctrl, DISABLE_SLOT);
+ wait_event(ctrl->requester,
+- !atomic_read(&ctrl->pending_events));
++ !atomic_read(&ctrl->pending_events) &&
++ !ctrl->ist_running);
+ return ctrl->request_result;
+ case POWEROFF_STATE:
+ ctrl_info(ctrl, "Slot(%s): Already in powering off state\n",
+--- a/drivers/pci/hotplug/pciehp_hpc.c
++++ b/drivers/pci/hotplug/pciehp_hpc.c
+@@ -583,6 +583,7 @@ static irqreturn_t pciehp_ist(int irq, v
+ irqreturn_t ret;
+ u32 events;
+
++ ctrl->ist_running = true;
+ pci_config_pm_runtime_get(pdev);
+
+ /* rerun pciehp_isr() if the port was inaccessible on interrupt */
+@@ -629,6 +630,7 @@ static irqreturn_t pciehp_ist(int irq, v
+ up_read(&ctrl->reset_lock);
+
+ pci_config_pm_runtime_put(pdev);
++ ctrl->ist_running = false;
+ wake_up(&ctrl->requester);
+ return IRQ_HANDLED;
+ }
--- /dev/null
+From f2c33ccacb2d4bbeae2a255a7ca0cbfd03017b7c Mon Sep 17 00:00:00 2001
+From: Dexuan Cui <decui@microsoft.com>
+Date: Wed, 14 Aug 2019 01:06:55 +0000
+Subject: PCI/PM: Always return devices to D0 when thawing
+
+From: Dexuan Cui <decui@microsoft.com>
+
+commit f2c33ccacb2d4bbeae2a255a7ca0cbfd03017b7c upstream.
+
+pci_pm_thaw_noirq() is supposed to return the device to D0 and restore its
+configuration registers, but previously it only did that for devices whose
+drivers implemented the new power management ops.
+
+Hibernation, e.g., via "echo disk > /sys/power/state", involves freezing
+devices, creating a hibernation image, thawing devices, writing the image,
+and powering off. The fact that thawing did not return devices with legacy
+power management to D0 caused errors, e.g., in this path:
+
+ pci_pm_thaw_noirq
+ if (pci_has_legacy_pm_support(pci_dev)) # true for Mellanox VF driver
+ return pci_legacy_resume_early(dev) # ... legacy PM skips the rest
+ pci_set_power_state(pci_dev, PCI_D0)
+ pci_restore_state(pci_dev)
+ pci_pm_thaw
+ if (pci_has_legacy_pm_support(pci_dev))
+ pci_legacy_resume
+ drv->resume
+ mlx4_resume
+ ...
+ pci_enable_msix_range
+ ...
+ if (dev->current_state != PCI_D0) # <---
+ return -EINVAL;
+
+which caused these warnings:
+
+ mlx4_core a6d1:00:02.0: INTx is not supported in multi-function mode, aborting
+ PM: dpm_run_callback(): pci_pm_thaw+0x0/0xd7 returns -95
+ PM: Device a6d1:00:02.0 failed to thaw: error -95
+
+Return devices to D0 and restore config registers for all devices, not just
+those whose drivers support new power management.
+
+[bhelgaas: also call pci_restore_state() before pci_legacy_resume_early(),
+update comment, add stable tag, commit log]
+Link: https://lore.kernel.org/r/KU1P153MB016637CAEAD346F0AA8E3801BFAD0@KU1P153MB0166.APCP153.PROD.OUTLOOK.COM
+Signed-off-by: Dexuan Cui <decui@microsoft.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+Cc: stable@vger.kernel.org # v4.13+
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/pci/pci-driver.c | 17 +++++++++++------
+ 1 file changed, 11 insertions(+), 6 deletions(-)
+
+--- a/drivers/pci/pci-driver.c
++++ b/drivers/pci/pci-driver.c
+@@ -1076,17 +1076,22 @@ static int pci_pm_thaw_noirq(struct devi
+ return error;
+ }
+
+- if (pci_has_legacy_pm_support(pci_dev))
+- return pci_legacy_resume_early(dev);
+-
+ /*
+- * pci_restore_state() requires the device to be in D0 (because of MSI
+- * restoration among other things), so force it into D0 in case the
+- * driver's "freeze" callbacks put it into a low-power state directly.
++ * Both the legacy ->resume_early() and the new pm->thaw_noirq()
++ * callbacks assume the device has been returned to D0 and its
++ * config state has been restored.
++ *
++ * In addition, pci_restore_state() restores MSI-X state in MMIO
++ * space, which requires the device to be in D0, so return it to D0
++ * in case the driver's "freeze" callbacks put it into a low-power
++ * state.
+ */
+ pci_set_power_state(pci_dev, PCI_D0);
+ pci_restore_state(pci_dev);
+
++ if (pci_has_legacy_pm_support(pci_dev))
++ return pci_legacy_resume_early(dev);
++
+ if (drv && drv->pm && drv->pm->thaw_noirq)
+ error = drv->pm->thaw_noirq(dev);
+
--- /dev/null
+From 7c7e53e1c93df14690bd12c1f84730fef927a6f1 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Tue, 5 Nov 2019 19:51:29 +0900
+Subject: PCI: rcar: Fix missing MACCTLR register setting in initialization sequence
+
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+
+commit 7c7e53e1c93df14690bd12c1f84730fef927a6f1 upstream.
+
+The R-Car Gen2/3 manual - available at:
+
+https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rzg/rzg1m.html#documents
+
+"RZ/G Series User's Manual: Hardware" section
+
+strictly enforces the MACCTLR inizialization value - 39.3.1 - "Initial
+Setting of PCI Express":
+
+"Be sure to write the initial value (= H'80FF 0000) to MACCTLR before
+enabling PCIETCTLR.CFINIT".
+
+To avoid unexpected behavior and to match the SW initialization sequence
+guidelines, this patch programs the MACCTLR with the correct value.
+
+Note that the MACCTLR.SPCHG bit in the MACCTLR register description
+reports that "Only writing 1 is valid and writing 0 is invalid" but this
+"invalid" has to be interpreted as a write-ignore aka "ignored", not
+"prohibited".
+
+Reported-by: Eugeniu Rosca <erosca@de.adit-jv.com>
+Fixes: c25da4778803 ("PCI: rcar: Add Renesas R-Car PCIe driver")
+Fixes: be20bbcb0a8c ("PCI: rcar: Add the initialization of PCIe link in resume_noirq()")
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Cc: <stable@vger.kernel.org> # v5.2+
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/pci/controller/pcie-rcar.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/drivers/pci/controller/pcie-rcar.c
++++ b/drivers/pci/controller/pcie-rcar.c
+@@ -93,8 +93,11 @@
+ #define LINK_SPEED_2_5GTS (1 << 16)
+ #define LINK_SPEED_5_0GTS (2 << 16)
+ #define MACCTLR 0x011058
++#define MACCTLR_NFTS_MASK GENMASK(23, 16) /* The name is from SH7786 */
+ #define SPEED_CHANGE BIT(24)
+ #define SCRAMBLE_DISABLE BIT(27)
++#define LTSMDIS BIT(31)
++#define MACCTLR_INIT_VAL (LTSMDIS | MACCTLR_NFTS_MASK)
+ #define PMSR 0x01105c
+ #define MACS2R 0x011078
+ #define MACCGSPSETR 0x011084
+@@ -615,6 +618,8 @@ static int rcar_pcie_hw_init(struct rcar
+ if (IS_ENABLED(CONFIG_PCI_MSI))
+ rcar_pci_write_reg(pcie, 0x801f0000, PCIEMSITXR);
+
++ rcar_pci_write_reg(pcie, MACCTLR_INIT_VAL, MACCTLR);
++
+ /* Finish initialization - establish a PCI Express link */
+ rcar_pci_write_reg(pcie, CFINIT, PCIETCTLR);
+
+@@ -1237,6 +1242,7 @@ static int rcar_pcie_resume_noirq(struct
+ return 0;
+
+ /* Re-establish the PCIe link */
++ rcar_pci_write_reg(pcie, MACCTLR_INIT_VAL, MACCTLR);
+ rcar_pci_write_reg(pcie, CFINIT, PCIETCTLR);
+ return rcar_pcie_wait_for_dl(pcie);
+ }
--- /dev/null
+From 6acdf7e19b37cb3a9258603d0eab315079c19c5e Mon Sep 17 00:00:00 2001
+From: Logan Gunthorpe <logang@deltatee.com>
+Date: Tue, 10 Sep 2019 13:58:33 -0600
+Subject: PCI/switchtec: Read all 64 bits of part_event_bitmap
+
+From: Logan Gunthorpe <logang@deltatee.com>
+
+commit 6acdf7e19b37cb3a9258603d0eab315079c19c5e upstream.
+
+The part_event_bitmap register is 64 bits wide, so read it with ioread64()
+instead of the 32-bit ioread32().
+
+Fixes: 52eabba5bcdb ("switchtec: Add IOCTLs to the Switchtec driver")
+Link: https://lore.kernel.org/r/20190910195833.3891-1-logang@deltatee.com
+Reported-by: Doug Meyer <dmeyer@gigaio.com>
+Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Cc: stable@vger.kernel.org # v4.12+
+Cc: Kelvin Cao <Kelvin.Cao@microchip.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/pci/switch/switchtec.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/pci/switch/switchtec.c
++++ b/drivers/pci/switch/switchtec.c
+@@ -675,7 +675,7 @@ static int ioctl_event_summary(struct sw
+ return -ENOMEM;
+
+ s->global = ioread32(&stdev->mmio_sw_event->global_summary);
+- s->part_bitmap = ioread32(&stdev->mmio_sw_event->part_event_bitmap);
++ s->part_bitmap = ioread64(&stdev->mmio_sw_event->part_event_bitmap);
+ s->local_part = ioread32(&stdev->mmio_part_cfg->part_event_summary);
+
+ for (i = 0; i < stdev->partition_count; i++) {
--- /dev/null
+From c6a3aea93571a5393602256d8f74772bd64c8225 Mon Sep 17 00:00:00 2001
+From: Leonard Crestez <leonard.crestez@nxp.com>
+Date: Tue, 26 Nov 2019 17:17:11 +0200
+Subject: PM / QoS: Redefine FREQ_QOS_MAX_DEFAULT_VALUE to S32_MAX
+
+From: Leonard Crestez <leonard.crestez@nxp.com>
+
+commit c6a3aea93571a5393602256d8f74772bd64c8225 upstream.
+
+QOS requests for DEFAULT_VALUE are supposed to be ignored but this is
+not the case for FREQ_QOS_MAX. Adding one request for MAX_DEFAULT_VALUE
+and one for a real value will cause freq_qos_read_value to unexpectedly
+return MAX_DEFAULT_VALUE (-1).
+
+This happens because freq_qos max value is aggregated with PM_QOS_MIN
+but FREQ_QOS_MAX_DEFAULT_VALUE is (-1) so it's smaller than other
+values.
+
+Fix this by redefining FREQ_QOS_MAX_DEFAULT_VALUE to S32_MAX.
+
+Looking at current users for freq_qos it seems that none of them create
+requests for FREQ_QOS_MAX_DEFAULT_VALUE.
+
+Fixes: 77751a466ebd ("PM: QoS: Introduce frequency QoS")
+Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
+Reported-by: Matthias Kaehlcke <mka@chromium.org>
+Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
+Cc: 5.4+ <stable@vger.kernel.org> # 5.4+
+Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ include/linux/pm_qos.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/include/linux/pm_qos.h
++++ b/include/linux/pm_qos.h
+@@ -256,7 +256,7 @@ static inline s32 dev_pm_qos_raw_resume_
+ #endif
+
+ #define FREQ_QOS_MIN_DEFAULT_VALUE 0
+-#define FREQ_QOS_MAX_DEFAULT_VALUE (-1)
++#define FREQ_QOS_MAX_DEFAULT_VALUE S32_MAX
+
+ enum freq_qos_req_type {
+ FREQ_QOS_MIN = 1,
usb-fix-incorrect-dma-allocations-for-local-memory-pool-drivers.patch
+mmc-block-make-card_busy_detect-a-bit-more-generic.patch
+mmc-block-add-cmd13-polling-for-mmc-ioctls-with-r1b-response.patch
+mmc-core-drop-check-for-mmc_card_is_removable-in-mmc_rescan.patch
+mmc-core-re-work-hw-reset-for-sdio-cards.patch
+pci-switchtec-read-all-64-bits-of-part_event_bitmap.patch
+pci-pm-always-return-devices-to-d0-when-thawing.patch
+pci-pciehp-avoid-returning-prematurely-from-sysfs-requests.patch
+pci-fix-intel-acs-quirk-updcr-register-address.patch
+pci-msi-fix-incorrect-msi-x-masking-on-resume.patch
+pci-do-not-use-bus-number-zero-from-ea-capability.patch
+pci-rcar-fix-missing-macctlr-register-setting-in-initialization-sequence.patch
+pci-apply-cavium-acs-quirk-to-thunderx2-and-thunderx3.patch
+pm-qos-redefine-freq_qos_max_default_value-to-s32_max.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
