net: airoha: Select default ppe cpu port in airoha_dev_init()

Select the PPE default cpu port in airoha_dev_init routine.
This patch allows to distribute the load between the two available cpu
ports (FE_PSE_PORT_CDM1 and FE_PSE_PORT_CDM2) if the device is running a
single PPE module (e.g. 7583) selecting the cpu port based on the use
QDMA device. For multi-PPE device (e.g. 7581) assign FE_PSE_PORT_CDM1 to
PPE1 and FE_PSE_PORT_CDM2 to PPE2.

Reviewed-by: Simon Horman <horms@kernel.org>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://patch.msgid.link/20251017-an7583-eth-support-v3-10-f28319666667@kernel.org
Signed-off-by: Paolo Abeni <pabeni@redhat.com>

diff --git a/drivers/net/ethernet/airoha/airoha_eth.c b/drivers/net/ethernet/airoha/airoha_eth.c
index dea856ddf242d2c4ec3ca44796fc6deb2d784904..4e338c126dd3fa16f040960ff7f26d8214a9d6f7 100644 (file)
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
@@ -531,25 +531,6 @@ static int airoha_fe_init(struct airoha_eth *eth)
        /* disable IFC by default */
        airoha_fe_clear(eth, REG_FE_CSR_IFC_CFG, FE_IFC_EN_MASK);
 
-       airoha_fe_wr(eth, REG_PPE_DFT_CPORT0(0),
-                    FIELD_PREP(DFT_CPORT_MASK(7), FE_PSE_PORT_CDM1) |
-                    FIELD_PREP(DFT_CPORT_MASK(6), FE_PSE_PORT_CDM1) |
-                    FIELD_PREP(DFT_CPORT_MASK(5), FE_PSE_PORT_CDM1) |
-                    FIELD_PREP(DFT_CPORT_MASK(4), FE_PSE_PORT_CDM1) |
-                    FIELD_PREP(DFT_CPORT_MASK(3), FE_PSE_PORT_CDM1) |
-                    FIELD_PREP(DFT_CPORT_MASK(2), FE_PSE_PORT_CDM1) |
-                    FIELD_PREP(DFT_CPORT_MASK(1), FE_PSE_PORT_CDM1) |
-                    FIELD_PREP(DFT_CPORT_MASK(0), FE_PSE_PORT_CDM1));
-       airoha_fe_wr(eth, REG_PPE_DFT_CPORT0(1),
-                    FIELD_PREP(DFT_CPORT_MASK(7), FE_PSE_PORT_CDM2) |
-                    FIELD_PREP(DFT_CPORT_MASK(6), FE_PSE_PORT_CDM2) |
-                    FIELD_PREP(DFT_CPORT_MASK(5), FE_PSE_PORT_CDM2) |
-                    FIELD_PREP(DFT_CPORT_MASK(4), FE_PSE_PORT_CDM2) |
-                    FIELD_PREP(DFT_CPORT_MASK(3), FE_PSE_PORT_CDM2) |
-                    FIELD_PREP(DFT_CPORT_MASK(2), FE_PSE_PORT_CDM2) |
-                    FIELD_PREP(DFT_CPORT_MASK(1), FE_PSE_PORT_CDM2) |
-                    FIELD_PREP(DFT_CPORT_MASK(0), FE_PSE_PORT_CDM2));
-
        /* enable 1:N vlan action, init vlan table */
        airoha_fe_set(eth, REG_MC_VLAN_EN, MC_VLAN_EN_MASK);
 
@@ -1756,8 +1737,10 @@ static void airhoha_set_gdm2_loopback(struct airoha_gdm_port *port)
 static int airoha_dev_init(struct net_device *dev)
 {
        struct airoha_gdm_port *port = netdev_priv(dev);
-       struct airoha_eth *eth = port->qdma->eth;
-       u32 pse_port;
+       struct airoha_qdma *qdma = port->qdma;
+       struct airoha_eth *eth = qdma->eth;
+       u32 pse_port, fe_cpu_port;
+       u8 ppe_id;
 
        airoha_set_macaddr(port, dev->dev_addr);
 
@@ -1770,16 +1753,27 @@ static int airoha_dev_init(struct net_device *dev)
                fallthrough;
        case 2:
                if (airoha_ppe_is_enabled(eth, 1)) {
+                       /* For PPE2 always use secondary cpu port. */
+                       fe_cpu_port = FE_PSE_PORT_CDM2;
                        pse_port = FE_PSE_PORT_PPE2;
                        break;
                }
                fallthrough;
-       default:
+       default: {
+               u8 qdma_id = qdma - &eth->qdma[0];
+
+               /* For PPE1 select cpu port according to the running QDMA. */
+               fe_cpu_port = qdma_id ? FE_PSE_PORT_CDM2 : FE_PSE_PORT_CDM1;
                pse_port = FE_PSE_PORT_PPE1;
                break;
        }
+       }
 
        airoha_set_gdm_port_fwd_cfg(eth, REG_GDM_FWD_CFG(port->id), pse_port);
+       ppe_id = pse_port == FE_PSE_PORT_PPE2 ? 1 : 0;
+       airoha_fe_rmw(eth, REG_PPE_DFT_CPORT0(ppe_id),
+                     DFT_CPORT_MASK(port->id),
+                     fe_cpu_port << __ffs(DFT_CPORT_MASK(port->id)));
 
        return 0;
 }