--- /dev/null
+From 1aa772be0444a2bd06957f6d31865e80e6ae4244 Mon Sep 17 00:00:00 2001
+From: Francesco Dolcini <francesco.dolcini@toradex.com>
+Date: Fri, 4 Oct 2024 17:24:17 +0200
+Subject: dt-bindings: net: fec: add pps channel property
+
+From: Francesco Dolcini <francesco.dolcini@toradex.com>
+
+commit 1aa772be0444a2bd06957f6d31865e80e6ae4244 upstream.
+
+Add fsl,pps-channel property to select where to connect the PPS signal.
+This depends on the internal SoC routing and on the board, for example
+on the i.MX8 SoC it can be connected to an external pin (using channel 1)
+or to internal eDMA as DMA request (channel 0).
+
+Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
+Acked-by: Conor Dooley <conor.dooley@microchip.com>
+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+Signed-off-by: Csókás, Bence <csokas.bence@prolan.hu>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ Documentation/devicetree/bindings/net/fsl,fec.yaml | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/Documentation/devicetree/bindings/net/fsl,fec.yaml
++++ b/Documentation/devicetree/bindings/net/fsl,fec.yaml
+@@ -183,6 +183,13 @@ properties:
+ description:
+ Register bits of stop mode control, the format is <&gpr req_gpr req_bit>.
+
++ fsl,pps-channel:
++ $ref: /schemas/types.yaml#/definitions/uint32
++ default: 0
++ description:
++ Specifies to which timer instance the PPS signal is routed.
++ enum: [0, 1, 2, 3]
++
+ mdio:
+ $ref: mdio.yaml#
+ unevaluatedProperties: false
--- /dev/null
+From 566c2d83887f0570056833102adc5b88e681b0c7 Mon Sep 17 00:00:00 2001
+From: Francesco Dolcini <francesco.dolcini@toradex.com>
+Date: Fri, 4 Oct 2024 17:24:19 +0200
+Subject: net: fec: make PPS channel configurable
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Francesco Dolcini <francesco.dolcini@toradex.com>
+
+commit 566c2d83887f0570056833102adc5b88e681b0c7 upstream.
+
+Depending on the SoC where the FEC is integrated into the PPS channel
+might be routed to different timer instances. Make this configurable
+from the devicetree.
+
+When the related DT property is not present fallback to the previous
+default and use channel 0.
+
+Reviewed-by: Frank Li <Frank.Li@nxp.com>
+Tested-by: Rafael Beims <rafael.beims@toradex.com>
+Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
+Reviewed-by: Csókás, Bence <csokas.bence@prolan.hu>
+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+Signed-off-by: Csókás, Bence <csokas.bence@prolan.hu>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/net/ethernet/freescale/fec_ptp.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/ethernet/freescale/fec_ptp.c
++++ b/drivers/net/ethernet/freescale/fec_ptp.c
+@@ -523,8 +523,6 @@ static int fec_ptp_enable(struct ptp_clo
+ unsigned long flags;
+ int ret = 0;
+
+- fep->pps_channel = DEFAULT_PPS_CHANNEL;
+-
+ if (rq->type == PTP_CLK_REQ_PPS) {
+ fep->reload_period = PPS_OUPUT_RELOAD_PERIOD;
+
+@@ -706,12 +704,16 @@ void fec_ptp_init(struct platform_device
+ {
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct fec_enet_private *fep = netdev_priv(ndev);
++ struct device_node *np = fep->pdev->dev.of_node;
+ int irq;
+ int ret;
+
+ fep->ptp_caps.owner = THIS_MODULE;
+ strscpy(fep->ptp_caps.name, "fec ptp", sizeof(fep->ptp_caps.name));
+
++ fep->pps_channel = DEFAULT_PPS_CHANNEL;
++ of_property_read_u32(np, "fsl,pps-channel", &fep->pps_channel);
++
+ fep->ptp_caps.max_adj = 250000000;
+ fep->ptp_caps.n_alarm = 0;
+ fep->ptp_caps.n_ext_ts = 0;
--- /dev/null
+From bf8ca67e21671e7a56e31da45360480b28f185f1 Mon Sep 17 00:00:00 2001
+From: Francesco Dolcini <francesco.dolcini@toradex.com>
+Date: Fri, 4 Oct 2024 17:24:18 +0200
+Subject: net: fec: refactor PPS channel configuration
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Francesco Dolcini <francesco.dolcini@toradex.com>
+
+commit bf8ca67e21671e7a56e31da45360480b28f185f1 upstream.
+
+Preparation patch to allow for PPS channel configuration, no functional
+change intended.
+
+Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
+Reviewed-by: Frank Li <Frank.Li@nxp.com>
+Reviewed-by: Csókás, Bence <csokas.bence@prolan.hu>
+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+Signed-off-by: Csókás, Bence <csokas.bence@prolan.hu>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/net/ethernet/freescale/fec_ptp.c | 9 ++++-----
+ 1 file changed, 4 insertions(+), 5 deletions(-)
+
+--- a/drivers/net/ethernet/freescale/fec_ptp.c
++++ b/drivers/net/ethernet/freescale/fec_ptp.c
+@@ -84,8 +84,7 @@
+ #define FEC_CC_MULT (1 << 31)
+ #define FEC_COUNTER_PERIOD (1 << 31)
+ #define PPS_OUPUT_RELOAD_PERIOD NSEC_PER_SEC
+-#define FEC_CHANNLE_0 0
+-#define DEFAULT_PPS_CHANNEL FEC_CHANNLE_0
++#define DEFAULT_PPS_CHANNEL 0
+
+ #define FEC_PTP_MAX_NSEC_PERIOD 4000000000ULL
+ #define FEC_PTP_MAX_NSEC_COUNTER 0x80000000ULL
+@@ -524,8 +523,9 @@ static int fec_ptp_enable(struct ptp_clo
+ unsigned long flags;
+ int ret = 0;
+
++ fep->pps_channel = DEFAULT_PPS_CHANNEL;
++
+ if (rq->type == PTP_CLK_REQ_PPS) {
+- fep->pps_channel = DEFAULT_PPS_CHANNEL;
+ fep->reload_period = PPS_OUPUT_RELOAD_PERIOD;
+
+ ret = fec_ptp_enable_pps(fep, on);
+@@ -536,10 +536,9 @@ static int fec_ptp_enable(struct ptp_clo
+ if (rq->perout.flags)
+ return -EOPNOTSUPP;
+
+- if (rq->perout.index != DEFAULT_PPS_CHANNEL)
++ if (rq->perout.index != fep->pps_channel)
+ return -EOPNOTSUPP;
+
+- fep->pps_channel = DEFAULT_PPS_CHANNEL;
+ period.tv_sec = rq->perout.period.sec;
+ period.tv_nsec = rq->perout.period.nsec;
+ period_ns = timespec64_to_ns(&period);
binder-allow-freeze-notification-for-dead-nodes.patch
binder-fix-memleak-of-proc-delivered_freeze.patch
binder-add-delivered_freeze-to-debugfs-output.patch
+dt-bindings-net-fec-add-pps-channel-property.patch
+net-fec-refactor-pps-channel-configuration.patch
+net-fec-make-pps-channel-configurable.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
