+2015-06-17 Renlin Li <renlin.li@arm.com>
+
+ Applied from master.
+ 2015-04-28 Renlin Li <renlin.li@arm.com>
+ 2015-06-03 Renlin Li <renlin.li@arm.com>
+
+ * config/tc-arm.c (arm_init_frag): Always emit mapping symbols.
+
2015-06-17 Renlin Li <renlin.li@arm.com>
Applied from master.
void
arm_init_frag (fragS * fragP, int max_chars)
{
+ int frag_thumb_mode;
/* If the current ARM vs THUMB mode has not already
been recorded into this frag then do so now. */
if ((fragP->tc_frag_data.thumb_mode & MODE_RECORDED) == 0)
- {
- fragP->tc_frag_data.thumb_mode = thumb_mode | MODE_RECORDED;
+ fragP->tc_frag_data.thumb_mode = thumb_mode | MODE_RECORDED;
- /* Record a mapping symbol for alignment frags. We will delete this
- later if the alignment ends up empty. */
- switch (fragP->fr_type)
- {
- case rs_align:
- case rs_align_test:
- case rs_fill:
- mapping_state_2 (MAP_DATA, max_chars);
- break;
- case rs_align_code:
- mapping_state_2 (thumb_mode ? MAP_THUMB : MAP_ARM, max_chars);
- break;
- default:
- break;
- }
+ frag_thumb_mode = fragP->tc_frag_data.thumb_mode ^ MODE_RECORDED;
+
+
+ /* Record a mapping symbol for alignment frags. We will delete this
+ later if the alignment ends up empty. */
+ switch (fragP->fr_type)
+ {
+ case rs_align:
+ case rs_align_test:
+ case rs_fill:
+ mapping_state_2 (MAP_DATA, max_chars);
+ break;
+ case rs_align_code:
+ mapping_state_2 (frag_thumb_mode ? MAP_THUMB : MAP_ARM, max_chars);
+ break;
+ default:
+ break;
}
}
+2015-06-17 Renlin Li <renlin.li@arm.com>
+
+ Applied from master.
+ 2015-04-28 Renlin Li <renlin.li@arm.com>
+
+ * gas/arm/thumb2_vpool_be.d: Adjust the desired output.
+ * gas/arm/vldconst_be.d: Likewise.
+
2015-06-17 Renlin Li <renlin.li@arm.com>
Applied from master.
000001c8 <thumb2_ldr\+0x1c8> 0ff00fff .word 0x0ff00fff
000001cc <thumb2_ldr\+0x1cc> f0000000 .word 0xf0000000
000001d0 <thumb2_ldr\+0x1d0> ed9f 1b01 vldr d1, \[pc, #4\] ; 000001d8 <thumb2_ldr\+0x1d8>
-000001d4 <thumb2_ldr\+0x1d4> 0000 movs r0, r0
-000001d6 <thumb2_ldr\+0x1d6> 0000 movs r0, r0
+000001d4 <thumb2_ldr\+0x1d4> 00000000 .word 0x00000000
000001d8 <thumb2_ldr\+0x1d8> 0000fff0 .word 0x0000fff0
000001dc <thumb2_ldr\+0x1dc> 00000000 .word 0x00000000
000001e0 <thumb2_ldr\+0x1e0> f101 0000 add.w r0, r1, #0
00000228 <thumb2_ldr\+0x228> eddf 7a03 vldr s15, \[pc, #12\] ; 00000238 <thumb2_ldr\+0x238>
0000022c <thumb2_ldr\+0x22c> eddf 0b14 vldr d16, \[pc, #80\] ; 00000280 <thumb2_ldr\+0x280>
00000230 <thumb2_ldr\+0x230> eddf 1b15 vldr d17, \[pc, #84\] ; 00000288 <thumb2_ldr\+0x288>
-00000234 <thumb2_ldr\+0x234> 0000 movs r0, r0
-00000236 <thumb2_ldr\+0x236> 0000 movs r0, r0
+00000234 <thumb2_ldr\+0x234> 00000000 .word 0x00000000
00000238 <thumb2_ldr\+0x238> 0000fff0 .word 0x0000fff0
0000023c <thumb2_ldr\+0x23c> 00000000 .word 0x00000000
00000240 <thumb2_ldr\+0x240> ff000000 .word 0xff000000
00000388 <foo\+0x388> 0000fff0 .word 0x0000fff0
0000038c <foo\+0x38c> 00000000 .word 0x00000000
00000390 <foo\+0x390> ed9f1b00 vldr d1, \[pc\] ; 00000398 <foo\+0x398>
-00000394 <foo\+0x394> 00000000 andeq r0, r0, r0
+00000394 <foo\+0x394> 00000000 .word 0x00000000
00000398 <foo\+0x398> 0000fff0 .word 0x0000fff0
0000039c <foo\+0x39c> 00000000 .word 0x00000000
000003a0 <foo\+0x3a0> e2810000 add r0, r1, #0
000003e8 <foo\+0x3e8> eddf7a02 vldr s15, \[pc, #8\] ; 000003f8 <foo\+0x3f8>
000003ec <foo\+0x3ec> eddf0b13 vldr d16, \[pc, #76\] ; 00000440 <foo\+0x440>
000003f0 <foo\+0x3f0> eddf1b14 vldr d17, \[pc, #80\] ; 00000448 <foo\+0x448>
-000003f4 <foo\+0x3f4> 00000000 andeq r0, r0, r0
+000003f4 <foo\+0x3f4> 00000000 .word 0x00000000
000003f8 <foo\+0x3f8> 0000fff0 .word 0x0000fff0
000003fc <foo\+0x3fc> 00000000 .word 0x00000000
00000400 <foo\+0x400> ff000000 .word 0xff000000
+2015-06-17 Renlin Li <renlin.li@arm.com>
+
+ Applied from master.
+ 2015-04-29 Renlin Li <renlin.li@arm.com>
+
+ * ld-arm/ifunc-10.dd: Adjust the desired output.
+ * ld-arm/ifunc-2.dd: Likewise.
+
2015-05-05 Jiong Wang <jiong.wang@arm.com>
Apply from master:
0000a010 <tbf1>:
a010: 46f7 mov pc, lr
- a012: 0000 movs r0, r0
+ a012: 0000 .short 0x0000
a014: e1a0f00e mov pc, lr
a018: e1a0f00e mov pc, lr
a01c: e1a0f00e mov pc, lr
0000a00c <f4>:
a00c: 46f7 mov pc, lr
- a00e: 0000 movs r0, r0
+ a00e: 0000 .short 0x0000
a010: e1a0f00e mov pc, lr
a014: 46f7 mov pc, lr
- a016: 0000 movs r0, r0
+ a016: 0000 .short 0x0000
a018: e1a0f00e mov pc, lr
a01c: 46f7 mov pc, lr
\.\.\.