]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: rockchip: Switch microSD card detect to gpio on Radxa ROCK 5 ITX/5C
authorFUKAUMI Naoki <naoki@radxa.com>
Tue, 11 Nov 2025 07:17:28 +0000 (07:17 +0000)
committerHeiko Stuebner <heiko@sntech.de>
Thu, 13 Nov 2025 22:22:35 +0000 (23:22 +0100)
Due to the discussion about cd-gpios and sdmmmc_det pin functionality [1],
it would be better to use cd-gpios for now.

When the sdmmc controller runtime-suspends, the detection logic inside the
controller cannot detect anything anymore, which using the gpio variant
fixes.

The Rock 5B/5B+/5T already uses cd-gpios, so only get the pinctrl added.

[1] https://lore.kernel.org/linux-rockchip/20240912152538.1.I858c2a0bf83606c8b59ba1ab6944978a398d2ac5@changeid/

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
[amended commit description a bit and squashed the pinctrl patch]
Link: https://patch.msgid.link/20251111071730.126238-2-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts
arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts

index bc8140883de4796163eb8fabeae3dc6c45a39ef2..4c218ae6677ec11471b886258b9964ce761aae84 100644 (file)
                };
        };
 
+       mmc {
+               sdmmc_det_pin: sdmmc-det-pin {
+                       rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        pcie {
                pcie20x1_2_perstn: pcie20x1-2-perstn {
                        rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
        bus-width = <4>;
        cap-mmc-highspeed;
        cap-sd-highspeed;
+       cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
        disable-wp;
        max-frequency = <200000000>;
        no-sdio;
        no-mmc;
        pinctrl-names = "default";
-       pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>;
+       pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det_pin>;
        sd-uhs-sdr104;
        vmmc-supply = <&vcc_3v3_s3>;
        vqmmc-supply = <&vccio_sd_s0>;
index 7aac77dfc5f16521755e9d9999053594ca6826e2..a35c9469a25746ad173f57e08da133c166fc13ad 100644 (file)
                };
        };
 
+       mmc {
+               sdmmc_det_pin: sdmmc-det-pin {
+                       rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        pcie2 {
                pcie2_0_rst: pcie2-0-rst {
                        rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
        cap-sd-highspeed;
        cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
        disable-wp;
+       pinctrl-names = "default";
+       pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det_pin>;
        sd-uhs-sdr104;
        vmmc-supply = <&vcc_3v3_s3>;
        vqmmc-supply = <&vccio_sd_s0>;
index 19a08f7794e675ab7a7a8a5bf8e4073f47ec11ac..fa0dbb6b8ab7e79b155fabb801ad4b8c7bdc0ffe 100644 (file)
                };
        };
 
+       mmc {
+               sdmmc_det_pin: sdmmc-det-pin {
+                       rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        pcie {
                pow_en: pow-en {
                        rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
        max-frequency = <150000000>;
        no-sdio;
        no-mmc;
+       pinctrl-names = "default";
+       pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det_pin>;
        sd-uhs-sdr104;
        vmmc-supply = <&vcc_3v3_s0>;
        vqmmc-supply = <&vccio_sd_s0>;
index dd7317bab6135c266f5e767f5efc0fa7ae936183..b837c4e08cec075e48264e3ff9ec4ed57e978446 100644 (file)
                };
        };
 
+       mmc {
+               sdmmc_det_pin: sdmmc-det-pin {
+                       rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        pcie {
                pcie20x1_2_perstn_m0: pcie20x1-2-perstn-m0 {
                        rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
        bus-width = <4>;
        cap-mmc-highspeed;
        cap-sd-highspeed;
+       cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
        disable-wp;
        no-sdio;
        no-mmc;
+       pinctrl-names = "default";
+       pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det_pin>;
        sd-uhs-sdr104;
        vmmc-supply = <&vcc_3v3_s3>;
        vqmmc-supply = <&vccio_sd_s0>;