fixes for 4.4

Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/queue-4.4/mips-elf_hwcap-export-userspace-ases.patch b/queue-4.4/mips-elf_hwcap-export-userspace-ases.patch
new file mode 100644 (file)
index 0000000..972f521
--- /dev/null
+++ b/queue-4.4/mips-elf_hwcap-export-userspace-ases.patch
@@ -0,0 +1,87 @@
+From 27b621b79a9464c52efb81938becba2335dc5c4d Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 22 Oct 2019 00:49:54 +0800
+Subject: MIPS: elf_hwcap: Export userspace ASEs
+
+From: Jiaxun Yang <jiaxun.yang@flygoat.com>
+
+[ Upstream commit 38dffe1e4dde1d3174fdce09d67370412843ebb5 ]
+
+A Golang developer reported MIPS hwcap isn't reflecting instructions
+that the processor actually supported so programs can't apply optimized
+code at runtime.
+
+Thus we export the ASEs that can be used in userspace programs.
+
+Reported-by: Meng Zhuo <mengzhuo1203@gmail.com>
+Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
+Cc: linux-mips@vger.kernel.org
+Cc: Paul Burton <paul.burton@mips.com>
+Cc: <stable@vger.kernel.org> # 4.14+
+Signed-off-by: Paul Burton <paul.burton@mips.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/mips/include/uapi/asm/hwcap.h | 11 +++++++++++
+ arch/mips/kernel/cpu-probe.c       | 25 +++++++++++++++++++++++++
+ 2 files changed, 36 insertions(+)
+
+diff --git a/arch/mips/include/uapi/asm/hwcap.h b/arch/mips/include/uapi/asm/hwcap.h
+index c7484a7ca686d..2b6f8d569d00f 100644
+--- a/arch/mips/include/uapi/asm/hwcap.h
++++ b/arch/mips/include/uapi/asm/hwcap.h
+@@ -4,5 +4,16 @@
+ /* HWCAP flags */
+ #define HWCAP_MIPS_R6         (1 << 0)
+ #define HWCAP_MIPS_MSA                (1 << 1)
++#define HWCAP_MIPS_MIPS16     (1 << 3)
++#define HWCAP_MIPS_MDMX     (1 << 4)
++#define HWCAP_MIPS_MIPS3D   (1 << 5)
++#define HWCAP_MIPS_SMARTMIPS (1 << 6)
++#define HWCAP_MIPS_DSP      (1 << 7)
++#define HWCAP_MIPS_DSP2     (1 << 8)
++#define HWCAP_MIPS_DSP3     (1 << 9)
++#define HWCAP_MIPS_MIPS16E2 (1 << 10)
++#define HWCAP_LOONGSON_MMI  (1 << 11)
++#define HWCAP_LOONGSON_EXT  (1 << 12)
++#define HWCAP_LOONGSON_EXT2 (1 << 13)
+ 
+ #endif /* _UAPI_ASM_HWCAP_H */
+diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
+index ee71bda53d4e6..3903737e08cc8 100644
+--- a/arch/mips/kernel/cpu-probe.c
++++ b/arch/mips/kernel/cpu-probe.c
+@@ -1540,6 +1540,31 @@ void cpu_probe(void)
+               elf_hwcap |= HWCAP_MIPS_MSA;
+       }
+ 
++      if (cpu_has_mips16)
++              elf_hwcap |= HWCAP_MIPS_MIPS16;
++
++      if (cpu_has_mdmx)
++              elf_hwcap |= HWCAP_MIPS_MDMX;
++
++      if (cpu_has_mips3d)
++              elf_hwcap |= HWCAP_MIPS_MIPS3D;
++
++      if (cpu_has_smartmips)
++              elf_hwcap |= HWCAP_MIPS_SMARTMIPS;
++
++      if (cpu_has_dsp)
++              elf_hwcap |= HWCAP_MIPS_DSP;
++
++      if (cpu_has_dsp2)
++              elf_hwcap |= HWCAP_MIPS_DSP2;
++
++      if (cpu_has_loongson_mmi)
++              elf_hwcap |= HWCAP_LOONGSON_MMI;
++
++      if (cpu_has_loongson_ext)
++              elf_hwcap |= HWCAP_LOONGSON_EXT;
++
++
+       cpu_probe_vmbits(c);
+ 
+ #ifdef CONFIG_64BIT
+-- 
+2.20.1
+

diff --git a/queue-4.4/mips-treat-loongson-extensions-as-ases.patch b/queue-4.4/mips-treat-loongson-extensions-as-ases.patch
new file mode 100644 (file)
index 0000000..73cf8d5
--- /dev/null
+++ b/queue-4.4/mips-treat-loongson-extensions-as-ases.patch
@@ -0,0 +1,94 @@
+From 278095d0c766d24c15a890d7817a6c4b8bb33d44 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 22 Oct 2019 00:49:53 +0800
+Subject: MIPS: Treat Loongson Extensions as ASEs
+
+From: Jiaxun Yang <jiaxun.yang@flygoat.com>
+
+[ Upstream commit d2f965549006acb865c4638f1f030ebcefdc71f6 ]
+
+Recently, binutils had split Loongson-3 Extensions into four ASEs:
+MMI, CAM, EXT, EXT2. This patch do the samething in kernel and expose
+them in cpuinfo so applications can probe supported ASEs at runtime.
+
+Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
+Cc: Huacai Chen <chenhc@lemote.com>
+Cc: Yunqiang Su <ysu@wavecomp.com>
+Cc: stable@vger.kernel.org # v4.14+
+Signed-off-by: Paul Burton <paul.burton@mips.com>
+Cc: linux-mips@vger.kernel.org
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/mips/include/asm/cpu-features.h | 8 ++++++++
+ arch/mips/include/asm/cpu.h          | 2 ++
+ arch/mips/kernel/cpu-probe.c         | 2 ++
+ arch/mips/kernel/proc.c              | 2 ++
+ 4 files changed, 14 insertions(+)
+
+diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
+index d1e04c943f5f7..ff60510357f63 100644
+--- a/arch/mips/include/asm/cpu-features.h
++++ b/arch/mips/include/asm/cpu-features.h
+@@ -307,6 +307,14 @@
+ #define cpu_has_dsp2          (cpu_data[0].ases & MIPS_ASE_DSP2P)
+ #endif
+ 
++#ifndef cpu_has_loongson_mmi
++#define cpu_has_loongson_mmi          __ase(MIPS_ASE_LOONGSON_MMI)
++#endif
++
++#ifndef cpu_has_loongson_ext
++#define cpu_has_loongson_ext          __ase(MIPS_ASE_LOONGSON_EXT)
++#endif
++
+ #ifndef cpu_has_mipsmt
+ #define cpu_has_mipsmt                (cpu_data[0].ases & MIPS_ASE_MIPSMT)
+ #endif
+diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
+index 82ad15f110492..08cb7a5661d07 100644
+--- a/arch/mips/include/asm/cpu.h
++++ b/arch/mips/include/asm/cpu.h
+@@ -399,5 +399,7 @@ enum cpu_type_enum {
+ #define MIPS_ASE_DSP2P                0x00000040 /* Signal Processing ASE Rev 2 */
+ #define MIPS_ASE_VZ           0x00000080 /* Virtualization ASE */
+ #define MIPS_ASE_MSA          0x00000100 /* MIPS SIMD Architecture */
++#define MIPS_ASE_LOONGSON_MMI 0x00000800 /* Loongson MultiMedia extensions Instructions */
++#define MIPS_ASE_LOONGSON_EXT 0x00002000 /* Loongson EXTensions */
+ 
+ #endif /* _ASM_CPU_H */
+diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
+index 6b9064499bd3d..ee71bda53d4e6 100644
+--- a/arch/mips/kernel/cpu-probe.c
++++ b/arch/mips/kernel/cpu-probe.c
+@@ -1016,6 +1016,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
+                       __cpu_name[cpu] = "ICT Loongson-3";
+                       set_elf_platform(cpu, "loongson3a");
+                       set_isa(c, MIPS_CPU_ISA_M64R1);
++                      c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_EXT);
+                       break;
+               case PRID_REV_LOONGSON3B_R1:
+               case PRID_REV_LOONGSON3B_R2:
+@@ -1023,6 +1024,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
+                       __cpu_name[cpu] = "ICT Loongson-3";
+                       set_elf_platform(cpu, "loongson3b");
+                       set_isa(c, MIPS_CPU_ISA_M64R1);
++                      c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_EXT);
+                       break;
+               }
+ 
+diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
+index f1fab6ff53e63..33c6cdff2331e 100644
+--- a/arch/mips/kernel/proc.c
++++ b/arch/mips/kernel/proc.c
+@@ -121,6 +121,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
+       if (cpu_has_eva)        seq_printf(m, "%s", " eva");
+       if (cpu_has_htw)        seq_printf(m, "%s", " htw");
+       if (cpu_has_xpa)        seq_printf(m, "%s", " xpa");
++      if (cpu_has_loongson_mmi)       seq_printf(m, "%s", " loongson-mmi");
++      if (cpu_has_loongson_ext)       seq_printf(m, "%s", " loongson-ext");
+       seq_printf(m, "\n");
+ 
+       if (cpu_has_mmips) {
+-- 
+2.20.1
+

diff --git a/queue-4.4/series b/queue-4.4/series
index bb9f6c2f60f1b262c2c4401341d9bb0d78342664..42bee224d84b6641e59679c0d330685227c13031 100644 (file)
--- a/queue-4.4/series
+++ b/queue-4.4/series
@@ -7,3 +7,5 @@ nl80211-fix-null-pointer-dereference.patch
 mips-loongson-fix-the-link-time-qualifier-of-serial_.patch
 net-hisilicon-fix-usage-of-uninitialized-variable-in.patch
 namespace-fix-namespace.pl-script-to-support-relativ.patch
+mips-treat-loongson-extensions-as-ases.patch
+mips-elf_hwcap-export-userspace-ases.patch