Daily bump.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e4c9846d632010b49810d4aa679d172de2203bca..8eff64f75d94f79e467919a828be88d9acfc278b 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,68 @@
+2025-06-20  Andrew MacLeod  <amacleod@redhat.com>
+
+       PR tree-optimization/120701
+       * value-range.cc (irange::verify_range): Verify range pairs are
+       sorted properly.
+       (irange::snap): Check for over/underflow properly.
+
+2025-06-20  Andrew Stubbs  <ams@baylibre.com>
+
+       PR target/120722
+       * config/gcn/gcn.cc (gcn_hard_regno_mode_ok): Allow SImode in VCC_HI.
+
+2025-06-20  Jørgen Kvalsvik  <j@lambda.is>
+
+       PR gcov-profile/120634
+       * prime-paths.cc (struct auto_vec_vec): Add constructor from
+       vec.
+       (test_split_components): Use auto_vec_vec.
+       (test_scc_internal_prime_paths): Ditto.
+       (test_scc_entry_exit_paths): Ditto.
+       (test_complete_prime_paths): Ditto.
+       (test_entry_prime_paths): Ditto.
+       (test_singleton_path): Ditto.
+
+2025-06-20  Jørgen Kvalsvik  <j@lambda.is>
+
+       PR gcov-profile/120634
+       * prime-paths.cc (trie::paths): Use auto_vec.
+
+2025-06-20  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/120654
+       * vr-values.cc (range_fits_type_p): Check for undefined_p ()
+       before accessing type ().
+
+2025-06-20  H.J. Lu  <hjl.tools@gmail.com>
+
+       PR target/120708
+       * config/i386/i386-expand.cc (ix86_expand_set_or_cpymem): Use
+       MOVE_MAX to get the widest vector mode in vector loop.
+
+2025-06-20  Stafford Horne  <shorne@gmail.com>
+
+       * config/or1k/or1k.cc (or1k_noce_conversion_profitable_p): New
+       function.
+       (or1k_is_cmov_insn): New function.
+       (TARGET_NOCE_CONVERSION_PROFITABLE_P): Define macro.
+       * config/or1k/or1k.md (cbranchsi4): Convert to insn_and_split.
+       (cbranch<mode>4): Convert to insn_and_split.
+
+2025-06-20  Stafford Horne  <shorne@gmail.com>
+
+       PR target/120587
+       * config/or1k/or1k.md (zero_extendbisi2_sr_f): New expand.
+       (extendbisi2_sr_f): New expand.
+       * config/or1k/predicates.md (sr_f_reg_operand): New predicate.
+
+2025-06-20  Pan Li  <pan2.li@intel.com>
+
+       * config/riscv/riscv-v.cc (expand_vx_binary_vec_dup_vec): Add
+       new case UMIN.
+       (expand_vx_binary_vec_vec_dup): Ditto.
+       * config/riscv/riscv.cc (riscv_rtx_costs): Ditto.
+       * config/riscv/vector-iterators.md: Add new op umin.
+
 2025-06-19  Jakub Jelinek  <jakub@redhat.com>
 
        PR target/120689

diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 48356deb7cfbae5c4788ac0cf59136dc986db0c9..51152be9a3a6a8c8ebe3eda8a18da489c59db066 100644 (file)
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20250620
+20250621

diff --git a/gcc/cobol/ChangeLog b/gcc/cobol/ChangeLog
index 3ff47008db11dcf277402bdc3c30be32acc1d0af..1ffbed9fa377e8638ed799e8bfe41120ea22ffde 100644 (file)
--- a/gcc/cobol/ChangeLog
+++ b/gcc/cobol/ChangeLog
@@ -1,3 +1,14 @@
+2025-06-20  James K. Lowden  <jklowden@cobolworx.com>
+
+       PR cobol/120621
+       * genapi.cc (parser_compile_ecs): Cast argument to unsigned long.
+       (parser_compile_dcls): Same.
+       (parser_division): RAII.
+       (inspect_tally): Cast argument to unsigned long.
+       * lexio.cc (cdftext::lex_open): Cast pid_t to long.
+       * parse.y: hard-code values for old versions of Bison, and message format.
+       * scan_ante.h (wait_for_the_child): Cast pid_t to long.
+
 2025-06-18  James K. Lowden  <jklowden@cobolworx.com>
 
        PR cobol/120621

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 32e3a59168f41dc2b1cce91eccce62a8a9da9252..62394ea64f1f28d530c8ac652fef0edbc8465a2c 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,84 @@
+2025-06-20  Andrew MacLeod  <amacleod@redhat.com>
+
+       PR tree-optimization/120701
+       * gcc.dg/pr120701.c: New.
+
+2025-06-20  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/120654
+       * gcc.dg/torture/pr120654.c: New testcase.
+
+2025-06-20  H.J. Lu  <hjl.tools@gmail.com>
+
+       PR target/120708
+       * gcc.target/i386/memcpy-pr120708-1.c: New test.
+       * gcc.target/i386/memcpy-pr120708-2.c: Likewise.
+       * gcc.target/i386/memcpy-pr120708-3.c: Likewise.
+       * gcc.target/i386/memcpy-pr120708-4.c: Likewise.
+       * gcc.target/i386/memcpy-pr120708-5.c: Likewise.
+       * gcc.target/i386/memcpy-pr120708-6.c: Likewise.
+       * gcc.target/i386/memset-pr120708-1.c: Likewise.
+       * gcc.target/i386/memset-pr120708-2.c: Likewise.
+       * gcc.target/i386/memcpy-strategy-1.c: Drop dg-skip-if.  Replace
+       -march=atom with -mno-avx -msse2 -mtune=generic
+       -mtune-ctrl=^sse_typeless_stores.
+       * gcc.target/i386/memcpy-strategy-2.c: Likewise.
+       * gcc.target/i386/memcpy-vector_loop-1.c: Likewise.
+       * gcc.target/i386/memcpy-vector_loop-2.c: Likewise.
+       * gcc.target/i386/memset-vector_loop-1.c: Likewise.
+       * gcc.target/i386/memset-vector_loop-2.c: Likewise.
+
+2025-06-20  Jeff Law  <jlaw@ventanamicro.com>
+
+       * gcc.target/riscv/rvv/vsetvl/avl_single-37.c: Force rocket tuning.
+       * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c: Likewise.
+       * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c: Likewise.
+       * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c: Likewise.
+       * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c: Likewise.
+
+2025-06-20  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c: Add asm check
+       for vminu.vx combine.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c: Ditto.
+
+2025-06-20  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c: Add asm check.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h: Add test
+       helper macors.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add
+       test data for run test.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmin-run-1-u16.c: New test.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmin-run-1-u32.c: New test.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmin-run-1-u64.c: New test.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmin-run-1-u8.c: New test.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmin-run-2-u16.c: New test.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmin-run-2-u32.c: New test.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmin-run-2-u64.c: New test.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmin-run-2-u8.c: New test.
+
 2025-06-19  Jakub Jelinek  <jakub@redhat.com>
 
        PR target/120689

diff --git a/include/ChangeLog b/include/ChangeLog
index 886dab6c69cd89f469a5454c5a0b0953fc6ca73e..b11102d2588eb49a55b1c3857579dbc98ce58ffe 100644 (file)
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,10 @@
+2025-06-20  Sosutha Sethuramapandian  <ssethuramapa@marvell.com>
+
+       PR target/110181
+       * longlong.h  [__riscv] (count_leading_zeros): Define.
+       [__riscv] (count_trailing_zeros): Likewise.
+       [__riscv] (COUNT_LEADING_ZEROS_0): Likewise.
+
 2025-06-02  Tobias Burnus  <tburnus@baylibre.com>
 
        PR libgomp/120444

diff --git a/libgcobol/ChangeLog b/libgcobol/ChangeLog
index e93c521e13290d49280453370cc37a3906af1b48..e851b39af322cdf36b4d8eb3315fac39ba5bb595 100644 (file)
--- a/libgcobol/ChangeLog
+++ b/libgcobol/ChangeLog
@@ -1,3 +1,7 @@
+2025-06-20  James K. Lowden  <jklowden@cobolworx.com>
+
+       * LICENSE: New file.
+
 2025-06-16  James K. Lowden  <jklowden@cobolworx.com>
 
        PR cobol/120621