]> git.ipfire.org Git - thirdparty/binutils-gdb.git/commitdiff
This commit was manufactured by cvs2svn to create branch 'binutils-
authornobody <>
Wed, 10 Feb 2010 19:48:17 +0000 (19:48 +0000)
committernobody <>
Wed, 10 Feb 2010 19:48:17 +0000 (19:48 +0000)
2_20-branch'.

Cherrypick from master 2010-02-10 19:48:16 UTC Richard Sandiford <rdsandiford@googlemail.com> 'ld/':
    gas/testsuite/gas/arm/branch-reloc.d
    gas/testsuite/gas/arm/branch-reloc.l
    gas/testsuite/gas/arm/branch-reloc.s
    ld/ldlex-wrapper.c
    ld/testsuite/ld-arm/jump-reloc-veneers.s

gas/testsuite/gas/arm/branch-reloc.d [new file with mode: 0644]
gas/testsuite/gas/arm/branch-reloc.l [new file with mode: 0644]
gas/testsuite/gas/arm/branch-reloc.s [new file with mode: 0644]
ld/ldlex-wrapper.c [new file with mode: 0644]
ld/testsuite/ld-arm/jump-reloc-veneers.s [new file with mode: 0644]

diff --git a/gas/testsuite/gas/arm/branch-reloc.d b/gas/testsuite/gas/arm/branch-reloc.d
new file mode 100644 (file)
index 0000000..6ba322e
--- /dev/null
@@ -0,0 +1,89 @@
+#name: Inter-section branch relocations
+#This test is only valid on ELF based ports.
+#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#as: -march=armv5t
+#objdump: -rd
+#stderr: branch-reloc.l
+
+# Test the generation of relocation for inter-section branches
+
+.*: +file format.*arm.*
+
+
+Disassembly of section .text:
+
+00000000 <arm_glob_sym1-0x4>:
+   0:  e1a00000        nop                     ; \(mov r0, r0\)
+
+00000004 <arm_glob_sym1>:
+   4:  ebfffffe        bl      46 <thumb_glob_sym1>
+                       4: R_ARM_CALL   thumb_glob_sym1
+   8:  ebfffffe        bl      100 <thumb_glob_sym2>
+                       8: R_ARM_CALL   thumb_glob_sym2
+   c:  fa00000c        blx     44 <thumb_sym1>
+  10:  ebfffffe        bl      4 <arm_glob_sym1>
+                       10: R_ARM_CALL  arm_glob_sym1
+  14:  ebfffffe        bl      13c <arm_glob_sym2>
+                       14: R_ARM_CALL  arm_glob_sym2
+  18:  eb000007        bl      3c <arm_sym1>
+  1c:  fafffffe        blx     46 <thumb_glob_sym1>
+                       1c: R_ARM_CALL  thumb_glob_sym1
+  20:  fafffffe        blx     100 <thumb_glob_sym2>
+                       20: R_ARM_CALL  thumb_glob_sym2
+  24:  fa000006        blx     44 <thumb_sym1>
+  28:  fafffffe        blx     4 <arm_glob_sym1>
+                       28: R_ARM_CALL  arm_glob_sym1
+  2c:  fafffffe        blx     13c <arm_glob_sym2>
+                       2c: R_ARM_CALL  arm_glob_sym2
+  30:  eb000001        bl      3c <arm_sym1>
+  34:  e1a00000        nop                     ; \(mov r0, r0\)
+  38:  e12fff1e        bx      lr
+
+0000003c <arm_sym1>:
+  3c:  e1a00000        nop                     ; \(mov r0, r0\)
+  40:  e12fff1e        bx      lr
+
+00000044 <thumb_sym1>:
+  44:  4770            bx      lr
+
+00000046 <thumb_glob_sym1>:
+  46:  4770            bx      lr
+
+Disassembly of section foo:
+
+00000000 <thumb_glob_sym2-0x100>:
+       ...
+
+00000100 <thumb_glob_sym2>:
+ 100:  f7ff fffe       bl      4 <thumb_glob_sym2-0xfc>
+                       100: R_ARM_THM_CALL     arm_glob_sym1
+ 104:  f7ff fffe       bl      13c <arm_glob_sym2>
+                       104: R_ARM_THM_CALL     arm_glob_sym2
+ 108:  f000 e816       blx     138 <arm_sym2>
+ 10c:  f7ff fffe       bl      46 <thumb_glob_sym2-0xba>
+                       10c: R_ARM_THM_CALL     thumb_glob_sym1
+ 110:  f7ff fffe       bl      100 <thumb_glob_sym2>
+                       110: R_ARM_THM_CALL     thumb_glob_sym2
+ 114:  f000 f80e       bl      134 <thumb_sym2>
+ 118:  f7ff effe       blx     4 <thumb_glob_sym2-0xfc>
+                       118: R_ARM_THM_CALL     arm_glob_sym1
+ 11c:  f7ff effe       blx     13c <arm_glob_sym2>
+                       11c: R_ARM_THM_CALL     arm_glob_sym2
+ 120:  f000 e80a       blx     138 <arm_sym2>
+ 124:  f7ff effe       blx     46 <thumb_glob_sym2-0xba>
+                       124: R_ARM_THM_CALL     thumb_glob_sym1
+ 128:  f7ff effe       blx     100 <thumb_glob_sym2>
+                       128: R_ARM_THM_CALL     thumb_glob_sym2
+ 12c:  f000 f802       bl      134 <thumb_sym2>
+ 130:  46c0            nop                     ; \(mov r8, r8\)
+ 132:  4770            bx      lr
+
+00000134 <thumb_sym2>:
+ 134:  46c0            nop                     ; \(mov r8, r8\)
+ 136:  4770            bx      lr
+
+00000138 <arm_sym2>:
+ 138:  e12fff1e        bx      lr
+
+0000013c <arm_glob_sym2>:
+ 13c:  e12fff1e        bx      lr
diff --git a/gas/testsuite/gas/arm/branch-reloc.l b/gas/testsuite/gas/arm/branch-reloc.l
new file mode 100644 (file)
index 0000000..293cfe0
--- /dev/null
@@ -0,0 +1,3 @@
+[^:]*: Assembler messages:
+[^:]*:[0-9]*: Warning: blx to 'arm_sym1' an ARM ISA state function changed to bl
+[^:]*:[0-9]*: Warning: blx to Thumb func 'thumb_sym2' from Thumb ISA state changed to bl
\ No newline at end of file
diff --git a/gas/testsuite/gas/arm/branch-reloc.s b/gas/testsuite/gas/arm/branch-reloc.s
new file mode 100644 (file)
index 0000000..b01146e
--- /dev/null
@@ -0,0 +1,87 @@
+@ Check that non-local branches with and without mode switching
+@ produce the right relocations with appropriate in-place addends.
+
+       .syntax unified
+
+       .text
+       .arm
+       .global arm_glob_sym1
+       .global arm_glob_sym2
+       .global thumb_glob_sym1
+       .global thumb_glob_sym2
+       nop
+       .type arm_glob_sym1, %function
+arm_glob_sym1:
+       bl thumb_glob_sym1
+       bl thumb_glob_sym2
+       bl thumb_sym1
+       bl arm_glob_sym1
+       bl arm_glob_sym2
+       bl arm_sym1
+       blx thumb_glob_sym1
+       blx thumb_glob_sym2
+       blx thumb_sym1
+       blx arm_glob_sym1
+       blx arm_glob_sym2
+       blx arm_sym1
+       nop
+       bx lr
+
+       .type arm_sym1, %function
+arm_sym1:
+       nop
+       bx lr
+
+       .thumb
+       .thumb_func
+       .type thumb_sym1, %function
+thumb_sym1:
+       bx lr
+
+       .type thumb_glob_sym1, %function
+       .thumb_func
+       .thumb
+thumb_glob_sym1:
+       bx lr
+
+       .section foo,"ax"
+
+@ Add some space to avoid confusing objdump output: as we are
+@ producing a relocatable file, objdump may match an address to
+@ the wrong symbol (as symbols in different sections may have the same
+@ address in the object file).
+       .space 0x100
+
+       .type thumb_glob_sym2, %function
+       .thumb_func
+       .thumb
+thumb_glob_sym2:
+       bl arm_glob_sym1
+       bl arm_glob_sym2
+       bl arm_sym2
+       bl thumb_glob_sym1
+       bl thumb_glob_sym2
+       bl thumb_sym2
+       blx arm_glob_sym1
+       blx arm_glob_sym2
+       blx arm_sym2
+       blx thumb_glob_sym1
+       blx thumb_glob_sym2
+       blx thumb_sym2
+       nop
+       bx lr
+
+       .type thumb_sym2, %function
+thumb_sym2:
+       nop
+       bx lr
+
+       .arm
+       .type arm_sym2, %function
+arm_sym2:
+       bx lr
+
+       .global arm_glob_sym2
+       .type arm_glob_sym2, %function
+arm_glob_sym2:
+       bx lr
diff --git a/ld/ldlex-wrapper.c b/ld/ldlex-wrapper.c
new file mode 100644 (file)
index 0000000..ef2beba
--- /dev/null
@@ -0,0 +1,6 @@
+/* The flex output (ldlex.c) includes stdio.h before any of the C code
+   in ldlex.l.  Make sure we include sysdep.h first, so that config.h
+   can select the correct value of things like _FILE_OFFSET_BITS and
+   _LARGE_FILES.  */
+#include "sysdep.h"
+#include "ldlex.c"
diff --git a/ld/testsuite/ld-arm/jump-reloc-veneers.s b/ld/testsuite/ld-arm/jump-reloc-veneers.s
new file mode 100644 (file)
index 0000000..d307c08
--- /dev/null
@@ -0,0 +1,12 @@
+       .text
+       .syntax unified
+       .thumb_func
+       .global _start
+       .type _start,%function
+_start:
+       b.w dest
+
+       .section destsect, "x"
+       .thumb_func
+dest:
+       b dest