]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/amdgpu: move si_ih.c away from sid.h defines
authorAlexandre Demers <alexandre.f.demers@gmail.com>
Sat, 22 Mar 2025 01:46:47 +0000 (21:46 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 7 Apr 2025 19:18:32 +0000 (15:18 -0400)
They are properly defined under oss_1_0_d.h

Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/si_ih.c

index 53b2c3f039a8a419950de5980ca9f4e58b955b93..1df00f8a2406ac29796d30a493b1b295259e92c9 100644 (file)
@@ -214,7 +214,7 @@ static int si_ih_resume(struct amdgpu_ip_block *ip_block)
 static bool si_ih_is_idle(struct amdgpu_ip_block *ip_block)
 {
        struct amdgpu_device *adev = ip_block->adev;
-       u32 tmp = RREG32(SRBM_STATUS);
+       u32 tmp = RREG32(mmSRBM_STATUS);
 
        if (tmp & SRBM_STATUS__IH_BUSY_MASK)
                return false;
@@ -240,23 +240,23 @@ static int si_ih_soft_reset(struct amdgpu_ip_block *ip_block)
        struct amdgpu_device *adev = ip_block->adev;
 
        u32 srbm_soft_reset = 0;
-       u32 tmp = RREG32(SRBM_STATUS);
+       u32 tmp = RREG32(mmSRBM_STATUS);
 
        if (tmp & SRBM_STATUS__IH_BUSY_MASK)
                srbm_soft_reset |= SRBM_SOFT_RESET__SOFT_RESET_IH_MASK;
 
        if (srbm_soft_reset) {
-               tmp = RREG32(SRBM_SOFT_RESET);
+               tmp = RREG32(mmSRBM_SOFT_RESET);
                tmp |= srbm_soft_reset;
-               dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp);
-               WREG32(SRBM_SOFT_RESET, tmp);
-               tmp = RREG32(SRBM_SOFT_RESET);
+               dev_info(adev->dev, "mmSRBM_SOFT_RESET=0x%08X\n", tmp);
+               WREG32(mmSRBM_SOFT_RESET, tmp);
+               tmp = RREG32(mmSRBM_SOFT_RESET);
 
                udelay(50);
 
                tmp &= ~srbm_soft_reset;
-               WREG32(SRBM_SOFT_RESET, tmp);
-               tmp = RREG32(SRBM_SOFT_RESET);
+               WREG32(mmSRBM_SOFT_RESET, tmp);
+               tmp = RREG32(mmSRBM_SOFT_RESET);
 
                udelay(50);
        }