]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: renesas: r9a08g045: Add USB support
authorClaudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Thu, 23 Oct 2025 13:58:09 +0000 (16:58 +0300)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 13 Nov 2025 20:19:22 +0000 (21:19 +0100)
Add USB nodes for the Renesas RZ/G3S SoC. This consists of PHY reset,
host and device support.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://patch.msgid.link/20251023135810.1688415-7-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r9a08g045.dtsi

index dd9c9c33d9d60ebf74f315ade10f7b9273d2e762..876de634908ef63a93a8e8d887e50ac240e9fe8f 100644 (file)
                        status = "disabled";
                };
 
+               phyrst: usbphy-ctrl@11e00000 {
+                       compatible = "renesas,r9a08g045-usbphy-ctrl";
+                       reg = <0 0x11e00000 0 0x10000>;
+                       clocks = <&cpg CPG_MOD R9A08G045_USB_PCLK>;
+                       resets = <&cpg R9A08G045_USB_PRESETN>;
+                       power-domains = <&cpg>;
+                       #reset-cells = <1>;
+                       renesas,sysc-pwrrdy = <&sysc 0xd70 0x1>;
+                       status = "disabled";
+
+                       usb0_vbus_otg: regulator-vbus {
+                               regulator-name = "vbus";
+                       };
+               };
+
+               ohci0: usb@11e10000 {
+                       compatible = "generic-ohci";
+                       reg = <0 0x11e10000 0 0x100>;
+                       interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD R9A08G045_USB_PCLK>,
+                                <&cpg CPG_MOD R9A08G045_USB_U2H0_HCLK>;
+                       resets = <&phyrst 0>,
+                                <&cpg R9A08G045_USB_U2H0_HRESETN>;
+                       phys = <&usb2_phy0 1>;
+                       phy-names = "usb";
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
+               ohci1: usb@11e30000 {
+                       compatible = "generic-ohci";
+                       reg = <0 0x11e30000 0 0x100>;
+                       interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD R9A08G045_USB_PCLK>,
+                                <&cpg CPG_MOD R9A08G045_USB_U2H1_HCLK>;
+                       resets = <&phyrst 1>,
+                                <&cpg R9A08G045_USB_U2H1_HRESETN>;
+                       phys = <&usb2_phy1 1>;
+                       phy-names = "usb";
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
+               ehci0: usb@11e10100 {
+                       compatible = "generic-ehci";
+                       reg = <0 0x11e10100 0 0x100>;
+                       interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD R9A08G045_USB_PCLK>,
+                                <&cpg CPG_MOD R9A08G045_USB_U2H0_HCLK>;
+                       resets = <&phyrst 0>,
+                                <&cpg R9A08G045_USB_U2H0_HRESETN>;
+                       phys = <&usb2_phy0 2>;
+                       phy-names = "usb";
+                       companion = <&ohci0>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
+               ehci1: usb@11e30100 {
+                       compatible = "generic-ehci";
+                       reg = <0 0x11e30100 0 0x100>;
+                       interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD R9A08G045_USB_PCLK>,
+                                <&cpg CPG_MOD R9A08G045_USB_U2H1_HCLK>;
+                       resets = <&phyrst 1>,
+                                <&cpg R9A08G045_USB_U2H1_HRESETN>;
+                       phys = <&usb2_phy1 2>;
+                       phy-names = "usb";
+                       companion = <&ohci1>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
+               usb2_phy0: usb-phy@11e10200 {
+                       compatible = "renesas,usb2-phy-r9a08g045";
+                       reg = <0 0x11e10200 0 0x700>;
+                       interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD R9A08G045_USB_PCLK>,
+                                <&cpg CPG_MOD R9A08G045_USB_U2H0_HCLK>;
+                       resets = <&phyrst 0>,
+                                <&cpg R9A08G045_USB_U2H0_HRESETN>;
+                       #phy-cells = <1>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
+               usb2_phy1: usb-phy@11e30200 {
+                       compatible = "renesas,usb2-phy-r9a08g045";
+                       reg = <0 0x11e30200 0 0x700>;
+                       interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD R9A08G045_USB_PCLK>,
+                                <&cpg CPG_MOD R9A08G045_USB_U2H1_HCLK>;
+                       resets = <&phyrst 1>,
+                                <&cpg R9A08G045_USB_U2H1_HRESETN>;
+                       #phy-cells = <1>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
+               hsusb: usb@11e20000 {
+                       compatible = "renesas,usbhs-r9a08g045",
+                                    "renesas,rzg2l-usbhs";
+                       reg = <0 0x11e20000 0 0x10000>;
+                       interrupts = <GIC_SPI 85 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD R9A08G045_USB_PCLK>,
+                                <&cpg CPG_MOD R9A08G045_USB_U2P_EXR_CPUCLK>;
+                       resets = <&phyrst 0>,
+                                <&cpg R9A08G045_USB_U2P_EXL_SYSRST>;
+                       renesas,buswait = <7>;
+                       phys = <&usb2_phy0 3>;
+                       phy-names = "usb";
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
                gic: interrupt-controller@12400000 {
                        compatible = "arm,gic-v3";
                        #interrupt-cells = <3>;