Drop arm64-dts-qcom-sm8350-switch-ufs-qmp-phy-to-new-styl.patch

Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/queue-6.6/arm64-dts-qcom-sm8350-switch-ufs-qmp-phy-to-new-styl.patch b/queue-6.6/arm64-dts-qcom-sm8350-switch-ufs-qmp-phy-to-new-styl.patch
deleted file mode 100644 (file)
index 12ad144..0000000
--- a/queue-6.6/arm64-dts-qcom-sm8350-switch-ufs-qmp-phy-to-new-styl.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From 075c6286a240e25ec942780ef5d99bb0a5bb257c Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Tue, 5 Dec 2023 06:25:51 +0300
-Subject: arm64: dts: qcom: sm8350: switch UFS QMP PHY to new style of bindings
-
-From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-
-[ Upstream commit 002a13ed10136e4f59013adbf097b31d608caf67 ]
-
-Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
-resource region, no per-PHY subnodes).
-
-Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
-Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-Link: https://lore.kernel.org/r/20231205032552.1583336-9-dmitry.baryshkov@linaro.org
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Stable-dep-of: 8edbdefee1c9 ("arm64: dts: qcom: sm8350: Fix UFS PHY clocks")
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/qcom/sm8350.dtsi | 28 ++++++++++------------------
- 1 file changed, 10 insertions(+), 18 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
-index 5ed464c37422d..6e0318a0c4ea4 100644
---- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
-+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
-@@ -676,9 +676,9 @@ gcc: clock-controller@100000 {
-                                <0>,
-                                <0>,
-                                <0>,
--                               <&ufs_mem_phy_lanes 0>,
--                               <&ufs_mem_phy_lanes 1>,
--                               <&ufs_mem_phy_lanes 2>,
-+                               <&ufs_mem_phy 0>,
-+                               <&ufs_mem_phy 1>,
-+                               <&ufs_mem_phy 2>,
-                                <&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>,
-                                <0>;
-               };
-@@ -1678,7 +1678,7 @@ ufs_mem_hc: ufshc@1d84000 {
-                                    "jedec,ufs-2.0";
-                       reg = <0 0x01d84000 0 0x3000>;
-                       interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
--                      phys = <&ufs_mem_phy_lanes>;
-+                      phys = <&ufs_mem_phy>;
-                       phy-names = "ufsphy";
-                       lanes-per-direction = <2>;
-                       #reset-cells = <1>;
-@@ -1722,10 +1722,8 @@ ufs_mem_hc: ufshc@1d84000 {
- 
-               ufs_mem_phy: phy@1d87000 {
-                       compatible = "qcom,sm8350-qmp-ufs-phy";
--                      reg = <0 0x01d87000 0 0x1c4>;
--                      #address-cells = <2>;
--                      #size-cells = <2>;
--                      ranges;
-+                      reg = <0 0x01d87000 0 0x1000>;
-+
-                       clock-names = "ref",
-                                     "ref_aux";
-                       clocks = <&rpmhcc RPMH_CXO_CLK>,
-@@ -1733,17 +1731,11 @@ ufs_mem_phy: phy@1d87000 {
- 
-                       resets = <&ufs_mem_hc 0>;
-                       reset-names = "ufsphy";
--                      status = "disabled";
- 
--                      ufs_mem_phy_lanes: phy@1d87400 {
--                              reg = <0 0x01d87400 0 0x188>,
--                                    <0 0x01d87600 0 0x200>,
--                                    <0 0x01d87c00 0 0x200>,
--                                    <0 0x01d87800 0 0x188>,
--                                    <0 0x01d87a00 0 0x200>;
--                              #clock-cells = <1>;
--                              #phy-cells = <0>;
--                      };
-+                      #clock-cells = <1>;
-+                      #phy-cells = <0>;
-+
-+                      status = "disabled";
-               };
- 
-               cryptobam: dma-controller@1dc4000 {
--- 
-2.43.0
-

diff --git a/queue-6.6/series b/queue-6.6/series
index 0fc8a0ef5a0db0afb5a6e068b2fa12c085e13a1b..e53b620811c2531a8c3ccbdffc8860b94a5b4704 100644 (file)
--- a/queue-6.6/series
+++ b/queue-6.6/series
@@ -187,7 +187,6 @@ arm64-dts-qcom-msm8998-switch-usb-qmp-phy-to-new-sty.patch
 arm64-dts-qcom-msm8998-declare-vls-clamp-register-fo.patch
 arm64-dts-qcom-qcm2290-declare-vls-clamp-register-fo.patch
 arm64-dts-qcom-sm6115-declare-vls-clamp-register-for.patch
-arm64-dts-qcom-sm8350-switch-ufs-qmp-phy-to-new-styl.patch
 arm64-dts-qcom-sm8550-fix-ufs-phy-clocks.patch
 wifi-ath12k-fix-incorrect-logic-of-calculating-vdev_.patch
 printk-disable-passing-console-lock-owner-completely.patch

diff --git a/queue-6.7/arm64-dts-qcom-sm8350-switch-ufs-qmp-phy-to-new-styl.patch b/queue-6.7/arm64-dts-qcom-sm8350-switch-ufs-qmp-phy-to-new-styl.patch
deleted file mode 100644 (file)
index c57a406..0000000
--- a/queue-6.7/arm64-dts-qcom-sm8350-switch-ufs-qmp-phy-to-new-styl.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From 880369e216f961cf020da91da9585f428eff3391 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Tue, 5 Dec 2023 06:25:51 +0300
-Subject: arm64: dts: qcom: sm8350: switch UFS QMP PHY to new style of bindings
-
-From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-
-[ Upstream commit 002a13ed10136e4f59013adbf097b31d608caf67 ]
-
-Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
-resource region, no per-PHY subnodes).
-
-Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
-Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-Link: https://lore.kernel.org/r/20231205032552.1583336-9-dmitry.baryshkov@linaro.org
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Stable-dep-of: 8edbdefee1c9 ("arm64: dts: qcom: sm8350: Fix UFS PHY clocks")
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/qcom/sm8350.dtsi | 28 ++++++++++------------------
- 1 file changed, 10 insertions(+), 18 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
-index a72f3c470089b..19172ed7ec2be 100644
---- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
-+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
-@@ -677,9 +677,9 @@ gcc: clock-controller@100000 {
-                                <0>,
-                                <0>,
-                                <0>,
--                               <&ufs_mem_phy_lanes 0>,
--                               <&ufs_mem_phy_lanes 1>,
--                               <&ufs_mem_phy_lanes 2>,
-+                               <&ufs_mem_phy 0>,
-+                               <&ufs_mem_phy 1>,
-+                               <&ufs_mem_phy 2>,
-                                <&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>,
-                                <0>;
-               };
-@@ -1679,7 +1679,7 @@ ufs_mem_hc: ufshc@1d84000 {
-                                    "jedec,ufs-2.0";
-                       reg = <0 0x01d84000 0 0x3000>;
-                       interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
--                      phys = <&ufs_mem_phy_lanes>;
-+                      phys = <&ufs_mem_phy>;
-                       phy-names = "ufsphy";
-                       lanes-per-direction = <2>;
-                       #reset-cells = <1>;
-@@ -1723,10 +1723,8 @@ ufs_mem_hc: ufshc@1d84000 {
- 
-               ufs_mem_phy: phy@1d87000 {
-                       compatible = "qcom,sm8350-qmp-ufs-phy";
--                      reg = <0 0x01d87000 0 0x1c4>;
--                      #address-cells = <2>;
--                      #size-cells = <2>;
--                      ranges;
-+                      reg = <0 0x01d87000 0 0x1000>;
-+
-                       clock-names = "ref",
-                                     "ref_aux";
-                       clocks = <&rpmhcc RPMH_CXO_CLK>,
-@@ -1734,17 +1732,11 @@ ufs_mem_phy: phy@1d87000 {
- 
-                       resets = <&ufs_mem_hc 0>;
-                       reset-names = "ufsphy";
--                      status = "disabled";
- 
--                      ufs_mem_phy_lanes: phy@1d87400 {
--                              reg = <0 0x01d87400 0 0x188>,
--                                    <0 0x01d87600 0 0x200>,
--                                    <0 0x01d87c00 0 0x200>,
--                                    <0 0x01d87800 0 0x188>,
--                                    <0 0x01d87a00 0 0x200>;
--                              #clock-cells = <1>;
--                              #phy-cells = <0>;
--                      };
-+                      #clock-cells = <1>;
-+                      #phy-cells = <0>;
-+
-+                      status = "disabled";
-               };
- 
-               cryptobam: dma-controller@1dc4000 {
--- 
-2.43.0
-

diff --git a/queue-6.7/series b/queue-6.7/series
index de7000bdb98edfc2dcca9fceafaf74974de29a50..a5b0864cb3e6304071fbe8b30c7bc01c7db8d237 100644 (file)
--- a/queue-6.7/series
+++ b/queue-6.7/series
@@ -212,7 +212,6 @@ arm64-dts-qcom-msm8998-switch-usb-qmp-phy-to-new-sty.patch
 arm64-dts-qcom-msm8998-declare-vls-clamp-register-fo.patch
 arm64-dts-qcom-qcm2290-declare-vls-clamp-register-fo.patch
 arm64-dts-qcom-sm6115-declare-vls-clamp-register-for.patch
-arm64-dts-qcom-sm8350-switch-ufs-qmp-phy-to-new-styl.patch
 arm64-dts-qcom-sm8550-fix-ufs-phy-clocks.patch
 wifi-ath12k-fix-incorrect-logic-of-calculating-vdev_.patch
 printk-nbcon-relocate-32bit-seq-macros.patch