]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
AArch64: Implement target hooks for dispatch scheduling.
authorJennifer Schmitz <jschmitz@nvidia.com>
Wed, 17 Sep 2025 10:22:12 +0000 (03:22 -0700)
committerJennifer Schmitz <jschmitz@nvidia.com>
Wed, 24 Sep 2025 14:18:28 +0000 (16:18 +0200)
This patch adds dispatch scheduling for AArch64 by implementing the two target
hooks TARGET_SCHED_DISPATCH and TARGET_SCHED_DISPATCH_DO.

The motivation for this is that cores with out-of-order processing do
most of the reordering to avoid pipeline hazards on the hardware side
using large reorder buffers. For such cores, rather than scheduling
around instruction latencies and throughputs, the compiler should aim to
maximize the utilized dispatch bandwidth by inserting a certain
instruction mix into the frontend dispatch window.

In the following, we will describe the overall implementation:
Recall that the Haifa scheduler makes the following 6 types of queries to
a dispatch scheduling model:
1) targetm.sched.dispatch (NULL, IS_DISPATCH_ON)
2) targetm.sched.dispatch_do (NULL, DISPATCH_INIT)
3) targetm.sched.dispatch (insn, FITS_DISPATCH_WINDOW)
4) targetm.sched.dispatch_do (insn, ADD_TO_DISPATCH_WINDOW)
5) targetm.sched.dispatch (NULL, DISPATCH_VIOLATION)
6) targetm.sched.dispatch (insn, IS_CMP)

For 1), we created the new tune flag AARCH64_EXTRA_TUNE_DISPATCH_SCHED.

For 2-5), we modeled dispatch scheduling using the class dispatch_window.
A dispatch_window object represents the window of operations that is dispatched
per cycle. It contains the two arrays max_slots and free_slots (the length
of the arrays is the number of dispatch constraints specified for a core)
to keep track of the available slots.
The dispatch_window class exposes functions to ask whether a given
instruction would fit into the dispatch_window or to add an instruction to
the window.
The model operates using only one dispatch_window object that is constructed
when 2) is called. Upon construction, it copies the number of available slots
given in the tuning model (more details on the changes to tune_params below).
During scheduling, instructions are added according to the dispatch
constraints. For that, the dispatch_window queries the tuning model using a
callback function that takes an insn as input and returns a vector of
pairs (a, b), where a is the index of the constraint and b is the number of
slots occupied.
The dispatch_window checks if the instruction fits into the current
window. If not, i.e. the current window is full, the free_slots array is
reset to max_slots. Then the dispatch_window deducts b slots from
free_slots[a] for each pair (a, b) in the vector returned by the callback.
A dispatch violation occurs when the number of free slots becomes negative
for any dispatch_constraint.

For 6), return false (see comment in aarch64-sched-dispatch.cc).

Dispatch information for a core can be added in its tuning model. We added
the new field *dispatch_constraint to the struct tune_params that holds a
pointer to a struct dispatch_constraints_info.
All current tuning models were initialized with nullptr.
(In the next patch, dispatch information will be added for Neoverse V2.)

The patch was bootstrapped and tested on aarch64-linux-gnu, no regression.

Signed-off-by: Jennifer Schmitz <jschmitz@nvidia.com>
gcc/ChangeLog:

* config.gcc: Add aarch64-sched-dispatch.o to extra_objs.
* config/aarch64/aarch64-protos.h (struct tune_params): New
field for dispatch scheduling.
(struct dispatch_constraint_info): New struct for dispatch scheduling.
* config/aarch64/aarch64-tuning-flags.def
(AARCH64_EXTRA_TUNING_OPTION): New flag to enable dispatch scheduling.
* config/aarch64/aarch64.cc (TARGET_SCHED_DISPATCH): Implement
target hook.
(TARGET_SCHED_DISPATCH_DO): Likewise.
(aarch64_override_options_internal): Add check for definition of
dispatch constraints if dispatch-scheduling tune flag is set.
* config/aarch64/t-aarch64: Add aarch64-sched-dispatch.o.
* config/aarch64/tuning_models/a64fx.h: Initialize fields for
dispatch scheduling in tune_params.
* config/aarch64/tuning_models/ampere1.h: Likewise.
* config/aarch64/tuning_models/ampere1a.h: Likewise.
* config/aarch64/tuning_models/ampere1b.h: Likewise.
* config/aarch64/tuning_models/cortexa35.h: Likewise.
* config/aarch64/tuning_models/cortexa53.h: Likewise.
* config/aarch64/tuning_models/cortexa57.h: Likewise.
* config/aarch64/tuning_models/cortexa72.h: Likewise.
* config/aarch64/tuning_models/cortexa73.h: Likewise.
* config/aarch64/tuning_models/cortexx925.h: Likewise.
* config/aarch64/tuning_models/emag.h: Likewise.
* config/aarch64/tuning_models/exynosm1.h: Likewise.
* config/aarch64/tuning_models/fujitsu_monaka.h: Likewise.
* config/aarch64/tuning_models/generic.h: Likewise.
* config/aarch64/tuning_models/generic_armv8_a.h: Likewise.
* config/aarch64/tuning_models/generic_armv9_a.h: Likewise.
* config/aarch64/tuning_models/neoverse512tvb.h: Likewise.
* config/aarch64/tuning_models/neoversen1.h: Likewise.
* config/aarch64/tuning_models/neoversen2.h: Likewise.
* config/aarch64/tuning_models/neoversen3.h: Likewise.
* config/aarch64/tuning_models/neoversev1.h: Likewise.
* config/aarch64/tuning_models/neoversev2.h: Likewise.
* config/aarch64/tuning_models/neoversev3.h: Likewise.
* config/aarch64/tuning_models/neoversev3ae.h: Likewise.
* config/aarch64/tuning_models/olympus.h: Likewise.
* config/aarch64/tuning_models/qdf24xx.h: Likewise.
* config/aarch64/tuning_models/saphira.h: Likewise.
* config/aarch64/tuning_models/thunderx.h: Likewise.
* config/aarch64/tuning_models/thunderx2t99.h: Likewise.
* config/aarch64/tuning_models/thunderx3t110.h: Likewise.
* config/aarch64/tuning_models/thunderxt88.h: Likewise.
* config/aarch64/tuning_models/tsv110.h: Likewise.
* config/aarch64/tuning_models/xgene1.h: Likewise.
* config/aarch64/aarch64-sched-dispatch.cc: New file for
dispatch scheduling for aarch64.
* config/aarch64/aarch64-sched-dispatch.h: New header file.

40 files changed:
gcc/config.gcc
gcc/config/aarch64/aarch64-protos.h
gcc/config/aarch64/aarch64-sched-dispatch.cc [new file with mode: 0644]
gcc/config/aarch64/aarch64-sched-dispatch.h [new file with mode: 0644]
gcc/config/aarch64/aarch64-tuning-flags.def
gcc/config/aarch64/aarch64.cc
gcc/config/aarch64/t-aarch64
gcc/config/aarch64/tuning_models/a64fx.h
gcc/config/aarch64/tuning_models/ampere1.h
gcc/config/aarch64/tuning_models/ampere1a.h
gcc/config/aarch64/tuning_models/ampere1b.h
gcc/config/aarch64/tuning_models/cortexa35.h
gcc/config/aarch64/tuning_models/cortexa53.h
gcc/config/aarch64/tuning_models/cortexa57.h
gcc/config/aarch64/tuning_models/cortexa72.h
gcc/config/aarch64/tuning_models/cortexa73.h
gcc/config/aarch64/tuning_models/cortexx925.h
gcc/config/aarch64/tuning_models/emag.h
gcc/config/aarch64/tuning_models/exynosm1.h
gcc/config/aarch64/tuning_models/fujitsu_monaka.h
gcc/config/aarch64/tuning_models/generic.h
gcc/config/aarch64/tuning_models/generic_armv8_a.h
gcc/config/aarch64/tuning_models/generic_armv9_a.h
gcc/config/aarch64/tuning_models/neoverse512tvb.h
gcc/config/aarch64/tuning_models/neoversen1.h
gcc/config/aarch64/tuning_models/neoversen2.h
gcc/config/aarch64/tuning_models/neoversen3.h
gcc/config/aarch64/tuning_models/neoversev1.h
gcc/config/aarch64/tuning_models/neoversev2.h
gcc/config/aarch64/tuning_models/neoversev3.h
gcc/config/aarch64/tuning_models/neoversev3ae.h
gcc/config/aarch64/tuning_models/olympus.h
gcc/config/aarch64/tuning_models/qdf24xx.h
gcc/config/aarch64/tuning_models/saphira.h
gcc/config/aarch64/tuning_models/thunderx.h
gcc/config/aarch64/tuning_models/thunderx2t99.h
gcc/config/aarch64/tuning_models/thunderx3t110.h
gcc/config/aarch64/tuning_models/thunderxt88.h
gcc/config/aarch64/tuning_models/tsv110.h
gcc/config/aarch64/tuning_models/xgene1.h

index 7c2f5bed8f6a92fb7704246583e0dcd2c2c494c9..9c8f4d05330b79157bf3f061194db5f7bf6b11c1 100644 (file)
@@ -351,7 +351,7 @@ aarch64*-*-*)
        c_target_objs="aarch64-c.o"
        cxx_target_objs="aarch64-c.o"
        d_target_objs="aarch64-d.o"
-       extra_objs="aarch64-builtins.o aarch-common.o aarch64-elf-metadata.o aarch64-sve-builtins.o aarch64-sve-builtins-shapes.o aarch64-sve-builtins-base.o aarch64-sve-builtins-sve2.o aarch64-sve-builtins-sme.o cortex-a57-fma-steering.o aarch64-speculation.o aarch-bti-insert.o aarch64-early-ra.o aarch64-ldp-fusion.o"
+       extra_objs="aarch64-builtins.o aarch-common.o aarch64-elf-metadata.o aarch64-sve-builtins.o aarch64-sve-builtins-shapes.o aarch64-sve-builtins-base.o aarch64-sve-builtins-sve2.o aarch64-sve-builtins-sme.o cortex-a57-fma-steering.o aarch64-speculation.o aarch-bti-insert.o aarch64-early-ra.o aarch64-ldp-fusion.o aarch64-sched-dispatch.o"
        target_gtfiles="\$(srcdir)/config/aarch64/aarch64-protos.h \$(srcdir)/config/aarch64/aarch64-builtins.h \$(srcdir)/config/aarch64/aarch64-builtins.cc \$(srcdir)/config/aarch64/aarch64-sve-builtins.h \$(srcdir)/config/aarch64/aarch64-sve-builtins.cc"
        target_has_targetm_common=yes
        ;;
index 56efcf2c7f2c88a65089bedaefc36763a87a4fb8..a9e407ba340ee1dd85c0a9aef351a70f29a25543 100644 (file)
@@ -581,6 +581,9 @@ struct tune_params
 
   /* Define models for the aarch64_ldp_stp_policy.  */
   enum aarch64_ldp_stp_policy ldp_policy_model, stp_policy_model;
+
+  /* Dispatch constraints for instruction scheduling.  */
+  const struct dispatch_constraint_info *dispatch_constraints;
 };
 
 /* Classifies an address.
@@ -654,6 +657,14 @@ enum aarch64_extra_tuning_flags_index
   AARCH64_EXTRA_TUNE_index_END
 };
 
+/* Dispatch constraints configuration for instruction scheduling.  */
+struct dispatch_constraint_info
+{
+  const int *max_slots;
+  int num_constraints;
+  vec<std::pair<int, int>> (*callback) (rtx_insn *);
+};
+
 
 #define AARCH64_EXTRA_TUNING_OPTION(x, name) \
   AARCH64_EXTRA_TUNE_##name = (1u << AARCH64_EXTRA_TUNE_##name##_index),
diff --git a/gcc/config/aarch64/aarch64-sched-dispatch.cc b/gcc/config/aarch64/aarch64-sched-dispatch.cc
new file mode 100644 (file)
index 0000000..1f8c651
--- /dev/null
@@ -0,0 +1,229 @@
+/* Dispatch scheduling hooks for AArch64.
+   Copyright The GNU Toolchain Authors.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include "backend.h"
+#include "rtl.h"
+#include "insn-attr.h"
+#include "insn-attr-common.h"
+#include "aarch64-protos.h"
+#include "aarch64-sched-dispatch.h"
+#include "regset.h"
+#include "sched-int.h"
+#include "dumpfile.h"
+#include "print-rtl.h"
+
+/* This file implements the target hooks for dispatch scheduling for AArch64.
+   Instructions are scheduled into the current dispatch window according to
+   dispatch constraints provided by the tuning model.
+
+   To enable dispatch scheduling for a core (see Neoverse V2 for an example):
+   - in the tuning model, add the AARCH64_EXTRA_TUNE_DISPATCH_SCHED tune flag
+   - in the tuning model, add an array of max slot counts for each constraint
+     and add its reference and length to the tune_params struct
+   - in the tuning model, add a callback function to determine slot requirements
+   - optionally, create a new instruction attribute to classify instructions
+     into dispatch groups (e.g. neoversev2_dispatch)  */
+
+static dispatch_window *current_dispatch_window;
+
+/* Constructor for class dispatch_window.  */
+dispatch_window::dispatch_window (const dispatch_constraint_info &constraint_info)
+  : m_max_slots (constraint_info.max_slots),
+    m_num_constraints (constraint_info.num_constraints),
+    m_callback (constraint_info.callback),
+    m_violation (false)
+{
+  m_free_slots = XNEWVEC (int, m_num_constraints);
+  reset_constraints ();
+}
+
+/* Destructor for class dispatch_window.  */
+dispatch_window::~dispatch_window ()
+{
+  XDELETEVEC (m_free_slots);
+}
+
+/* Return TRUE iff the given constraints fit into the dispatch window.  */
+bool
+dispatch_window::fits_window (rtx_insn *insn,
+                             const vec<std::pair<int, int>> &constraints) const
+{
+  if (INSN_CODE (insn) < 0)
+    return true;
+
+  if (dump_file)
+    {
+      fprintf (dump_file, "Checking if insn fits into dispatch window:\n");
+      print_rtl_single (dump_file, insn);
+    }
+
+  for (const auto &constraint : constraints)
+    {
+      if (constraint.second > m_free_slots[constraint.first])
+       {
+         if (dump_file && (dump_flags & TDF_DETAILS))
+           {
+             fprintf (dump_file, "Constraint %d needs %d slot(s), "
+                      "only %d free.\n",
+                      constraint.first, constraint.second,
+                      m_free_slots[constraint.first]);
+           }
+         return false;
+       }
+    }
+  return true;
+}
+
+/* Get the constraints for an instruction.  */
+vec<std::pair<int, int>>
+dispatch_window::get_constraints (rtx_insn *insn) const
+{
+  return m_callback (insn);
+}
+
+/* Add INSN to the dispatch window and set the violation flag
+   if there is a constraint violation.  */
+void
+dispatch_window::add_insn_to_window (rtx_insn *insn)
+{
+  if (INSN_CODE (insn) < 0)
+    return;
+
+  auto constraints = m_callback (insn);
+
+  if (!fits_window (insn, constraints))
+    {
+      if (dump_file)
+       fprintf (dump_file, "Window full. Starting new dispatch window.\n");
+      reset_constraints ();
+    }
+
+  for (const auto &constraint : constraints)
+    {
+      m_free_slots[constraint.first] -= constraint.second;
+      if (m_free_slots[constraint.first] < 0)
+       m_violation = true;
+    }
+
+  if (dump_file)
+    {
+      fprintf (dump_file, "Insn added to dispatch window.\n");
+      if (dump_flags & TDF_DETAILS)
+       print_window (dump_file);
+    }
+}
+
+/* Return TRUE iff there is a dispatch violation, i.e. one of the dispatch
+   constraints has a negative number of free slots.  */
+bool
+dispatch_window::has_violation () const
+{
+  return m_violation;
+}
+
+/* Print information about the dispatch window to the given FILE.  */
+void
+dispatch_window::print_window (FILE *file) const
+{
+  fprintf (file, "==== Current dispatch window ====\n");
+  fprintf (file, "Violation: %s\n", m_violation ? "true" : "false");
+  for (int i = 0; i < m_num_constraints; i++)
+    {
+      fprintf (file, "Constraint %d: %d of %d slots free\n",
+              i, m_free_slots[i], m_max_slots[i]);
+    }
+  fprintf (file, "\n");
+}
+
+/* For all dispatch constraints, reset the number of free slots to the
+   maximum number of slots.
+   This is called when the next dispatch window is started.  */
+void
+dispatch_window::reset_constraints ()
+{
+  for (int i = 0; i < m_num_constraints; i++)
+    m_free_slots[i] = m_max_slots[i];
+  m_violation = false;
+}
+
+/* Initialize the dispatch window using the constraints from the tuning model.
+   This is called once at the beginning of scheduling.  */
+void
+init_dispatch_window (void)
+{
+  const struct dispatch_constraint_info *dispatch_constraints
+    = aarch64_tune_params.dispatch_constraints;
+  current_dispatch_window = new dispatch_window (*dispatch_constraints);
+
+  if (dump_file)
+    {
+      fprintf (dump_file, "DISPATCH WINDOW INITIALIZED\n");
+      if (dump_flags & TDF_DETAILS)
+       current_dispatch_window->print_window (dump_file);
+    }
+}
+
+/* The next two functions implement the dispatch-scheduling target hooks
+   for aarch64 and are the drivers of the dispatch scheduler.  */
+void
+aarch64_sched_dispatch_do (rtx_insn *insn, int mode)
+{
+  if (mode == DISPATCH_INIT)
+    init_dispatch_window ();
+  else if (mode == ADD_TO_DISPATCH_WINDOW && current_dispatch_window)
+    current_dispatch_window->add_insn_to_window (insn);
+}
+
+bool
+aarch64_sched_dispatch (rtx_insn *insn, int action)
+{
+  /* We only want dispatch scheduling to be enabled during the last
+     scheduling pass, i.e. after reload and sched_fusion.  */
+  if ((aarch64_tune_params.extra_tuning_flags
+       & AARCH64_EXTRA_TUNE_DISPATCH_SCHED)
+      && reload_completed && !sched_fusion)
+    switch (action)
+      {
+      case IS_DISPATCH_ON:
+       return true;
+
+      /* IS_CMP may be used to delay scheduling of flag setting instructions
+        to keep them close to their consumers, e.g. branches at the end of a BB.
+        However, we don't want to delay scheduling of flag setting instructions,
+        because many consumers are not branches.  */
+      case IS_CMP:
+       return false;
+
+      case DISPATCH_VIOLATION:
+       return current_dispatch_window->has_violation ();
+
+      case FITS_DISPATCH_WINDOW:
+       {
+         auto constraints = current_dispatch_window->get_constraints (insn);
+         return current_dispatch_window->fits_window (insn, constraints);
+       }
+
+      default:
+       return false;
+      }
+  return false;
+}
\ No newline at end of file
diff --git a/gcc/config/aarch64/aarch64-sched-dispatch.h b/gcc/config/aarch64/aarch64-sched-dispatch.h
new file mode 100644 (file)
index 0000000..4b588e8
--- /dev/null
@@ -0,0 +1,52 @@
+/* Dispatch scheduling hooks for AArch64.
+   Copyright The GNU Toolchain Authors.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef GCC_AARCH64_SCHED_DISPATCH_H
+#define GCC_AARCH64_SCHED_DISPATCH_H
+
+void aarch64_sched_dispatch_do (rtx_insn *, int);
+bool aarch64_sched_dispatch (rtx_insn *, int);
+
+/* Describes a dispatch window and keeps track of the dispatch constraints.
+   The constraints are represented as array of slot counts, where each
+   index corresponds to a dispatch constraint type. */
+class dispatch_window
+{
+public:
+  dispatch_window (const dispatch_constraint_info &constraint_info);
+  ~dispatch_window ();
+
+  bool fits_window (rtx_insn *insn,
+                   const vec<std::pair<int, int>> &constraints) const;
+  vec<std::pair<int, int>> get_constraints (rtx_insn *) const;
+  void add_insn_to_window (rtx_insn *);
+  bool has_violation () const;
+  void print_window (FILE *) const;
+
+private:
+  void reset_constraints ();
+
+  const int *m_max_slots;
+  int *m_free_slots;
+  const int m_num_constraints;
+  vec<std::pair<int, int>> (*const m_callback) (rtx_insn *);
+  bool m_violation;
+};
+
+#endif /* GCC_AARCH64_SCHED_DISPATCH_H */
index dd91324e9c8063c6aa4b032838426ee499604eef..9c9af451b8e38f6a0016676454d6a04adde60e7f 100644 (file)
@@ -69,4 +69,7 @@ AARCH64_EXTRA_TUNING_OPTION ("cheap_fpmr_write", CHEAP_FPMR_WRITE)
 #define AARCH64_EXTRA_TUNE_BASE (AARCH64_EXTRA_TUNE_CHEAP_SHIFT_EXTEND \
                                 | AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA)
 
+/* Enables dispatch scheduling.  */
+AARCH64_EXTRA_TUNING_OPTION ("dispatch_sched", DISPATCH_SCHED)
+
 #undef AARCH64_EXTRA_TUNING_OPTION
index 7a99b7f519328e9c67107126fd2ba7bc6d7c3152..9ccee4b8f3fa31ee0698f9abe5eaed20dc3e9da3 100644 (file)
@@ -98,6 +98,7 @@
 #include "ipa-prop.h"
 #include "ipa-fnsummary.h"
 #include "hash-map.h"
+#include "aarch64-sched-dispatch.h"
 
 /* This file should be included last.  */
 #include "target-def.h"
@@ -19251,6 +19252,12 @@ aarch64_override_options_internal (struct gcc_options *opts)
     SET_OPTION_IF_UNSET (opts, &global_options_set, param_fully_pipelined_fma,
                         1);
 
+  /* If dispatch scheduling is enabled, the dispatch_constraints in the
+     tune_params struct must be defined.  */
+  if (aarch64_tune_params.extra_tuning_flags
+      & AARCH64_EXTRA_TUNE_DISPATCH_SCHED)
+    gcc_assert (aarch64_tune_params.dispatch_constraints != NULL);
+
   /* TODO: SME codegen without SVE2 is not supported, once this support is added
      remove this 'sorry' and the implicit enablement of SVE2 in the checks for
      streaming mode above in this function.  */
@@ -32466,6 +32473,12 @@ aarch64_libgcc_floating_mode_supported_p
 #undef TARGET_SCHED_REASSOCIATION_WIDTH
 #define TARGET_SCHED_REASSOCIATION_WIDTH aarch64_reassociation_width
 
+#undef TARGET_SCHED_DISPATCH
+#define TARGET_SCHED_DISPATCH aarch64_sched_dispatch
+
+#undef TARGET_SCHED_DISPATCH_DO
+#define TARGET_SCHED_DISPATCH_DO aarch64_sched_dispatch_do
+
 #undef TARGET_DWARF_FRAME_REG_MODE
 #define TARGET_DWARF_FRAME_REG_MODE aarch64_dwarf_frame_reg_mode
 
index 63ca8e90c9d1d2fca263dd8c2db6762c3a651abe..71242f05b09141c6ae4f869f96e2562c7359c623 100644 (file)
@@ -202,6 +202,14 @@ aarch64-ldp-fusion.o: $(srcdir)/config/aarch64/aarch64-ldp-fusion.cc \
        $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
                $(srcdir)/config/aarch64/aarch64-ldp-fusion.cc
 
+aarch64-sched-dispatch.o: $(srcdir)/config/aarch64/aarch64-sched-dispatch.cc \
+    $(CONFIG_H) $(SYSTEM_H) $(CORETYPES_H) $(BACKEND_H) $(RTL_H) \
+    $(INSN_ATTR_H) $(REGSET_H) sched-int.h $(DUMPFILE_H) \
+    $(srcdir)/config/aarch64/aarch64-protos.h \
+    $(srcdir)/config/aarch64/aarch64-sched-dispatch.h
+       $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
+               $(srcdir)/config/aarch64/aarch64-sched-dispatch.cc
+
 comma=,
 MULTILIB_OPTIONS    = $(subst $(comma),/, $(patsubst %, mabi=%, $(subst $(comma),$(comma)mabi=,$(TM_MULTILIB_CONFIG))))
 MULTILIB_DIRNAMES   = $(subst $(comma), ,$(TM_MULTILIB_CONFIG))
index 2622cd80346f692d16139423b018323271ada6f7..3aa578126055782273dcd7a5c1a95a4e9498f041 100644 (file)
@@ -165,7 +165,8 @@ static const struct tune_params a64fx_tunings =
   (AARCH64_EXTRA_TUNE_NONE),   /* tune_flags.  */
   &a64fx_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_A64FX.  */
index f033016d010ff96ccd0b0538bbd05a2fcf1b6f77..52503d5e16acb6c867ed4b51649859c06453f7a8 100644 (file)
@@ -105,7 +105,8 @@ static const struct tune_params ampere1_tunings =
    | AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA), /* tune_flags.  */
   &ampere1_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALIGNED,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALIGNED    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALIGNED,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_AMPERE1.  */
index 41481a7f077d5f42562b06bb259fa9d32bbc3599..ebce521aba1b1866ec39bdf9e0d49d9be95754e3 100644 (file)
@@ -57,7 +57,8 @@ static const struct tune_params ampere1a_tunings =
    | AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA), /* tune_flags.  */
   &ampere1_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALIGNED,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALIGNED    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALIGNED,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_AMPERE1A.  */
index 2ad6003d65c1b89f561f44de1d05bebfd273e007..baca72139ecd2f70afb92c4434ae87cd5c84f313 100644 (file)
@@ -106,7 +106,8 @@ static const struct tune_params ampere1b_tunings =
    | AARCH64_EXTRA_TUNE_AVOID_CROSS_LOOP_FMA), /* tune_flags.  */
   &ampere1b_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALIGNED,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALIGNED    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALIGNED,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_AMPERE1B */
index 56168c8ebc656ce69e311a4ac4e1f37a8ab7334c..7dc1006b4e7f4a8255ac455ba05dbdfba37ee8c2 100644 (file)
@@ -56,7 +56,8 @@ static const struct tune_params cortexa35_tunings =
   (AARCH64_EXTRA_TUNE_NONE),   /* tune_flags.  */
   &generic_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_CORTEXA35.  */
index 83daae4d38ccddeb3d82fb0d7aea7c029fecaa31..fad352a39c911c97717c189842cb52ba812a85fc 100644 (file)
@@ -65,7 +65,8 @@ static const struct tune_params cortexa53_tunings =
   (AARCH64_EXTRA_TUNE_NONE),   /* tune_flags.  */
   &generic_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_CORTEXA53.  */
index 8da7fa9d80df983c640c1870d2f4de6c35808760..dcfa70bb8a2a4a5dbd4675244194e6a8b222cfd5 100644 (file)
@@ -102,7 +102,8 @@ static const struct tune_params cortexa57_tunings =
   (AARCH64_EXTRA_TUNE_RENAME_FMA_REGS),        /* tune_flags.  */
   &generic_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_CORTEXA57.  */
index f9a330f4a184eb7b4e6036e848c687bad8040080..a9cb20a6e8be663e5102dfd9beefbbacb3859501 100644 (file)
@@ -54,7 +54,8 @@ static const struct tune_params cortexa72_tunings =
   (AARCH64_EXTRA_TUNE_NONE),   /* tune_flags.  */
   &generic_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_CORTEXA72.  */
index 038fd0896b92eb3fd333d4df9b85bf552373f698..d77a501221ecf7fb00c8015f8fdd0f5195b95091 100644 (file)
@@ -55,7 +55,8 @@ static const struct tune_params cortexa73_tunings =
   (AARCH64_EXTRA_TUNE_NONE),   /* tune_flags.  */
   &generic_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 
index f448493b1bc5a2751c9e8444190d7574db05a802..71cc8f0190b1b1422043fb365fc161f2d74a841e 100644 (file)
@@ -226,7 +226,8 @@ static const struct tune_params cortexx925_tunings =
    | AARCH64_EXTRA_TUNE_AVOID_LDAPUR), /* tune_flags.  */
   &generic_armv9a_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS           /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_CORTEXX925.  */
index 264a28102998348d7cc4093c9b9ad34df6b6a5d8..dbd84e9805b80b4f4a4a150135e03c9ab0165929 100644 (file)
@@ -54,7 +54,8 @@ static const struct tune_params emag_tunings =
   (AARCH64_EXTRA_TUNE_NONE),   /* tune_flags.  */
   &xgene1_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_EMAG.  */
index 71876df7785e1450c19e39f20a04048ae1b9712e..0a88f51c08ce9515d282feb7caabe6359b0e5404 100644 (file)
@@ -138,7 +138,8 @@ static const struct tune_params exynosm1_tunings =
   (AARCH64_EXTRA_TUNE_NONE), /* tune_flags.  */
   &exynosm1_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_EXYNOSM1.  */
index 5dc40243fe3846feffb8c54dd98d1797b45b672c..0643b852dc5e9ac0c4b5f1c949711f5e030e7224 100644 (file)
@@ -58,7 +58,8 @@ static const struct tune_params fujitsu_monaka_tunings =
    | AARCH64_EXTRA_TUNE_MATCHED_VECTOR_THROUGHPUT),    /* tune_flags.  */
   &generic_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS           /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_FUJITSU_MONAKA.  */
index a822c055fe99775c12f121e6186e460dbf90f84f..4a880b99673c6be6950c8c832f393f29b6406998 100644 (file)
@@ -186,7 +186,8 @@ static const struct tune_params generic_tunings =
   (AARCH64_EXTRA_TUNE_CSE_SVE_VL_CONSTANTS),   /* tune_flags.  */
   &generic_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_GENERIC.  */
index 01080cade464a6fa86d5815649a1190740d6f1fd..a448d046db7a7194b786fa9528990fdbc2d37105 100644 (file)
@@ -186,7 +186,8 @@ static const struct tune_params generic_armv8_a_tunings =
    | AARCH64_EXTRA_TUNE_MATCHED_VECTOR_THROUGHPUT),    /* tune_flags.  */
   &generic_armv8_a_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_GENERIC_ARMV8_A.  */
index 9eb1a20d3c4e5d5a3b6c8bf8a2c341a82ac8f7da..3bbffb4ae583bed0af2e840492e4fb46ef6269e8 100644 (file)
@@ -254,7 +254,8 @@ static const struct tune_params generic_armv9_a_tunings =
    | AARCH64_EXTRA_TUNE_MATCHED_VECTOR_THROUGHPUT),    /* tune_flags.  */
   &generic_armv9a_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS           /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_GENERIC_ARMV9_A.  */
index 964b4ac284a895cbea4bf889894dd662374f0d2a..58297d013c611a631c4df52aa959e6d33a3984d1 100644 (file)
@@ -161,7 +161,8 @@ static const struct tune_params neoverse512tvb_tunings =
    | AARCH64_EXTRA_TUNE_AVOID_PRED_RMW),       /* tune_flags.  */
   &generic_armv9a_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS           /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_NEOVERSE512TVB.  */
index 9dc37bd7fd6d626bf5883c12908dbcf4f22e11e2..bce5677940ab48959e216fd021e32f8957465a9b 100644 (file)
@@ -54,7 +54,8 @@ static const struct tune_params neoversen1_tunings =
   (AARCH64_EXTRA_TUNE_BASE),   /* tune_flags.  */
   &generic_armv9a_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_NEOVERSEN1.  */
index 9fbc059ea12ce6c0f881c5ebe05c60165183d51b..29ec4040cb3b2d43a140f42959d92abfd5b5b016 100644 (file)
@@ -223,7 +223,8 @@ static const struct tune_params neoversen2_tunings =
    | AARCH64_EXTRA_TUNE_AVOID_PRED_RMW),       /* tune_flags.  */
   &generic_armv9a_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS           /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_NEOVERSEN2.  */
index 78177e78e0700282aceb30920cba581f2b0912d0..bade1a440a28c887f7f5c41ccedf6ad057ee8788 100644 (file)
@@ -222,7 +222,8 @@ static const struct tune_params neoversen3_tunings =
    | AARCH64_EXTRA_TUNE_MATCHED_VECTOR_THROUGHPUT),    /* tune_flags.  */
   &generic_armv9a_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS           /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_NEOVERSEN3.  */
index f1ec7dcdda7bdd09db69b3717f7dc0569fec9b16..4e9f66b1f1b3f9de994f31ff3989923a4b9f8734 100644 (file)
@@ -232,7 +232,8 @@ static const struct tune_params neoversev1_tunings =
    | AARCH64_EXTRA_TUNE_AVOID_PRED_RMW),       /* tune_flags.  */
   &generic_armv9a_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 
index 266d8f190a250fa0dcde97b778ce320be20d4452..4e5219fe75be2773875355ae8c5567c98c6401f1 100644 (file)
@@ -224,7 +224,8 @@ static const struct tune_params neoversev2_tunings =
    | AARCH64_EXTRA_TUNE_AVOID_LDAPUR), /* tune_flags.  */
   &generic_armv9a_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS           /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_NEOVERSEV2.  */
index f5566d270dacaec05a658fcba1bdc10f8a1304c8..296d033fbe48b2204fc3c5b8fd977abe42ad6fc5 100644 (file)
@@ -224,7 +224,8 @@ static const struct tune_params neoversev3_tunings =
    | AARCH64_EXTRA_TUNE_AVOID_LDAPUR), /* tune_flags.  */
   &generic_armv9a_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS           /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_NEOVERSEV3.  */
index 5796e52a266724e0e4295ad6868c49dd91faa491..f0fc21c293f4749ac2dc18d2adb11fca906c1a7e 100644 (file)
@@ -224,7 +224,8 @@ static const struct tune_params neoversev3ae_tunings =
    | AARCH64_EXTRA_TUNE_AVOID_LDAPUR), /* tune_flags.  */
   &generic_armv9a_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS           /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_NEOVERSEV3AE.  */
index 268789db019a49eadef5a8490d633af15b94956c..d19aca8c323dda9373b5c0a8362a12c2b581eb21 100644 (file)
@@ -204,7 +204,8 @@ static struct tune_params olympus_tunings =
    | AARCH64_EXTRA_TUNE_AVOID_PRED_RMW),       /* tune_flags.  */
   &olympus_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS           /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_OLYMPUS.  */
index 583d30a4d17e1005096ba18bdceb31c52779d517..328d8d45559297d52cbd6b6e2018513b0c4b2d08 100644 (file)
@@ -130,7 +130,8 @@ static const struct tune_params qdf24xx_tunings =
   (AARCH64_EXTRA_TUNE_NONE), /* tune_flags.  */
   &qdf24xx_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_QDF24XX.  */
index 684f3951a603016d7a6624a530019199f04afb0c..03cfcb0107b455b1fd448b7050d779b6633e96ed 100644 (file)
@@ -56,7 +56,8 @@ static const struct tune_params saphira_tunings =
   (AARCH64_EXTRA_TUNE_NONE),           /* tune_flags.  */
   &generic_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_SAPHIRA.  */
index d79c1391b8c44eef1a3766a8af7007404796a694..1386d6ad28cdfef20c0cfb3a09ff55d121741442 100644 (file)
@@ -111,7 +111,8 @@ static const struct tune_params thunderx_tunings =
   (AARCH64_EXTRA_TUNE_CHEAP_SHIFT_EXTEND),     /* tune_flags.  */
   &thunderx_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALIGNED,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALIGNED    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALIGNED,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_THUNDERX.  */
index 513c61580841fdc04a1eb1ed480d93ae84c2da77..495cf86b162d21ced144ec77050de5f8b7caa446 100644 (file)
@@ -131,7 +131,8 @@ static const struct tune_params thunderx2t99_tunings =
   (AARCH64_EXTRA_TUNE_NONE),   /* tune_flags.  */
   &thunderx2t99_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_THUNDERX2T99.  */
index a2547b8e54de861fa1056f329f0ab8b94338658a..2bb6b39eb6622fbac8073bffefa77eb9bbd97676 100644 (file)
@@ -130,7 +130,8 @@ static const struct tune_params thunderx3t110_tunings =
   (AARCH64_EXTRA_TUNE_NONE),   /* tune_flags.  */
   &thunderx3t110_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_THUNDERX3T110.  */
index 6be5c526fc120f13a4bb25c6b42b48b08cd5c29e..881712bd3f10333b21b338db1fb8d6879f05db57 100644 (file)
@@ -66,7 +66,8 @@ static const struct tune_params thunderxt88_tunings =
   (AARCH64_EXTRA_TUNE_NONE),   /* tune_flags.  */
   &thunderxt88_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALIGNED,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALIGNED    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALIGNED,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_THUNDERXT88.  */
index 458286e0e80db5228f13fd42c0ede5dd0a51e91e..c24204edf244fd4fe8aa6465696d044bc7603fbb 100644 (file)
@@ -131,7 +131,8 @@ static const struct tune_params tsv110_tunings =
   (AARCH64_EXTRA_TUNE_NONE),     /* tune_flags.  */
   &tsv110_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_TSV110.  */
index b4f01ee92f541288be8d0a02f47f5c4869981bb1..5c7954a16e7e62899932a60c0bd8c0841a10462b 100644 (file)
@@ -139,7 +139,8 @@ static const struct tune_params xgene1_tunings =
   (AARCH64_EXTRA_TUNE_NONE),   /* tune_flags.  */
   &xgene1_prefetch_tune,
   AARCH64_LDP_STP_POLICY_ALWAYS,   /* ldp_policy_model.  */
-  AARCH64_LDP_STP_POLICY_ALWAYS    /* stp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS,   /* stp_policy_model.  */
+  nullptr      /* dispatch_constraints.  */
 };
 
 #endif /* GCC_AARCH64_H_XGENE1.  */