}
-/* Implement TARGET_STARTING_FRAME_OFFSET. */
+/* Implement `TARGET_STARTING_FRAME_OFFSET'. */
/* This is the offset from the frame pointer register to the first stack slot
that contains a variable living in the frame. */
}
+/* Implement `TARGET_CAN_ELIMINATE'. */
/* Return true if register FROM can be eliminated via register TO. */
static bool
return !avr_naked_function_p (decl);
}
+
+/* Worker function for `INITIAL_ELIMINATION_OFFSET'. */
/* Compute offset between arg_pointer and frame_pointer. */
int
}
+/* Worker function for `INCOMING_RETURN_ADDR_RTX'. */
/* Return contents of MEM at frame pointer + stack size + 1 (+2 if 3-byte PC).
This is return address of function. */
}
-/* Implement `EPILOGUE_USES'. */
+/* Worker function for `EPILOGUE_USES'. */
int
avr_epilogue_uses (int regno ATTRIBUTE_UNUSED)
}
-/* Implement TARGET_USE_BY_PIECES_INFRASTRUCTURE_P. */
-
+/* Implement `TARGET_USE_BY_PIECES_INFRASTRUCTURE_P'. */
/* Prefer sequence of loads/stores for moves of size upto
two - two pairs of load/store instructions are always better
than the 5 instruction sequence for a loop (1 instruction
(void) avr_addr_space_supported_p (as, loc);
}
-/* Implement `TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID. Zero is a valid
+
+/* Implement `TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID'. Zero is a valid
address in all address spaces. Even in ADDR_SPACE_FLASH1 etc..,
a zero address is valid and means 0x<RAMPZ val>0000, where RAMPZ is
set to the appropriate segment value. */
return true;
}
+
/* Look if DECL shall be placed in program memory space by
means of attribute `progmem' or some address-space qualifier.
Return non-zero if DECL is data that must end up in Flash and
&& avr_2word_insn_p (next_active_insn (insn))));
}
-/* Implement TARGET_HARD_REGNO_NREGS. CCmode is four units for historical
+
+/* Implement `TARGET_HARD_REGNO_NREGS'. CCmode is four units for historical
reasons. If this hook is not defined, TARGET_HARD_REGNO_NREGS
reports that CCmode requires four registers.
Define this hook to allow CCmode to fit in a single REG_CC. For
}
-/* Implement TARGET_HARD_REGNO_MODE_OK. On the enhanced core, anything
+/* Implement `TARGET_HARD_REGNO_MODE_OK'. On the enhanced core, anything
larger than 1 byte must start in even numbered register for "movw" to
work (this way we don't have to check for odd registers everywhere). */
}
-/* Implement TARGET_HARD_REGNO_CALL_PART_CLOBBERED. */
+/* Implement `TARGET_HARD_REGNO_CALL_PART_CLOBBERED'. */
static bool
avr_hard_regno_call_part_clobbered (unsigned, unsigned regno,
return "";
}
+
/* Worker function for `TARGET_ASM_CONSTRUCTOR'. */
static void
}
-/* Worker function for `TARGET_RETURN_IN_MEMORY'. */
+/* Implement `TARGET_RETURN_IN_MEMORY'. */
static bool
avr_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
/* Implement `TARGET_LEGITIMATE_COMBINED_INSN'. */
-
/* PR78883: Filter out paradoxical SUBREGs of MEM which are not handled
properly by following passes. As INSN_SCHEDULING is off and hence
general_operand accepts such expressions, ditch them now. */
return NULL_TREE;
}
+
+/* Implement `TARGET_MD_ASM_ADJUST'. */
/* Prepend to CLOBBERS hard registers that are automatically clobbered
for an asm. We do this for CC_REGNUM to maintain source compatibility
with the original cc0-based compiler. */