gcc.target/i386: Replace long with long long

Since long is 64-bit for x32, replace long with long long for x32.

	* gcc.target/i386/bmi2-pr112526.c: Replace long with long long.
	* gcc.target/i386/pr105854.c: Likewise.
	* gcc.target/i386/pr112943.c: Likewise.
	* gcc.target/i386/pr67325.c: Likewise.
	* gcc.target/i386/pr97971.c: Likewise.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>

diff --git a/gcc/testsuite/gcc.target/i386/bmi2-pr112526.c b/gcc/testsuite/gcc.target/i386/bmi2-pr112526.c
index 7a3c6f14982fbf7c7840693964ce557ff3557e6e..4bcedd5ca0646f344833d207787d1f546cecdb6a 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/bmi2-pr112526.c
+++ b/gcc/testsuite/gcc.target/i386/bmi2-pr112526.c
@@ -5,9 +5,10 @@
 #include "bmi2-check.h"
 
 __attribute__((noipa)) void
-foo (unsigned long x, unsigned __int128 *y, unsigned long z, unsigned long *w)
+foo (unsigned long long x, unsigned __int128 *y, unsigned long long z,
+     unsigned long long *w)
 {
-  register unsigned long a __asm ("%r10") = x + z;
+  register unsigned long long a __asm ("%r10") = x + z;
   register unsigned __int128 b __asm ("%r8") = ((unsigned __int128) a) * 257342423UL;
   asm volatile ("" : "+r" (b));
   asm volatile ("" : "+d" (a));
@@ -19,7 +20,7 @@ static void
 bmi2_test ()
 {
   unsigned __int128 y;
-  unsigned long w;
+  unsigned long long w;
   foo (10268318293806702989UL, &y, 4702524958196331333UL, &w);
   if (y != ((((unsigned __int128) 0xc72d2c9UL) << 64) | 0x9586adfdc95b225eUL)
       || w != 14970843252003034322UL)

diff --git a/gcc/testsuite/gcc.target/i386/pr105854.c b/gcc/testsuite/gcc.target/i386/pr105854.c
index 36a8080b8a7919046a1541b45c72e2cd931b2fb3..326485c20566847ee09bfe9b2f00b18303606a00 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr105854.c
+++ b/gcc/testsuite/gcc.target/i386/pr105854.c
@@ -29,5 +29,5 @@ foo (void)
   d += 0.;
   U u0 = u + u + u1 + (U) d;
   V v0 = ((X)u0)[0] + v + v;
-  t = (T) (long) (__int128) v0 + t + t + t1;
+  t = (T) (long long) (__int128) v0 + t + t + t1;
 }

diff --git a/gcc/testsuite/gcc.target/i386/pr112943.c b/gcc/testsuite/gcc.target/i386/pr112943.c
index b1840a1f4628f3379dd42816da5fc1fac349d1c1..de2771a3cabf468f81e3da3ed07851f21a2364dd 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr112943.c
+++ b/gcc/testsuite/gcc.target/i386/pr112943.c
@@ -14,7 +14,7 @@ typedef _Decimal64 d64;
 char foo0_u8_0;
 v8u8 foo0_v8u8_0;
 __attribute__((__vector_size__(sizeof(char)))) char foo0_v8s8_0;
-__attribute__((__vector_size__(sizeof(long)))) unsigned long v64u64_0;
+__attribute__((__vector_size__(sizeof(long long)))) unsigned long long v64u64_0;
 _Float16 foo0_f16_0;
 v128f16 foo0_v128f16_0;
 double foo0_f64_0;
@@ -56,7 +56,7 @@ void foo0() {
                    })v16u8_r)
     .b +
       foo0_v8u8_0 + v8u8_1 + foo0_v8s8_0;
-    long u64_r = u128_r + foo0_f64_0 + (unsigned long)foo0__0;
+    long long u64_r = u128_r + foo0_f64_0 + (unsigned long long)foo0__0;
     short u16_r = u64_r + foo0_f16_0;
     char u8_r = u16_r + foo0_u8_0;
     *foo0_ret = v8u8_r + u8_r;

diff --git a/gcc/testsuite/gcc.target/i386/pr67325.c b/gcc/testsuite/gcc.target/i386/pr67325.c
index c3c1e4c5b4de22c3d43e4beaade351904ffe8a0c..7fe0fd7232bd5dd290c5155daa0e63e637d4a8d3 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr67325.c
+++ b/gcc/testsuite/gcc.target/i386/pr67325.c
@@ -2,6 +2,6 @@
 /* { dg-options "-O2" } */
 /* { dg-final { scan-assembler-not "(?:sar|shr)" } } */
 
-int f(long*l){
+int f(long long*l){
   return *l>>32;
 }

diff --git a/gcc/testsuite/gcc.target/i386/pr97971.c b/gcc/testsuite/gcc.target/i386/pr97971.c
index d07a31097c6bcfb8eaf5e525aee22f22eda5ed87..031e4c94de80348a3c05149b7bc836e7c046890b 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr97971.c
+++ b/gcc/testsuite/gcc.target/i386/pr97971.c
@@ -5,7 +5,7 @@
 int
 foo (void)
 {
-  register _Complex long a asm ("rax");
+  register _Complex long long a asm ("rax");
   register int b asm ("rdx");
   asm ("# %0 %1" : "=&r" (a), "=r" (b));       /* { dg-error "inconsistent operand constraints in an 'asm'" } */
   return a;