rs6000.md (ctrdi*): Add FPR constraint and associated splitter.

2002-04-02  Alan Modra  <amodra@bigpond.net.au>

        * config/rs6000/rs6000.md (ctrdi*): Add FPR constraint and
        associated splitter.  Remove MQ constraint.
        (ctrdi_internal4): Correct CCmode clobber.

From-SVN: r51767

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4b9eaf25ff42fac45aa93c0157832931a6f52c85..3f73f7daac4c7e31c32aeb341705971caac05120 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2002-04-02  Alan Modra  <amodra@bigpond.net.au>
+
+       * config/rs6000/rs6000.md (ctrdi*): Add FPR constraint and
+       associated splitter.  Remove MQ constraint.
+       (ctrdi_internal4): Correct CCmode clobber.
+
 2002-04-02  John David Anglin  <dave@hiauly1.hia.nrc.ca>
 
        * milli64.S ($$dyncall): New function.

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 12d8f3b0a579e6f6393607457a64812797dff2df..53a03a46eb9e0d43fa7355069b473a8fad0c7151 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -13264,15 +13264,15 @@
 
 (define_insn "*ctrdi_internal1"
   [(set (pc)
-       (if_then_else (ne (match_operand:DI 1 "register_operand" "c,*r,*r")
+       (if_then_else (ne (match_operand:DI 1 "register_operand" "c,*r,*r,!*f")
                          (const_int 1))
                      (label_ref (match_operand 0 "" ""))
                      (pc)))
-   (set (match_operand:DI 2 "register_operand" "=1,*r,m*q*c*l")
+   (set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l,!*f")
        (plus:DI (match_dup 1)
                 (const_int -1)))
-   (clobber (match_scratch:CC 3 "=X,&x,&x"))
-   (clobber (match_scratch:DI 4 "=X,X,r"))]
+   (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
+   (clobber (match_scratch:DI 4 "=X,X,r,r"))]
   "TARGET_POWERPC64"
   "*
 {
@@ -13284,19 +13284,19 @@
     return \"bdz $+8\;b %l0\";
 }"
   [(set_attr "type" "branch")
-   (set_attr "length" "*,12,16")])
+   (set_attr "length" "*,12,16,24")])
 
 (define_insn "*ctrdi_internal2"
   [(set (pc)
-       (if_then_else (ne (match_operand:DI 1 "register_operand" "c,*r,*r")
+       (if_then_else (ne (match_operand:DI 1 "register_operand" "c,*r,*r,!*f")
                          (const_int 1))
                      (pc)
                      (label_ref (match_operand 0 "" ""))))
-   (set (match_operand:DI 2 "register_operand" "=1,*r,m*q*c*l")
+   (set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l,!*f")
        (plus:DI (match_dup 1)
                 (const_int -1)))
-   (clobber (match_scratch:CC 3 "=X,&x,&x"))
-   (clobber (match_scratch:DI 4 "=X,X,r"))]
+   (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
+   (clobber (match_scratch:DI 4 "=X,X,r,r"))]
   "TARGET_POWERPC64"
   "*
 {
@@ -13308,7 +13308,7 @@
     return \"{bdn|bdnz} $+8\;b %l0\";
 }"
   [(set_attr "type" "branch")
-   (set_attr "length" "*,12,16")])
+   (set_attr "length" "*,12,16,24")])
 
 ;; Similar, but we can use GE since we have a REG_NONNEG.
 
@@ -13362,15 +13362,15 @@
 
 (define_insn "*ctrdi_internal3"
   [(set (pc)
-       (if_then_else (ge (match_operand:DI 1 "register_operand" "c,*r,*r")
+       (if_then_else (ge (match_operand:DI 1 "register_operand" "c,*r,*r,!*f")
                          (const_int 0))
                      (label_ref (match_operand 0 "" ""))
                      (pc)))
-   (set (match_operand:DI 2 "register_operand" "=1,*r,m*q*c*l")
+   (set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l,!*f")
        (plus:DI (match_dup 1)
                 (const_int -1)))
-   (clobber (match_scratch:CC 3 "=X,&x,&X"))
-   (clobber (match_scratch:DI 4 "=X,X,r"))]
+   (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
+   (clobber (match_scratch:DI 4 "=X,X,r,r"))]
   "TARGET_POWERPC64 && find_reg_note (insn, REG_NONNEG, 0)"
   "*
 {
@@ -13382,19 +13382,19 @@
     return \"bdz $+8\;b %l0\";
 }"
   [(set_attr "type" "branch")
-   (set_attr "length" "*,12,16")])
+   (set_attr "length" "*,12,16,24")])
 
 (define_insn "*ctrdi_internal4"
   [(set (pc)
-       (if_then_else (ge (match_operand:DI 1 "register_operand" "c,*r,*r")
+       (if_then_else (ge (match_operand:DI 1 "register_operand" "c,*r,*r,!*f")
                          (const_int 0))
                      (pc)
                      (label_ref (match_operand 0 "" ""))))
-   (set (match_operand:DI 2 "register_operand" "=1,*r,m*q*c*l")
+   (set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l,!*f")
        (plus:DI (match_dup 1)
                 (const_int -1)))
-   (clobber (match_scratch:CC 3 "=X,&x,&X"))
-   (clobber (match_scratch:DI 4 "=X,X,r"))]
+   (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
+   (clobber (match_scratch:DI 4 "=X,X,r,r"))]
   "TARGET_POWERPC64 && find_reg_note (insn, REG_NONNEG, 0)"
   "*
 {
@@ -13406,7 +13406,7 @@
     return \"{bdn|bdnz} $+8\;b %l0\";
 }"
   [(set_attr "type" "branch")
-   (set_attr "length" "*,12,16")])
+   (set_attr "length" "*,12,16,24")])
 
 ;; Similar but use EQ
 
@@ -13460,15 +13460,15 @@
 
 (define_insn "*ctrdi_internal5"
   [(set (pc)
-       (if_then_else (eq (match_operand:DI 1 "register_operand" "c,*r,*r")
+       (if_then_else (eq (match_operand:DI 1 "register_operand" "c,*r,*r,!*f")
                          (const_int 1))
                      (label_ref (match_operand 0 "" ""))
                      (pc)))
-   (set (match_operand:DI 2 "register_operand" "=1,*r,m*q*c*l")
+   (set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l,!*f")
        (plus:DI (match_dup 1)
                 (const_int -1)))
-   (clobber (match_scratch:CC 3 "=X,&x,&x"))
-   (clobber (match_scratch:DI 4 "=X,X,r"))]
+   (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
+   (clobber (match_scratch:DI 4 "=X,X,r,r"))]
   "TARGET_POWERPC64"
   "*
 {
@@ -13480,19 +13480,19 @@
     return \"{bdn|bdnz} $+8\;b %l0\";
 }"
   [(set_attr "type" "branch")
-   (set_attr "length" "*,12,16")])
+   (set_attr "length" "*,12,16,24")])
 
 (define_insn "*ctrdi_internal6"
   [(set (pc)
-       (if_then_else (eq (match_operand:DI 1 "register_operand" "c,*r,*r")
+       (if_then_else (eq (match_operand:DI 1 "register_operand" "c,*r,*r,!*f")
                          (const_int 1))
                      (pc)
                      (label_ref (match_operand 0 "" ""))))
-   (set (match_operand:DI 2 "register_operand" "=1,*r,m*q*c*l")
+   (set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l,!*f")
        (plus:DI (match_dup 1)
                 (const_int -1)))
-   (clobber (match_scratch:CC 3 "=X,&x,&x"))
-   (clobber (match_scratch:DI 4 "=X,X,r"))]
+   (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
+   (clobber (match_scratch:DI 4 "=X,X,r,r"))]
   "TARGET_POWERPC64"
   "*
 {
@@ -13504,7 +13504,7 @@
     return \"bdz $+8\;b %l0\";
 }"
   [(set_attr "type" "branch")
-   (set_attr "length" "*,12,16")])
+   (set_attr "length" "*,12,16,24")])
 
 ;; Now the splitters if we could not allocate the CTR register
 
@@ -13575,7 +13575,7 @@
                 (const_int -1)))
    (clobber (match_scratch:CC 3 ""))
    (clobber (match_scratch:DI 4 ""))]
-  "TARGET_POWERPC64 && reload_completed"
+  "TARGET_POWERPC64 && reload_completed && INT_REGNO_P (REGNO (operands[0]))"
   [(parallel [(set (match_dup 3)
                   (compare:CC (plus:DI (match_dup 1)
                                        (const_int -1))
@@ -13618,6 +13618,45 @@
   "
 { operands[7] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3],
                         const0_rtx); }")
+
+(define_split
+  [(set (pc)
+       (if_then_else (match_operator 2 "comparison_operator"
+                                    [(match_operand:DI 1 "gpc_reg_operand" "")
+                                     (const_int 1)])
+                    (match_operand 5 "" "")
+                    (match_operand 6 "" "")))
+   (set (match_operand:DI 0 "gpc_reg_operand" "")
+       (plus:DI (match_dup 1)
+               (const_int -1)))
+   (clobber (match_scratch:CC 3 ""))
+   (clobber (match_scratch:DI 4 ""))]
+  "TARGET_POWERPC64 && reload_completed && FP_REGNO_P (REGNO (operands[0]))"
+  [(set (match_dup 8)
+       (match_dup 1))
+   (set (match_dup 4)
+       (match_dup 8))
+   (parallel [(set (match_dup 3)
+                  (compare:CC (plus:DI (match_dup 4)
+                                       (const_int -1))
+                              (const_int 0)))
+             (set (match_dup 4)
+                  (plus:DI (match_dup 4)
+                           (const_int -1)))])
+   (set (match_dup 8)
+       (match_dup 4))
+   (set (match_dup 0)
+       (match_dup 8))
+   (set (pc) (if_then_else (match_dup 7)
+                          (match_dup 5)
+                          (match_dup 6)))]
+  "
+{
+  operands[7] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3],
+                        const0_rtx);
+  operands[8] = assign_stack_temp (DImode, GET_MODE_SIZE (DImode), 0);
+}")
+
 \f
 (define_insn "trap"
   [(trap_if (const_int 1) (const_int 0))]