Fixes for 5.15

Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/queue-5.15/iommu-vt-d-allow-zero-sagaw-if-second-stage-not-supp.patch b/queue-5.15/iommu-vt-d-allow-zero-sagaw-if-second-stage-not-supp.patch
new file mode 100644 (file)
index 0000000..c348f1c
--- /dev/null
+++ b/queue-5.15/iommu-vt-d-allow-zero-sagaw-if-second-stage-not-supp.patch
@@ -0,0 +1,43 @@
+From 5d3297f3c3a74b4708f7a7987e209514614bfe70 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 29 Mar 2023 21:47:20 +0800
+Subject: iommu/vt-d: Allow zero SAGAW if second-stage not supported
+
+From: Lu Baolu <baolu.lu@linux.intel.com>
+
+[ Upstream commit bfd3c6b9fa4a1dc78139dd1621d5bea321ffa69d ]
+
+The VT-d spec states (in section 11.4.2) that hardware implementations
+reporting second-stage translation support (SSTS) field as Clear also
+report the SAGAW field as 0. Fix an inappropriate check in alloc_iommu().
+
+Fixes: 792fb43ce2c9 ("iommu/vt-d: Enable Intel IOMMU scalable mode by default")
+Suggested-by: Raghunathan Srinivasan <raghunathan.srinivasan@intel.com>
+Reviewed-by: Kevin Tian <kevin.tian@intel.com>
+Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
+Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
+Link: https://lore.kernel.org/r/20230318024824.124542-1-baolu.lu@linux.intel.com
+Link: https://lore.kernel.org/r/20230329134721.469447-3-baolu.lu@linux.intel.com
+Signed-off-by: Joerg Roedel <jroedel@suse.de>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/iommu/intel/dmar.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/iommu/intel/dmar.c b/drivers/iommu/intel/dmar.c
+index bff2420fc3e14..7c20083d4a798 100644
+--- a/drivers/iommu/intel/dmar.c
++++ b/drivers/iommu/intel/dmar.c
+@@ -1080,7 +1080,8 @@ static int alloc_iommu(struct dmar_drhd_unit *drhd)
+       }
+ 
+       err = -EINVAL;
+-      if (cap_sagaw(iommu->cap) == 0) {
++      if (!cap_sagaw(iommu->cap) &&
++          (!ecap_smts(iommu->ecap) || ecap_slts(iommu->ecap))) {
+               pr_info("%s: No supported address widths. Not attempting DMA translation.\n",
+                       iommu->name);
+               drhd->ignored = 1;
+-- 
+2.39.2
+

diff --git a/queue-5.15/pinctrl-ocelot-fix-alt-mode-for-ocelot.patch b/queue-5.15/pinctrl-ocelot-fix-alt-mode-for-ocelot.patch
new file mode 100644 (file)
index 0000000..b6fbe8c
--- /dev/null
+++ b/queue-5.15/pinctrl-ocelot-fix-alt-mode-for-ocelot.patch
@@ -0,0 +1,40 @@
+From aee0b02d9e18ab7c21b493ed3e9e3d316e9af470 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Mon, 6 Feb 2023 21:37:20 +0100
+Subject: pinctrl: ocelot: Fix alt mode for ocelot
+
+From: Horatiu Vultur <horatiu.vultur@microchip.com>
+
+[ Upstream commit 657fd9da2d4b4aa0a384105b236baa22fa0233bf ]
+
+In case the driver was trying to set an alternate mode for gpio
+0 or 32 then the mode was not set correctly. The reason is that
+there is computation error inside the function ocelot_pinmux_set_mux
+because in this case it was trying to shift to left by -1.
+Fix this by actually shifting the function bits and not the position.
+
+Fixes: 4b36082e2e09 ("pinctrl: ocelot: fix pinmuxing for pins after 31")
+Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
+Link: https://lore.kernel.org/r/20230206203720.1177718-1-horatiu.vultur@microchip.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pinctrl/pinctrl-ocelot.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/pinctrl/pinctrl-ocelot.c b/drivers/pinctrl/pinctrl-ocelot.c
+index 0a36ec8775a38..b14f1b7a625ec 100644
+--- a/drivers/pinctrl/pinctrl-ocelot.c
++++ b/drivers/pinctrl/pinctrl-ocelot.c
+@@ -739,7 +739,7 @@ static int ocelot_pinmux_set_mux(struct pinctrl_dev *pctldev,
+       regmap_update_bits(info->map, REG_ALT(0, info, pin->pin),
+                          BIT(p), f << p);
+       regmap_update_bits(info->map, REG_ALT(1, info, pin->pin),
+-                         BIT(p), f << (p - 1));
++                         BIT(p), (f >> 1) << p);
+ 
+       return 0;
+ }
+-- 
+2.39.2
+

diff --git a/queue-5.15/series b/queue-5.15/series
index f757ce67d89fcc49e4b658f2743c5e9921a201f3..da683d6ef04fab40802eaec6ee8f556cca948c52 100644 (file)
--- a/queue-5.15/series
+++ b/queue-5.15/series
@@ -60,3 +60,5 @@ bnxt_en-fix-typo-in-pci-id-to-device-description-str.patch
 bnxt_en-add-missing-200g-link-speed-reporting.patch
 net-dsa-mv88e6xxx-enable-igmp-snooping-on-user-ports.patch
 net-ethernet-mtk_eth_soc-fix-flow-block-refcounting-.patch
+pinctrl-ocelot-fix-alt-mode-for-ocelot.patch
+iommu-vt-d-allow-zero-sagaw-if-second-stage-not-supp.patch