drm/xe/xe3: Add support for media IP version 30.02

Media version 30.02 should be treated the same as other Xe3 IP, but
will have a slightly different set of workarounds.

-v2: Extend the range in existing WA entry (Bala)
-v3: Revert v2, Do not extend the range for the time being(Matt)

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Link: https://lore.kernel.org/r/20250613193146.3549862-4-dnyaneshwar.bhadane@intel.com

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 014689898d969beae21b56e77fe46ef7d3dfbd00..cd239457f5421d06558ce2475067d8ac2a1a5ad7 100644 (file)
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -197,6 +197,7 @@ static const struct xe_ip media_ips[] = {
        { 1301, "Xe2_HPM", &media_xelpmp },
        { 2000, "Xe2_LPM", &media_xelpmp },
        { 3000, "Xe3_LPM", &media_xelpmp },
+       { 3002, "Xe3_LPM", &media_xelpmp },
 };
 
 static const struct xe_device_desc tgl_desc = {

diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index 6baf369fb3300ae54cbe341d60bbdba716c6f9d9..f51218a7a580a8b1c72da1f7c5adf38527fa41ed 100644 (file)
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -285,6 +285,18 @@ static const struct xe_rtp_entry_sr gt_was[] = {
          XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F10(0), IECPUNIT_CLKGATE_DIS)),
          XE_RTP_ENTRY_FLAG(FOREACH_ENGINE),
        },
+       { XE_RTP_NAME("16021865536"),
+         XE_RTP_RULES(MEDIA_VERSION(3002),
+                      ENGINE_CLASS(VIDEO_DECODE)),
+         XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F10(0), IECPUNIT_CLKGATE_DIS)),
+         XE_RTP_ENTRY_FLAG(FOREACH_ENGINE),
+       },
+       { XE_RTP_NAME("16021867713"),
+         XE_RTP_RULES(MEDIA_VERSION(3002),
+                      ENGINE_CLASS(VIDEO_DECODE)),
+         XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F1C(0), MFXPIPE_CLKGATE_DIS)),
+         XE_RTP_ENTRY_FLAG(FOREACH_ENGINE),
+       },
        { XE_RTP_NAME("14021486841"),
          XE_RTP_RULES(MEDIA_VERSION(3000), MEDIA_STEP(A0, B0),
                       ENGINE_CLASS(VIDEO_DECODE)),

diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
index 6496a5a17393a8be28195480a1ecce6869c521a8..96cc33da0fb574e01a2cf7b0851b20e54c97e26d 100644 (file)
--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
@@ -60,9 +60,11 @@ no_media_l3  MEDIA_VERSION(3000)
                GRAPHICS_VERSION(1260), GRAPHICS_STEP(A0, B0)
 16023105232    GRAPHICS_VERSION_RANGE(2001, 3001)
                MEDIA_VERSION_RANGE(1301, 3000)
+               MEDIA_VERSION(3002)
                GRAPHICS_VERSION(3003)
 16026508708    GRAPHICS_VERSION_RANGE(1200, 3001)
                MEDIA_VERSION_RANGE(1300, 3000)
+               MEDIA_VERSION(3002)
                GRAPHICS_VERSION(3003)
 
 # SoC workaround - currently applies to all platforms with the following