AArch64: aarch64_class_max_nregs mishandles 64-bit structure modes [PR112577]

The target hook aarch64_class_max_nregs returns the incorrect result for 64-bit
structure modes like V31DImode or V41DFmode etc.  The calculation of the nregs
is based on the size of AdvSIMD vector register for 64-bit modes which ought to
be UNITS_PER_VREG / 2.  This patch fixes the register size.

gcc/ChangeLog:

	PR target/112577
	* config/aarch64/aarch64.cc (aarch64_class_max_nregs): Handle 64-bit
	vector structure modes correctly.

diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 4556b8dd5045cc992f9e392e0dff903267adca0e..872393a823125edac53393fd85a3d9c460eb4760 100644 (file)
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -12961,6 +12961,8 @@ aarch64_class_max_nregs (reg_class_t regclass, machine_mode mode)
          && constant_multiple_p (GET_MODE_SIZE (mode),
                                  aarch64_vl_bytes (mode, vec_flags), &nregs))
        return nregs;
+      if (vec_flags == (VEC_ADVSIMD | VEC_STRUCT | VEC_PARTIAL))
+       return GET_MODE_SIZE (mode).to_constant () / 8;
       return (vec_flags & VEC_ADVSIMD
              ? CEIL (lowest_size, UNITS_PER_VREG)
              : CEIL (lowest_size, UNITS_PER_WORD));