--- /dev/null
+From 7ac33e47d5769632010e537964c7e45498f8dc26 Mon Sep 17 00:00:00 2001
+From: Peter Wu <peter@lekensteyn.nl>
+Date: Sat, 26 Nov 2016 15:05:01 +0100
+Subject: drm/amdgpu: fix check for port PM availability
+
+From: Peter Wu <peter@lekensteyn.nl>
+
+commit 7ac33e47d5769632010e537964c7e45498f8dc26 upstream.
+
+The ATPX method does not always exist on the dGPU, it may be located at
+the iGPU. The parent device of the iGPU is the root port for which
+bridge_d3 is false. This accidentally enables the legacy PM method which
+conflicts with port PM and prevented the dGPU from powering on.
+
+Fixes: 1db4496f167b ("drm/amdgpu: fix power state when port pm is unavailable")
+
+Reported-and-tested-by: Mike Lothian <mike@fireburn.co.uk>
+Signed-off-by: Peter Wu <peter@lekensteyn.nl>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c | 11 +++++++++--
+ 1 file changed, 9 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
+@@ -476,7 +476,6 @@ static int amdgpu_atpx_power_state(enum
+ */
+ static bool amdgpu_atpx_pci_probe_handle(struct pci_dev *pdev)
+ {
+- struct pci_dev *parent_pdev = pci_upstream_bridge(pdev);
+ acpi_handle dhandle, atpx_handle;
+ acpi_status status;
+
+@@ -491,7 +490,6 @@ static bool amdgpu_atpx_pci_probe_handle
+ }
+ amdgpu_atpx_priv.dhandle = dhandle;
+ amdgpu_atpx_priv.atpx.handle = atpx_handle;
+- amdgpu_atpx_priv.bridge_pm_usable = parent_pdev && parent_pdev->bridge_d3;
+ return true;
+ }
+
+@@ -553,17 +551,25 @@ static bool amdgpu_atpx_detect(void)
+ struct pci_dev *pdev = NULL;
+ bool has_atpx = false;
+ int vga_count = 0;
++ bool d3_supported = false;
++ struct pci_dev *parent_pdev;
+
+ while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) {
+ vga_count++;
+
+ has_atpx |= (amdgpu_atpx_pci_probe_handle(pdev) == true);
++
++ parent_pdev = pci_upstream_bridge(pdev);
++ d3_supported |= parent_pdev && parent_pdev->bridge_d3;
+ }
+
+ while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) {
+ vga_count++;
+
+ has_atpx |= (amdgpu_atpx_pci_probe_handle(pdev) == true);
++
++ parent_pdev = pci_upstream_bridge(pdev);
++ d3_supported |= parent_pdev && parent_pdev->bridge_d3;
+ }
+
+ if (has_atpx && vga_count == 2) {
+@@ -571,6 +577,7 @@ static bool amdgpu_atpx_detect(void)
+ printk(KERN_INFO "vga_switcheroo: detected switching method %s handle\n",
+ acpi_method_name);
+ amdgpu_atpx_priv.atpx_detected = true;
++ amdgpu_atpx_priv.bridge_pm_usable = d3_supported;
+ amdgpu_atpx_init();
+ return true;
+ }
--- /dev/null
+From 1db4496f167bcc7c6541d449355ade2e7d339d52 Mon Sep 17 00:00:00 2001
+From: Peter Wu <peter@lekensteyn.nl>
+Date: Wed, 23 Nov 2016 02:22:24 +0100
+Subject: drm/amdgpu: fix power state when port pm is unavailable
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Peter Wu <peter@lekensteyn.nl>
+
+commit 1db4496f167bcc7c6541d449355ade2e7d339d52 upstream.
+
+When PCIe port PM is not enabled (system BIOS is pre-2015 or the
+pcie_port_pm=off parameter is set), legacy ATPX PM should still be
+marked as supported. Otherwise the GPU can fail to power on after
+runtime suspend. This affected a Dell Inspiron 5548.
+
+Ideally the BIOS date in the PCI core is lowered to 2013 (the first year
+where hybrid graphics platforms using power resources was introduced),
+but that seems more risky at this point and would not solve the
+pcie_port_pm=off issue.
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98505
+Reported-and-tested-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
+Signed-off-by: Peter Wu <peter@lekensteyn.nl>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Acked-by: Christian König <christian.koenig@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c | 9 ++++++++-
+ 1 file changed, 8 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
+@@ -33,6 +33,7 @@ struct amdgpu_atpx {
+
+ static struct amdgpu_atpx_priv {
+ bool atpx_detected;
++ bool bridge_pm_usable;
+ /* handle for device - and atpx */
+ acpi_handle dhandle;
+ acpi_handle other_handle;
+@@ -200,7 +201,11 @@ static int amdgpu_atpx_validate(struct a
+ atpx->is_hybrid = false;
+ if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) {
+ printk("ATPX Hybrid Graphics\n");
+- atpx->functions.power_cntl = false;
++ /*
++ * Disable legacy PM methods only when pcie port PM is usable,
++ * otherwise the device might fail to power off or power on.
++ */
++ atpx->functions.power_cntl = !amdgpu_atpx_priv.bridge_pm_usable;
+ atpx->is_hybrid = true;
+ }
+
+@@ -471,6 +476,7 @@ static int amdgpu_atpx_power_state(enum
+ */
+ static bool amdgpu_atpx_pci_probe_handle(struct pci_dev *pdev)
+ {
++ struct pci_dev *parent_pdev = pci_upstream_bridge(pdev);
+ acpi_handle dhandle, atpx_handle;
+ acpi_status status;
+
+@@ -485,6 +491,7 @@ static bool amdgpu_atpx_pci_probe_handle
+ }
+ amdgpu_atpx_priv.dhandle = dhandle;
+ amdgpu_atpx_priv.atpx.handle = atpx_handle;
++ amdgpu_atpx_priv.bridge_pm_usable = parent_pdev && parent_pdev->bridge_d3;
+ return true;
+ }
+
--- /dev/null
+From bcfdd5d5105087e6f33dfeb08a1ca6b2c0287b61 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Mon, 28 Nov 2016 17:23:40 -0500
+Subject: drm/radeon: fix check for port PM availability
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit bcfdd5d5105087e6f33dfeb08a1ca6b2c0287b61 upstream.
+
+The ATPX method does not always exist on the dGPU, it may be located at
+the iGPU. The parent device of the iGPU is the root port for which
+bridge_d3 is false. This accidentally enables the legacy PM method which
+conflicts with port PM and prevented the dGPU from powering on.
+
+Ported from amdgpu commit:
+drm/amdgpu: fix check for port PM availability
+from Peter Wu.
+
+Fixes: d3ac31f3b4bf9fad (drm/radeon: fix power state when port pm is unavailable (v2))
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: Peter Wu <peter@lekensteyn.nl>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/radeon_atpx_handler.c | 11 +++++++++--
+ 1 file changed, 9 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c
++++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
+@@ -474,7 +474,6 @@ static int radeon_atpx_power_state(enum
+ */
+ static bool radeon_atpx_pci_probe_handle(struct pci_dev *pdev)
+ {
+- struct pci_dev *parent_pdev = pci_upstream_bridge(pdev);
+ acpi_handle dhandle, atpx_handle;
+ acpi_status status;
+
+@@ -488,7 +487,6 @@ static bool radeon_atpx_pci_probe_handle
+
+ radeon_atpx_priv.dhandle = dhandle;
+ radeon_atpx_priv.atpx.handle = atpx_handle;
+- radeon_atpx_priv.bridge_pm_usable = parent_pdev && parent_pdev->bridge_d3;
+ return true;
+ }
+
+@@ -550,11 +548,16 @@ static bool radeon_atpx_detect(void)
+ struct pci_dev *pdev = NULL;
+ bool has_atpx = false;
+ int vga_count = 0;
++ bool d3_supported = false;
++ struct pci_dev *parent_pdev;
+
+ while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) {
+ vga_count++;
+
+ has_atpx |= (radeon_atpx_pci_probe_handle(pdev) == true);
++
++ parent_pdev = pci_upstream_bridge(pdev);
++ d3_supported |= parent_pdev && parent_pdev->bridge_d3;
+ }
+
+ /* some newer PX laptops mark the dGPU as a non-VGA display device */
+@@ -562,6 +565,9 @@ static bool radeon_atpx_detect(void)
+ vga_count++;
+
+ has_atpx |= (radeon_atpx_pci_probe_handle(pdev) == true);
++
++ parent_pdev = pci_upstream_bridge(pdev);
++ d3_supported |= parent_pdev && parent_pdev->bridge_d3;
+ }
+
+ if (has_atpx && vga_count == 2) {
+@@ -569,6 +575,7 @@ static bool radeon_atpx_detect(void)
+ printk(KERN_INFO "vga_switcheroo: detected switching method %s handle\n",
+ acpi_method_name);
+ radeon_atpx_priv.atpx_detected = true;
++ radeon_atpx_priv.bridge_pm_usable = d3_supported;
+ radeon_atpx_init();
+ return true;
+ }
--- /dev/null
+From d3ac31f3b4bf9fade93d69770cb9c34912e017be Mon Sep 17 00:00:00 2001
+From: Peter Wu <peter@lekensteyn.nl>
+Date: Wed, 23 Nov 2016 02:22:25 +0100
+Subject: drm/radeon: fix power state when port pm is unavailable (v2)
+
+From: Peter Wu <peter@lekensteyn.nl>
+
+commit d3ac31f3b4bf9fade93d69770cb9c34912e017be upstream.
+
+When PCIe port PM is not enabled (system BIOS is pre-2015 or the
+pcie_port_pm=off parameter is set), legacy ATPX PM should still be
+marked as supported. Otherwise the GPU can fail to power on after
+runtime suspend. This affected a Dell Inspiron 5548.
+
+Ideally the BIOS date in the PCI core is lowered to 2013 (the first year
+where hybrid graphics platforms using power resources was introduced),
+but that seems more risky at this point and would not solve the
+pcie_port_pm=off issue.
+
+v2: agd: fix typo
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98505
+Signed-off-by: Peter Wu <peter@lekensteyn.nl>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/radeon_atpx_handler.c | 9 ++++++++-
+ 1 file changed, 8 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c
++++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
+@@ -33,6 +33,7 @@ struct radeon_atpx {
+
+ static struct radeon_atpx_priv {
+ bool atpx_detected;
++ bool bridge_pm_usable;
+ /* handle for device - and atpx */
+ acpi_handle dhandle;
+ struct radeon_atpx atpx;
+@@ -198,7 +199,11 @@ static int radeon_atpx_validate(struct r
+ atpx->is_hybrid = false;
+ if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) {
+ printk("ATPX Hybrid Graphics\n");
+- atpx->functions.power_cntl = false;
++ /*
++ * Disable legacy PM methods only when pcie port PM is usable,
++ * otherwise the device might fail to power off or power on.
++ */
++ atpx->functions.power_cntl = !radeon_atpx_priv.bridge_pm_usable;
+ atpx->is_hybrid = true;
+ }
+
+@@ -469,6 +474,7 @@ static int radeon_atpx_power_state(enum
+ */
+ static bool radeon_atpx_pci_probe_handle(struct pci_dev *pdev)
+ {
++ struct pci_dev *parent_pdev = pci_upstream_bridge(pdev);
+ acpi_handle dhandle, atpx_handle;
+ acpi_status status;
+
+@@ -482,6 +488,7 @@ static bool radeon_atpx_pci_probe_handle
+
+ radeon_atpx_priv.dhandle = dhandle;
+ radeon_atpx_priv.atpx.handle = atpx_handle;
++ radeon_atpx_priv.bridge_pm_usable = parent_pdev && parent_pdev->bridge_d3;
+ return true;
+ }
+
kvm-arm-arm64-vgic-don-t-notify-eoi-for-non-spis.patch
drm-i915-don-t-touch-null-sg-on-i915_gem_object_get_pages_gtt-error.patch
drm-i915-drop-the-struct_mutex-when-wedged-or-trying-to-reset.patch
+drm-amdgpu-fix-power-state-when-port-pm-is-unavailable.patch
+drm-radeon-fix-power-state-when-port-pm-is-unavailable-v2.patch
+drm-amdgpu-fix-check-for-port-pm-availability.patch
+drm-radeon-fix-check-for-port-pm-availability.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
