arm64: dts: st: Add SPI NOR flash support on stm32mp257f-ev1 board

Add SPI NOR flash nor support on stm32mp257f-ev1 board.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Link: https://lore.kernel.org/r/20250512-upstream_omm_ospi_dts-v10-3-fca0fbe6d10a@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts
index 1b88485a62a1f837770654eee6c970208fef6edc..9d1a1155e36ccc283cb73e51b91f3200ee54a4aa 100644 (file)
--- a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts
+++ b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts
@@ -80,6 +80,11 @@
                        reg = <0x0 0x80000000 0x0 0x4000000>;
                        no-map;
                };
+
+               mm_ospi1: mm-ospi@60000000 {
+                       reg = <0x0 0x60000000 0x0 0x10000000>;
+                       no-map;
+               };
        };
 };
 
@@ -190,6 +195,33 @@
        status = "disabled";
 };
 
+&ommanager {
+       memory-region = <&mm_ospi1>;
+       pinctrl-0 = <&ospi_port1_clk_pins_a
+                    &ospi_port1_io03_pins_a
+                    &ospi_port1_cs0_pins_a>;
+       pinctrl-1 = <&ospi_port1_clk_sleep_pins_a
+                    &ospi_port1_io03_sleep_pins_a
+                    &ospi_port1_cs0_sleep_pins_a>;
+       pinctrl-names = "default", "sleep";
+       status = "okay";
+
+       spi@0 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               memory-region = <&mm_ospi1>;
+               status = "okay";
+
+               flash0: flash@0 {
+                       compatible = "jedec,spi-nor";
+                       reg = <0>;
+                       spi-rx-bus-width = <4>;
+                       spi-tx-bus-width = <4>;
+                       spi-max-frequency = <50000000>;
+               };
+       };
+};
+
 &rtc {
        status = "okay";
 };