{
struct ad4695_state *st = iio_priv(indio_dev);
const struct iio_scan_type *scan_type;
- struct ad4695_channel_config *cfg = &st->channels_cfg[chan->scan_index];
- unsigned int osr = st->channels_cfg[chan->scan_index].oversampling_ratio;
+ struct ad4695_channel_config *cfg;
unsigned int reg_val;
int ret, tmp;
u8 realbits;
+ if (chan->type == IIO_VOLTAGE)
+ cfg = &st->channels_cfg[chan->scan_index];
+
scan_type = iio_get_current_scan_type(indio_dev, chan);
if (IS_ERR(scan_type))
return PTR_ERR(scan_type);
tmp = sign_extend32(reg_val, 15);
- switch (osr) {
+ switch (cfg->oversampling_ratio) {
case 1:
*val = tmp / 4;
*val2 = abs(tmp) % 4 * MICRO / 4;
}
case IIO_CHAN_INFO_SAMP_FREQ: {
struct pwm_state state;
+ unsigned int osr = 1;
+
+ if (chan->type == IIO_VOLTAGE)
+ osr = cfg->oversampling_ratio;
ret = pwm_get_state_hw(st->cnv_pwm, &state);
if (ret)
{
struct ad4695_state *st = iio_priv(indio_dev);
unsigned int reg_val;
- unsigned int osr = st->channels_cfg[chan->scan_index].oversampling_ratio;
+ unsigned int osr = 1;
+
+ if (chan->type == IIO_VOLTAGE)
+ osr = st->channels_cfg[chan->scan_index].oversampling_ratio;
switch (mask) {
case IIO_CHAN_INFO_CALIBSCALE:
},
};
struct ad4695_state *st = iio_priv(indio_dev);
- unsigned int osr = st->channels_cfg[chan->scan_index].oversampling_ratio;
+ unsigned int osr = 1;
+
+ if (chan->type == IIO_VOLTAGE)
+ osr = st->channels_cfg[chan->scan_index].oversampling_ratio;
switch (mask) {
case IIO_CHAN_INFO_CALIBSCALE:
for (i = 0; i < indio_dev->num_channels; i++) {
struct iio_chan_spec *chan = &st->iio_chan[i];
- struct ad4695_channel_config *cfg = &st->channels_cfg[i];
+ struct ad4695_channel_config *cfg;
/*
* NB: When using offload support, all channels need to have the
if (chan->type != IIO_VOLTAGE)
continue;
+ cfg = &st->channels_cfg[i];
+
chan->info_mask_separate |= BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO);
chan->info_mask_separate_available |=
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO);