arm64: dts: qcom: ipq8074: Add QUP5 SPI node

Add node to support the QUP5 SPI controller inside of IPQ8074.
Some devices use this bus in order to manage external switches.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230426185647.180166-1-robimarko@gmail.com

diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 0bde1303bb9dbd85675663e6476e9536ee95b16f..74ce93e9bd6731cac422295e48c2de15ab806c47 100644 (file)
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -533,6 +533,20 @@
                        status = "disabled";
                };
 
+               blsp1_spi5: spi@78b9000 {
+                       compatible = "qcom,spi-qup-v2.2.1";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x78b9000 0x600>;
+                       interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&gcc GCC_BLSP1_QUP5_SPI_APPS_CLK>,
+                                <&gcc GCC_BLSP1_AHB_CLK>;
+                       clock-names = "core", "iface";
+                       dmas = <&blsp_dma 20>, <&blsp_dma 21>;
+                       dma-names = "tx", "rx";
+                       status = "disabled";
+               };
+
                blsp1_i2c6: i2c@78ba000 {
                        compatible = "qcom,i2c-qup-v2.2.1";
                        #address-cells = <1>;