+++ /dev/null
-From 5d822459a0d30a1ca6d2b345c3fbee92b9487a94 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Tue, 5 Dec 2023 06:25:46 +0300
-Subject: arm64: dts: qcom: sdm845: switch UFS QMP PHY to new style of bindings
-
-From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-
-[ Upstream commit 760baba5e79bae651c59df89d441fad2bd0be4a5 ]
-
-Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
-resource region, no per-PHY subnodes).
-
-Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
-Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-Link: https://lore.kernel.org/r/20231205032552.1583336-4-dmitry.baryshkov@linaro.org
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Stable-dep-of: ca8fb2bd2248 ("arm64: dts: qcom: sdm845: Fix UFS PHY clocks")
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/qcom/sdm845.dtsi | 19 +++++--------------
- 1 file changed, 5 insertions(+), 14 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
-index 15af6c7ad06c0..06e160ee00dd1 100644
---- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
-+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
-@@ -2244,7 +2244,7 @@ ufs_mem_hc: ufshc@1d84000 {
- <0 0x01d90000 0 0x8000>;
- reg-names = "std", "ice";
- interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
-- phys = <&ufs_mem_phy_lanes>;
-+ phys = <&ufs_mem_phy>;
- phy-names = "ufsphy";
- lanes-per-direction = <2>;
- power-domains = <&gcc UFS_PHY_GDSC>;
-@@ -2290,10 +2290,8 @@ ufs_mem_hc: ufshc@1d84000 {
-
- ufs_mem_phy: phy@1d87000 {
- compatible = "qcom,sdm845-qmp-ufs-phy";
-- reg = <0 0x01d87000 0 0x18c>;
-- #address-cells = <2>;
-- #size-cells = <2>;
-- ranges;
-+ reg = <0 0x01d87000 0 0x1000>;
-+
- clock-names = "ref",
- "ref_aux";
- clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
-@@ -2301,16 +2299,9 @@ ufs_mem_phy: phy@1d87000 {
-
- resets = <&ufs_mem_hc 0>;
- reset-names = "ufsphy";
-- status = "disabled";
-
-- ufs_mem_phy_lanes: phy@1d87400 {
-- reg = <0 0x01d87400 0 0x108>,
-- <0 0x01d87600 0 0x1e0>,
-- <0 0x01d87c00 0 0x1dc>,
-- <0 0x01d87800 0 0x108>,
-- <0 0x01d87a00 0 0x1e0>;
-- #phy-cells = <0>;
-- };
-+ #phy-cells = <0>;
-+ status = "disabled";
- };
-
- cryptobam: dma@1dc4000 {
---
-2.43.0
-
arm64-dts-qcom-msm8998-drop-usb-phy-clock-index.patch
arm64-dts-qcom-msm8998-switch-usb-qmp-phy-to-new-sty.patch
arm64-dts-qcom-msm8998-declare-vls-clamp-register-fo.patch
-arm64-dts-qcom-sdm845-switch-ufs-qmp-phy-to-new-styl.patch
arm64-dts-qcom-sm8150-switch-ufs-qmp-phy-to-new-styl.patch
arm64-dts-qcom-sm8150-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8250-switch-ufs-qmp-phy-to-new-styl.patch
+++ /dev/null
-From 301cb837db13f05e1efa924dabd48c840849e4b1 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Tue, 5 Dec 2023 06:25:46 +0300
-Subject: arm64: dts: qcom: sdm845: switch UFS QMP PHY to new style of bindings
-
-From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-
-[ Upstream commit 760baba5e79bae651c59df89d441fad2bd0be4a5 ]
-
-Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
-resource region, no per-PHY subnodes).
-
-Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
-Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-Link: https://lore.kernel.org/r/20231205032552.1583336-4-dmitry.baryshkov@linaro.org
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Stable-dep-of: ca8fb2bd2248 ("arm64: dts: qcom: sdm845: Fix UFS PHY clocks")
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/qcom/sdm845.dtsi | 19 +++++--------------
- 1 file changed, 5 insertions(+), 14 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
-index 95c515da9f2e0..8d2c78083ee49 100644
---- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
-+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
-@@ -2482,7 +2482,7 @@ ufs_mem_hc: ufshc@1d84000 {
- <0 0x01d90000 0 0x8000>;
- reg-names = "std", "ice";
- interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
-- phys = <&ufs_mem_phy_lanes>;
-+ phys = <&ufs_mem_phy>;
- phy-names = "ufsphy";
- lanes-per-direction = <2>;
- power-domains = <&gcc UFS_PHY_GDSC>;
-@@ -2528,10 +2528,8 @@ ufs_mem_hc: ufshc@1d84000 {
-
- ufs_mem_phy: phy@1d87000 {
- compatible = "qcom,sdm845-qmp-ufs-phy";
-- reg = <0 0x01d87000 0 0x18c>;
-- #address-cells = <2>;
-- #size-cells = <2>;
-- ranges;
-+ reg = <0 0x01d87000 0 0x1000>;
-+
- clock-names = "ref",
- "ref_aux";
- clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
-@@ -2539,16 +2537,9 @@ ufs_mem_phy: phy@1d87000 {
-
- resets = <&ufs_mem_hc 0>;
- reset-names = "ufsphy";
-- status = "disabled";
-
-- ufs_mem_phy_lanes: phy@1d87400 {
-- reg = <0 0x01d87400 0 0x108>,
-- <0 0x01d87600 0 0x1e0>,
-- <0 0x01d87c00 0 0x1dc>,
-- <0 0x01d87800 0 0x108>,
-- <0 0x01d87a00 0 0x1e0>;
-- #phy-cells = <0>;
-- };
-+ #phy-cells = <0>;
-+ status = "disabled";
- };
-
- cryptobam: dma-controller@1dc4000 {
---
-2.43.0
-
wifi-wfx-fix-memory-leak-when-starting-ap.patch
arm64-dts-qcom-msm8998-switch-usb-qmp-phy-to-new-sty.patch
arm64-dts-qcom-msm8998-declare-vls-clamp-register-fo.patch
-arm64-dts-qcom-sdm845-switch-ufs-qmp-phy-to-new-styl.patch
arm64-dts-qcom-sm6350-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8150-switch-ufs-qmp-phy-to-new-styl.patch
arm64-dts-qcom-sm8150-fix-ufs-phy-clocks.patch
+++ /dev/null
-From be7bae50ac6301e0a1576b6e06d182f6629ac677 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Tue, 5 Dec 2023 06:25:46 +0300
-Subject: arm64: dts: qcom: sdm845: switch UFS QMP PHY to new style of bindings
-
-From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-
-[ Upstream commit 760baba5e79bae651c59df89d441fad2bd0be4a5 ]
-
-Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
-resource region, no per-PHY subnodes).
-
-Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
-Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-Link: https://lore.kernel.org/r/20231205032552.1583336-4-dmitry.baryshkov@linaro.org
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Stable-dep-of: ca8fb2bd2248 ("arm64: dts: qcom: sdm845: Fix UFS PHY clocks")
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/qcom/sdm845.dtsi | 19 +++++--------------
- 1 file changed, 5 insertions(+), 14 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
-index 234d7875cd8e1..1ce71d70daa01 100644
---- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
-+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
-@@ -2575,7 +2575,7 @@ ufs_mem_hc: ufshc@1d84000 {
- <0 0x01d90000 0 0x8000>;
- reg-names = "std", "ice";
- interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
-- phys = <&ufs_mem_phy_lanes>;
-+ phys = <&ufs_mem_phy>;
- phy-names = "ufsphy";
- lanes-per-direction = <2>;
- power-domains = <&gcc UFS_PHY_GDSC>;
-@@ -2625,10 +2625,8 @@ ufs_mem_hc: ufshc@1d84000 {
-
- ufs_mem_phy: phy@1d87000 {
- compatible = "qcom,sdm845-qmp-ufs-phy";
-- reg = <0 0x01d87000 0 0x18c>;
-- #address-cells = <2>;
-- #size-cells = <2>;
-- ranges;
-+ reg = <0 0x01d87000 0 0x1000>;
-+
- clock-names = "ref",
- "ref_aux";
- clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
-@@ -2636,16 +2634,9 @@ ufs_mem_phy: phy@1d87000 {
-
- resets = <&ufs_mem_hc 0>;
- reset-names = "ufsphy";
-- status = "disabled";
-
-- ufs_mem_phy_lanes: phy@1d87400 {
-- reg = <0 0x01d87400 0 0x108>,
-- <0 0x01d87600 0 0x1e0>,
-- <0 0x01d87c00 0 0x1dc>,
-- <0 0x01d87800 0 0x108>,
-- <0 0x01d87a00 0 0x1e0>;
-- #phy-cells = <0>;
-- };
-+ #phy-cells = <0>;
-+ status = "disabled";
- };
-
- cryptobam: dma-controller@1dc4000 {
---
-2.43.0
-
arm64-dts-qcom-msm8998-declare-vls-clamp-register-fo.patch
arm64-dts-qcom-qcm2290-declare-vls-clamp-register-fo.patch
arm64-dts-qcom-sm6115-declare-vls-clamp-register-for.patch
-arm64-dts-qcom-sdm845-switch-ufs-qmp-phy-to-new-styl.patch
arm64-dts-qcom-sm6115-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm6125-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm6350-fix-ufs-phy-clocks.patch
+++ /dev/null
-From d4983beb17858ade407d64a0d3ea23793d76df74 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Tue, 5 Dec 2023 06:25:46 +0300
-Subject: arm64: dts: qcom: sdm845: switch UFS QMP PHY to new style of bindings
-
-From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-
-[ Upstream commit 760baba5e79bae651c59df89d441fad2bd0be4a5 ]
-
-Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
-resource region, no per-PHY subnodes).
-
-Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
-Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-Link: https://lore.kernel.org/r/20231205032552.1583336-4-dmitry.baryshkov@linaro.org
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Stable-dep-of: ca8fb2bd2248 ("arm64: dts: qcom: sdm845: Fix UFS PHY clocks")
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/qcom/sdm845.dtsi | 19 +++++--------------
- 1 file changed, 5 insertions(+), 14 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
-index 9e594d21ecd80..4d1396325f667 100644
---- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
-+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
-@@ -2565,7 +2565,7 @@ ufs_mem_hc: ufshc@1d84000 {
- <0 0x01d90000 0 0x8000>;
- reg-names = "std", "ice";
- interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
-- phys = <&ufs_mem_phy_lanes>;
-+ phys = <&ufs_mem_phy>;
- phy-names = "ufsphy";
- lanes-per-direction = <2>;
- power-domains = <&gcc UFS_PHY_GDSC>;
-@@ -2615,10 +2615,8 @@ ufs_mem_hc: ufshc@1d84000 {
-
- ufs_mem_phy: phy@1d87000 {
- compatible = "qcom,sdm845-qmp-ufs-phy";
-- reg = <0 0x01d87000 0 0x18c>;
-- #address-cells = <2>;
-- #size-cells = <2>;
-- ranges;
-+ reg = <0 0x01d87000 0 0x1000>;
-+
- clock-names = "ref",
- "ref_aux";
- clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
-@@ -2626,16 +2624,9 @@ ufs_mem_phy: phy@1d87000 {
-
- resets = <&ufs_mem_hc 0>;
- reset-names = "ufsphy";
-- status = "disabled";
-
-- ufs_mem_phy_lanes: phy@1d87400 {
-- reg = <0 0x01d87400 0 0x108>,
-- <0 0x01d87600 0 0x1e0>,
-- <0 0x01d87c00 0 0x1dc>,
-- <0 0x01d87800 0 0x108>,
-- <0 0x01d87a00 0 0x1e0>;
-- #phy-cells = <0>;
-- };
-+ #phy-cells = <0>;
-+ status = "disabled";
- };
-
- cryptobam: dma-controller@1dc4000 {
---
-2.43.0
-
arm64-dts-qcom-msm8998-declare-vls-clamp-register-fo.patch
arm64-dts-qcom-qcm2290-declare-vls-clamp-register-fo.patch
arm64-dts-qcom-sm6115-declare-vls-clamp-register-for.patch
-arm64-dts-qcom-sdm845-switch-ufs-qmp-phy-to-new-styl.patch
arm64-dts-qcom-sm6115-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm6125-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm6350-fix-ufs-phy-clocks.patch