]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: qcom: sdm845: Fix interrupt types of camss interrupts
authorVladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Wed, 27 Nov 2024 12:29:49 +0000 (14:29 +0200)
committerBjorn Andersson <andersson@kernel.org>
Wed, 8 Jan 2025 04:55:55 +0000 (22:55 -0600)
Qualcomm IP catalog says that all CAMSS interrupts is edge rising,
fix it in the CAMSS device tree node for sdm845 SoC.

Fixes: d48a6698a6b7 ("arm64: dts: qcom: sdm845: Add CAMSS ISP node")
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20241127122950.885982-6-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/sdm845.dtsi

index 373a591bfb4d89eb37f8ae97abb68cbf7f045e94..e0ce804bb1a35047b092d4745988170738a3cd03 100644 (file)
                                "vfe1",
                                "vfe_lite";
 
-                       interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
-                               <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
-                               <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
-                               <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
-                               <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>,
-                               <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>,
-                               <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
-                               <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
-                               <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
-                               <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
+                               <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
+                               <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>,
+                               <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>,
+                               <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>,
+                               <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>,
+                               <GIC_SPI 448 IRQ_TYPE_EDGE_RISING>,
+                               <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
+                               <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
+                               <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>;
                        interrupt-names = "csid0",
                                "csid1",
                                "csid2",