arch = "arm32";
compression = "none";
os = "tifsstub-fs";
- load = <0x9dc00000>;
- entry = <0x9dc00000>;
+ load = <0x9dc10000>;
+ entry = <0x9dc10000>;
blob-ext {
filename = "tifsstub.bin_fs";
};
arch = "arm32";
compression = "none";
os = "tifsstub-gp";
- load = <0x9dc00000>;
- entry = <0x9dc00000>;
+ load = <0x9dc20000>;
+ entry = <0x9dc20000>;
blob-ext {
filename = "tifsstub.bin_gp";
};
description = "k3-am6xx-phycore-disable-spi-nor";
type = "flat_dt";
compression = "none";
- load = <0x8F001000>;
+ load = <0x8F002000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_spi_not_dtbo>;
description = "k3-am6xx-phycore-disable-eth-phy";
type = "flat_dt";
compression = "none";
- load = <0x8F002000>;
+ load = <0x8F004000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_eth_phy_dtbo>;
description = "k3-am6xx-phycore-qspi-nor";
type = "flat_dt";
compression = "none";
- load = <0x8F003000>;
+ load = <0x8F006000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_qspi_nor_dtbo>;
arch = "arm32";
compression = "none";
os = "tifsstub-fs";
- load = <0x9dc00000>;
- entry = <0x9dc00000>;
+ load = <0x9dc10000>;
+ entry = <0x9dc10000>;
blob-ext {
filename = "tifsstub.bin_fs";
};
arch = "arm32";
compression = "none";
os = "tifsstub-gp";
- load = <0x9dc00000>;
- entry = <0x9dc00000>;
+ load = <0x9dc20000>;
+ entry = <0x9dc20000>;
blob-ext {
filename = "tifsstub.bin_gp";
};
arch = "arm32";
compression = "none";
os = "tifsstub-fs";
- load = <0x9dc00000>;
- entry = <0x9dc00000>;
+ load = <0x9dc10000>;
+ entry = <0x9dc10000>;
blob-ext {
filename = "tifsstub.bin_fs";
};
arch = "arm32";
compression = "none";
os = "tifsstub-gp";
- load = <0x9dc00000>;
- entry = <0x9dc00000>;
+ load = <0x9dc20000>;
+ entry = <0x9dc20000>;
blob-ext {
filename = "tifsstub.bin_gp";
};
arch = "arm32";
compression = "none";
os = "tifsstub-fs";
- load = <0x9dc00000>;
- entry = <0x9dc00000>;
+ load = <0x9dc10000>;
+ entry = <0x9dc10000>;
blob-ext {
filename = "tifsstub.bin_fs";
};
arch = "arm32";
compression = "none";
os = "tifsstub-gp";
- load = <0x9dc00000>;
- entry = <0x9dc00000>;
+ load = <0x9dc20000>;
+ entry = <0x9dc20000>;
blob-ext {
filename = "tifsstub.bin_gp";
};
arch = "arm32";
compression = "none";
os = "tifsstub-fs";
- load = <0x9dc00000>;
- entry = <0x9dc00000>;
+ load = <0x9dc10000>;
+ entry = <0x9dc10000>;
blob-ext {
filename = "tifsstub.bin_fs";
};
arch = "arm32";
compression = "none";
os = "tifsstub-gp";
- load = <0x9dc00000>;
- entry = <0x9dc00000>;
+ load = <0x9dc20000>;
+ entry = <0x9dc20000>;
blob-ext {
filename = "tifsstub.bin_gp";
};
arch = "arm32";
compression = "none";
os = "tifsstub-fs";
- load = <0x9dc00000>;
- entry = <0x9dc00000>;
+ load = <0x9dc10000>;
+ entry = <0x9dc10000>;
blob-ext {
filename = "tifsstub.bin_fs";
};
arch = "arm32";
compression = "none";
os = "tifsstub-gp";
- load = <0x9dc00000>;
- entry = <0x9dc00000>;
+ load = <0x9dc20000>;
+ entry = <0x9dc20000>;
blob-ext {
filename = "tifsstub.bin_gp";
};
arch = "arm32";
compression = "none";
os = "tifsstub-fs";
- load = <0x9ca00000>;
- entry = <0x9ca00000>;
+ load = <0x9ca10000>;
+ entry = <0x9ca10000>;
blob-ext {
filename = "tifsstub.bin_fs";
};
description = "k3-am6xx-phycore-disable-spi-nor";
type = "flat_dt";
compression = "none";
- load = <0x8F001000>;
+ load = <0x8F002000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_spi_not_dtbo>;
description = "k3-am6xx-phycore-disable-eth-phy";
type = "flat_dt";
compression = "none";
- load = <0x8F002000>;
+ load = <0x8F004000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_eth_phy_dtbo>;
description = "k3-am6xx-phycore-qspi-nor";
type = "flat_dt";
compression = "none";
- load = <0x8F003000>;
+ load = <0x8F006000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_qspi_nor_dtbo>;
arch = "arm32";
compression = "none";
os = "tifsstub-fs";
- load = <0x9ca00000>;
- entry = <0x9ca00000>;
+ load = <0x9ca10000>;
+ entry = <0x9ca10000>;
blob-ext {
filename = "tifsstub.bin_fs";
};
description = "k3-am6xx-phycore-disable-spi-nor";
type = "flat_dt";
compression = "none";
- load = <0x8F001000>;
+ load = <0x8F002000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_spi_not_dtbo>;
description = "k3-am6xx-phycore-disable-eth-phy";
type = "flat_dt";
compression = "none";
- load = <0x8F002000>;
+ load = <0x8F004000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_eth_phy_dtbo>;
description = "k3-am6xx-phycore-qspi-nor";
type = "flat_dt";
compression = "none";
- load = <0x8F003000>;
+ load = <0x8F006000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_qspi_nor_dtbo>;