]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: Add support for Emtop SoM & Baseboard
authorHimanshu Bhavani <himanshu.bhavani@siliconsignals.io>
Sat, 13 May 2023 11:31:24 +0000 (17:01 +0530)
committerShawn Guo <shawnguo@kernel.org>
Mon, 15 May 2023 03:30:14 +0000 (11:30 +0800)
Add device tree support for the i.MX8MM Based Emtop SOM-IMX8MMLPD4 (V1)
and IMX8M Mini Baseboard (V1).
Currently supported are serial console, eMMC.

Signed-off-by: Himanshu Bhavani <himanshu.bhavani@siliconsignals.io>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/Makefile
arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts [new file with mode: 0644]
arch/arm64/boot/dts/freescale/imx8mm-emtop-som.dtsi [new file with mode: 0644]

index 0a6a646712a5422bc497d6f247a783ef666532b1..eb6279fcdf7beb5631a75e83ced2cfdb3349709f 100644 (file)
@@ -54,6 +54,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-data-modul-edm-sbc.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-emcon-avari.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mm-emtop-baseboard.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-evkb.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-ctouch2.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts b/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts
new file mode 100644 (file)
index 0000000..1c4e4d1
--- /dev/null
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2023 Emtop Embedded Solutions
+ */
+
+/dts-v1/;
+
+#include "imx8mm-emtop-som.dtsi"
+
+/ {
+       model = "Emtop Embedded Solutions i.MX8M Mini Baseboard V1";
+       compatible = "ees,imx8mm-emtop-baseboard", "ees,imx8mm-emtop-som",
+               "fsl,imx8mm";
+
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-emtop-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-emtop-som.dtsi
new file mode 100644 (file)
index 0000000..67d22d3
--- /dev/null
@@ -0,0 +1,261 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2023 Emtop Embedded Solutions
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/usb/pd.h>
+
+#include "imx8mm.dtsi"
+
+/ {
+       model = "Emtop Embedded Solutions i.MX8M Mini SOM-IMX8MMLPD4 SoM";
+       compatible = "ees,imx8mm-emtop-som", "fsl,imx8mm";
+
+       chosen {
+               stdout-path = &uart2;
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_gpio_led>;
+
+               led-0 {
+                       function = LED_FUNCTION_POWER;
+                       gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
+                       linux,default-trigger = "heartbeat";
+               };
+       };
+};
+
+&A53_0 {
+       cpu-supply = <&buck2>;
+};
+
+&A53_1 {
+       cpu-supply = <&buck2>;
+};
+
+&A53_2 {
+       cpu-supply = <&buck2>;
+};
+
+&A53_3 {
+       cpu-supply = <&buck2>;
+};
+
+&i2c1 {
+       clock-frequency = <400000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       status = "okay";
+
+       pmic@25 {
+               compatible = "nxp,pca9450c";
+               reg = <0x25>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_pmic>;
+               interrupt-parent = <&gpio1>;
+               interrupts = <3 IRQ_TYPE_EDGE_RISING>;
+
+               regulators {
+                       buck1: BUCK1 {
+                               regulator-name = "BUCK1";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <1000000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                               regulator-ramp-delay = <3125>;
+                       };
+
+                       buck2: BUCK2 {
+                               regulator-name = "BUCK2";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <900000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                               regulator-ramp-delay = <3125>;
+                       };
+
+                       buck3: BUCK3 {
+                               regulator-name = "BUCK3";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <1000000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       buck4: BUCK4 {
+                               regulator-name = "BUCK4";
+                               regulator-min-microvolt = <3000000>;
+                               regulator-max-microvolt = <3600000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       buck5: BUCK5 {
+                               regulator-name = "BUCK5";
+                               regulator-min-microvolt = <1650000>;
+                               regulator-max-microvolt = <1950000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       buck6: BUCK6 {
+                               regulator-name = "BUCK6";
+                               regulator-min-microvolt = <1100000>;
+                               regulator-max-microvolt = <1200000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       ldo1: LDO1 {
+                               regulator-name = "LDO1";
+                               regulator-min-microvolt = <1650000>;
+                               regulator-max-microvolt = <1950000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       ldo2: LDO2 {
+                               regulator-name = "LDO2";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <945000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       ldo3: LDO3 {
+                               regulator-name = "LDO3";
+                               regulator-min-microvolt = <1710000>;
+                               regulator-max-microvolt = <1890000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       ldo4: LDO4 {
+                               regulator-name = "LDO4";
+                               regulator-min-microvolt = <810000>;
+                               regulator-max-microvolt = <945000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       ldo5: LDO5 {
+                               regulator-name = "LDO5";
+                               regulator-min-microvolt = <1650000>;
+                               regulator-max-microvolt = <3600000>;
+                       };
+               };
+       };
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart2>;
+       status = "okay";
+};
+
+&usdhc3 {
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc3>;
+       pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+       bus-width = <8>;
+       non-removable;
+       status = "okay";
+};
+
+&wdog1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_wdog>;
+       fsl,ext-reset-output;
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl_gpio_led: emtop-gpio-led-grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16                    0x19
+                       MX8MM_IOMUXC_SAI3_RXC_GPIO4_IO29                        0x19
+               >;
+       };
+
+       pinctrl_i2c1: emtop-i2c1-grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL                          0x400001c3
+                       MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA                          0x400001c3
+               >;
+       };
+
+       pinctrl_pmic: emtop-pmic-grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3                       0x41
+               >;
+       };
+
+       pinctrl_uart2: emtop-uart2-grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX                     0x140
+                       MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX                     0x140
+               >;
+       };
+
+       pinctrl_usdhc3: emtop-usdhc3-grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK                       0x190
+                       MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD                       0x1d0
+                       MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0                   0x1d0
+                       MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1                   0x1d0
+                       MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2                   0x1d0
+                       MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3                   0x1d0
+                       MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4                     0x1d0
+                       MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5                    0x1d0
+                       MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6                    0x1d0
+                       MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7                      0x1d0
+                       MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE                   0x190
+               >;
+       };
+
+       pinctrl_usdhc3_100mhz: emtop-usdhc3-100mhz-grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK                       0x194
+                       MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD                       0x1d4
+                       MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0                   0x1d4
+                       MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1                   0x1d4
+                       MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2                   0x1d4
+                       MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3                   0x1d4
+                       MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4                     0x1d4
+                       MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5                    0x1d4
+                       MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6                    0x1d4
+                       MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7                      0x1d4
+                       MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE                   0x194
+               >;
+       };
+
+       pinctrl_usdhc3_200mhz: emtop-usdhc3-200mhz-grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK                       0x196
+                       MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD                       0x1d6
+                       MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0                   0x1d6
+                       MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1                   0x1d6
+                       MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2                   0x1d6
+                       MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3                   0x1d6
+                       MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4                     0x1d6
+                       MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5                    0x1d6
+                       MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6                    0x1d6
+                       MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7                      0x1d6
+                       MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE                   0x196
+               >;
+       };
+
+       pinctrl_wdog: emtop-wdog-grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B                    0xc6
+               >;
+       };
+};