drm/xe: Dump CURRENT_LRCA register

Add CURRENT_LRCA to register dump to help debugging.

Cc: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Signed-off-by: Wang Xin <x.wang@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20251016-xe3p-v3-9-3dd173a3097a@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>

diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
index f4c3e1187a00a04d8833b99a84af119ed8f2f2f6..0c02d0fe553153f0f39c0db01e557d71914ba3c2 100644 (file)
--- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
@@ -141,6 +141,8 @@
 #define   INHIBIT_SWITCH_UNTIL_PREEMPTED       REG_BIT(31)
 #define   IDLE_DELAY                           REG_GENMASK(20, 0)
 
+#define RING_CURRENT_LRCA(base)                        XE_REG((base) + 0x240)
+
 #define RING_CONTEXT_CONTROL(base)             XE_REG((base) + 0x244, XE_REG_OPTION_MASKED)
 #define          CTX_CTRL_PXP_ENABLE                   REG_BIT(10)
 #define          CTX_CTRL_OAC_CONTEXT_ENABLE           REG_BIT(8)

diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c
index 243dad3e24185de804e025ed179d6541bce763ae..8d1bfa2cdb151213c9b86782313266fc8239826a 100644 (file)
--- a/drivers/gpu/drm/xe/xe_guc_capture.c
+++ b/drivers/gpu/drm/xe/xe_guc_capture.c
@@ -122,6 +122,7 @@ struct __guc_capture_parsed_output {
        { RING_IPEHR(0),                REG_32BIT,      0,      0,      0,      "IPEHR"}, \
        { RING_INSTDONE(0),             REG_32BIT,      0,      0,      0,      "RING_INSTDONE"}, \
        { INDIRECT_RING_STATE(0),       REG_32BIT,      0,      0,      0,      "INDIRECT_RING_STATE"}, \
+       { RING_CURRENT_LRCA(0),         REG_32BIT,      0,      0,      0,      "CURRENT_LRCA"}, \
        { RING_ACTHD(0),                REG_64BIT_LOW_DW, 0,    0,      0,      NULL}, \
        { RING_ACTHD_UDW(0),            REG_64BIT_HI_DW, 0,     0,      0,      "ACTHD"}, \
        { RING_BBADDR(0),               REG_64BIT_LOW_DW, 0,    0,      0,      NULL}, \