When attempting to bootstrap arm-linux-gnueabihf with
{BOOT_C,T}FLAGS='-g -O2 -fnon-call-exceptions
-fstack-clash-protection', gmp fails to build in stage2: gen-fac's
mpz_and gets miscompiled.
A pseudo is initialized before a loop and used in a PRE_INC load
inside a loop. It gets spilled just as the fp2sp elimination is
disabled, and only the initialization gets adjusted with elimination
offsets. The unadjusted stack slot within the PRE_INC load ends up
reloaded later, but only when the FP offset has already missed its
chance to be adjusted.
Arrange for lra_eliminate_regs_1 to adjust autoinc addresses that are
MEMs themselves.
for gcc/ChangeLog
PR rtl-optimization/120424
* lra-eliminations.cc (lra_eliminate_regs_1): Adjust autoinc
addresses that are MEMs.
case POST_INC:
case PRE_DEC:
case POST_DEC:
+ /* Recurse to adjust elimination offsets in a spilled pseudo. */
+ if (GET_CODE (XEXP (x, 0)) == MEM)
+ break;
/* We do not support elimination of a register that is modified.
elimination_effects has already make sure that this does not
happen. */
case PRE_MODIFY:
case POST_MODIFY:
+ /* Recurse to adjust elimination offsets in a spilled pseudo. */
+ if (GET_CODE (XEXP (x, 0)) == MEM)
+ break;
/* We do not support elimination of a hard register that is
modified. LRA has already make sure that this does not
happen. The only remaining case we need to consider here is