RISC-V: Introduce option -mrvv-max-lmul for RVV autovec

Following replacement of -param=riscv-autovec-preference with
-mrvv-vector-bits, this patch replaces -param=riscv-autovec-lmul with
-mrvv-max-lmul.

-param issue is mentioned in following links:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112648
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112651

Tested On RV64 and RV32, no regression.

	PR target/112651

gcc/ChangeLog:

	* config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Rename
	(enum rvv_max_lmul_enum): Ditto
	(TARGET_MAX_LMUL): Ditto
	* config/riscv/riscv-v.cc (preferred_simd_mode): Ditto
	* config/riscv/riscv-vector-costs.cc (costs::record_potential_unexpected_spills): Ditto
	(costs::better_main_loop_than_p): Ditto
	* config/riscv/riscv.opt: Replace -param=riscv-autovec-lmul with -mrvv-max-lmul

gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/autovec/bug-2.C: Replace option
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-ice-1.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-ice-2.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-ice-3.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-mixed-1.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-1.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-2.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-3.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-4.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-5.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-6.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-7.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-1.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-2.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-3.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-4.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-5.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-6.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-7.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-1.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-10.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-11.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-12.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-2.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-3.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-5.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-6.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-7.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-8.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-9.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-1.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-10.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-11.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-12.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-13.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-14.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-2.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-3.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-4.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-5.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-6.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-7.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-8.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-9.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/no-dynamic-lmul-1.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/pr111317.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/pr111848.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/pr113112-1.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/pr113112-2.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/pr113112-3.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/pr113112-4.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/pr113112-5.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/pr113247-1.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/pr113247-2.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/pr113281-3.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/pr113281-4.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/pr113281-5.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/pr114264.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-10.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-11.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-12.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-2.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-3.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-4.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-5.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-6.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-7.c: Ditto
	* gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-9.c: Ditto
	* gcc.target/riscv/rvv/autovec/bug-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/bug-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/bug-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/bug-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/bug-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/bug-8.c: Ditto
	* gcc.target/riscv/rvv/autovec/cmp/cmp_vi-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/cmp/cmp_vi-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/cmp/cmp_vi-7.c: Ditto
	* gcc.target/riscv/rvv/autovec/cmp/cmp_vi-8.c: Ditto
	* gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc_run-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc_run-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/fold-min-poly.c: Ditto
	* gcc.target/riscv/rvv/autovec/partial/gimple_fold-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/partial/select_vl-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/partial/slp-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/partial/slp-16.c: Ditto
	* gcc.target/riscv/rvv/autovec/partial/slp-17.c: Ditto
	* gcc.target/riscv/rvv/autovec/partial/slp-18.c: Ditto
	* gcc.target/riscv/rvv/autovec/partial/slp-19.c: Ditto
	* gcc.target/riscv/rvv/autovec/partial/slp-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/partial/slp-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/partial/slp-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/partial/slp-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/partial/slp-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/pr112450.c: Ditto
	* gcc.target/riscv/rvv/autovec/pr112598-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/pr112598-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/pr112694-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/pr112999.c: Ditto
	* gcc.target/riscv/rvv/autovec/pr113393-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/series-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/series_run-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/slp-interleave-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/slp-interleave-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/slp-interleave-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/slp-interleave-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/unop/math-lroundf16-rv64-ice-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-10.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-12.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-13.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-14.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-7.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-8.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-9.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls-vlmax/trailing-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls-vlmax/trailing-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls-vlmax/trailing_run-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls-vlmax/trailing_run-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/abs-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/abs-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/and-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/and-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/and-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/avg-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/avg-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/avg-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/avg-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/avg-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/avg-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/bswap16-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cmp-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cmp-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cmp-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cmp-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cmp-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cmp-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/combine-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/combine-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/combine-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/combine-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/combine-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/combine-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/combine-7.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/combine-merge-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/combine-merge-10.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/combine-merge-11.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/combine-merge-12.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/combine-merge-13.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/combine-merge-14.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/combine-merge-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/combine-merge-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/combine-merge-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/combine-merge-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/combine-merge-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/combine-merge-7.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/combine-merge-8.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/combine-merge-9.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/compress-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/compress-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/compress-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/compress-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/compress-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/compress-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_abs-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_add-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_add-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_and-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_convert-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_convert-10.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_convert-11.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_convert-12.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_convert-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_convert-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_convert-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_convert-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_convert-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_convert-7.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_convert-8.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_convert-9.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_copysign-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_div-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_div-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_ext-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_ext-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_ext-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_ext-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_ext-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_fma-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_fma-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_fms-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_fnma-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_fnma-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_fnms-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_ior-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_max-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_max-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_min-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_min-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_mod-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_mul-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_mul-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_mulh-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_narrow-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_narrow-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_neg-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_neg-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_not-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_shift-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_shift-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_sqrt-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_sub-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_sub-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_trunc-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_trunc-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_trunc-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_trunc-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_trunc-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_wadd-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_wadd-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_wadd-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_wadd-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_wfma-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_wfma-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_wfms-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_wfnma-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_wmul-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_wmul-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_wmul-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_wsub-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_wsub-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_wsub-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_wsub-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cond_xor-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/consecutive-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/consecutive-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/const-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/const-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/const-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/const-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/const-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/convert-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/convert-10.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/convert-11.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/convert-12.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/convert-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/convert-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/convert-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/convert-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/convert-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/convert-7.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/convert-8.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/convert-9.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/cvt-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/div-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/dup-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/dup-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/dup-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/dup-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/dup-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/dup-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/dup-7.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/ext-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/ext-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/ext-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/ext-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/ext-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/extract-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/extract-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-add-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-add-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-add-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-div-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-div-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-div-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-max-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-max-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-max-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-max-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-max-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-min-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-min-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-min-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-min-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-min-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-mul-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-mul-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-mul-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-sub-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-sub-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/floating-point-sub-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/fma-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/fma-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/fma-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/fma-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/fma-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/fma-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/fma-7.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/fms-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/fms-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/fms-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/fnma-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/fnma-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/fnma-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/fnma-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/fnma-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/fnma-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/fnma-7.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/fnms-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/fnms-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/fnms-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/init-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/init-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/init-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/init-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/init-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/init-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/init-7.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-7.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-8.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/ior-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/ior-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/ior-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/mask-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/mask-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/mask-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-ceil-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-floor-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-iceil-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-iceil-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-ifloor-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-ifloor-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-irint-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-irint-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-iround-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-iround-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-lceil-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-lceil-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-lceil-rv32-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-lceilf-rv64-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-lfloor-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-lfloor-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-lfloor-rv32-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-lfloorf-rv64-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-llceil-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-llceilf-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-llfloor-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-llfloorf-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-llrint-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-llrintf-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-llrintf16-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-llround-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-llroundf-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-llroundf16-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-lrint-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-lrint-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-lrint-rv32-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-lrintf-rv64-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-lrintf16-rv32-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-lrintf16-rv64-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-lround-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-lround-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-lround-rv32-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-lroundf-rv64-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-lroundf16-rv32-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-lroundf16-rv64-0.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-nearbyint-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-rint-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-round-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-roundeven-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/math-trunc-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/max-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/merge-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/merge-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/merge-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/merge-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/merge-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/merge-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/merge-7.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/min-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/minus-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/minus-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/minus-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/misalign-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/mod-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/mov-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/mov-10.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/mov-11.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/mov-12.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/mov-13.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/mov-14.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/mov-15.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/mov-16.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/mov-17.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/mov-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/mov-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/mov-7.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/mov-8.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/mov-9.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/mulh-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/mult-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/narrow-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/narrow-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/narrow-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/neg-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/neg-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/not-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/perm-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/perm-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/perm-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/perm-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/perm-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/perm-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/perm-7.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/plus-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/plus-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/plus-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/reduc-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/reduc-10.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/reduc-11.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/reduc-12.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/reduc-13.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/reduc-14.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/reduc-15.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/reduc-16.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/reduc-17.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/reduc-18.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/reduc-19.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/reduc-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/reduc-20.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/reduc-21.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/reduc-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/reduc-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/reduc-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/reduc-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/reduc-7.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/reduc-8.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/reduc-9.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/repeat-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/repeat-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/repeat-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/repeat-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/repeat-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/repeat-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/repeat-7.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/repeat-8.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/repeat-9.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/series-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/series-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/series-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/series-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/shift-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/shift-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/shift-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/shift-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/shift-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/shift-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/spill-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/spill-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/spill-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/spill-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/spill-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/sqrt-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/trailing-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/trailing-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/trailing-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/trailing-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/trailing-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/trailing-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/trailing-7.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/trunc-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/trunc-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/trunc-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/trunc-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/trunc-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-10.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-11.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-12.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-13.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-14.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-15.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-16.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-17.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-18.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-19.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-20.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-21.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-22.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-5.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-6.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-7.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-8.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/vec-set-9.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/wadd-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/wadd-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/wadd-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/wadd-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/wfma-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/wfma-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/wfma-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/wfms-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/wfnma-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/wfnms-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/wmul-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/wmul-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/wmul-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/wred-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/wred-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/wred-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/wsub-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/wsub-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/wsub-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/vls/wsub-4.c: Ditto
	* gcc.target/riscv/rvv/autovec/widen/widen_reduc-1.c: Ditto
	* gcc.target/riscv/rvv/autovec/widen/widen_reduc_order-2.c: Ditto
	* gcc.target/riscv/rvv/autovec/zve32f-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/zve32x-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/zve64d-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/zve64f-3.c: Ditto
	* gcc.target/riscv/rvv/autovec/zve64x-3.c: Ditto
	* gcc.target/riscv/rvv/base/cpymem-1.c: Ditto
	* gcc.target/riscv/rvv/base/cpymem-2.c: Ditto
	* gcc.target/riscv/rvv/rvv.exp: Ditto
	* gcc.target/riscv/rvv/vsetvl/pr111255.c: Ditto
	* gcc.target/riscv/rvv/vsetvl/vsetvl_bug-1.c: Ditto
	* gcc.target/riscv/rvv/vsetvl/vsetvl_bug-2.c: Ditto

Signed-off-by: demin.han <demin.han@starfivetech.com>

diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
index 9ae86d52a75fdad4904261b9af560dfa4fb48287..392b9169240df66127efd1a94caacaae7e8829f8 100644 (file)
--- a/gcc/config/riscv/riscv-opts.h
+++ b/gcc/config/riscv/riscv-opts.h
@@ -74,7 +74,7 @@ enum stack_protector_guard {
 };
 
 /* RISC-V auto-vectorization RVV LMUL.  */
-enum riscv_autovec_lmul_enum {
+enum rvv_max_lmul_enum {
   RVV_M1 = 1,
   RVV_M2 = 2,
   RVV_M4 = 4,
@@ -152,6 +152,6 @@ enum rvv_vector_bits_enum {
 
 /* The maximmum LMUL according to user configuration.  */
 #define TARGET_MAX_LMUL                                                        \
-  (int) (riscv_autovec_lmul == RVV_DYNAMIC ? RVV_M8 : riscv_autovec_lmul)
+  (int) (rvv_max_lmul == RVV_DYNAMIC ? RVV_M8 : rvv_max_lmul)
 
 #endif /* ! GCC_RISCV_OPTS_H */

diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index 967f4e382875dfeee7d5de5ab05a2b537766844e..814c5febabe6683463bc0de8915cf4c0d6b19461 100644 (file)
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -2338,7 +2338,7 @@ preferred_simd_mode (scalar_mode mode)
   if (autovec_use_vlmax_p ())
     {
       /* We use LMUL = 1 as base bytesize which is BYTES_PER_RISCV_VECTOR and
-        riscv_autovec_lmul as multiply factor to calculate the the NUNITS to
+        rvv_max_lmul as multiply factor to calculate the NUNITS to
         get the auto-vectorization mode.  */
       poly_uint64 nunits;
       poly_uint64 vector_size = BYTES_PER_RISCV_VECTOR * TARGET_MAX_LMUL;

diff --git a/gcc/config/riscv/riscv-vector-costs.cc b/gcc/config/riscv/riscv-vector-costs.cc
index 5ac8655b4d872dc46dee59021c19582f95ebab29..f462c272a6e5918f98d51859ea0cc57fb03d94eb 100644 (file)
--- a/gcc/config/riscv/riscv-vector-costs.cc
+++ b/gcc/config/riscv/riscv-vector-costs.cc
@@ -890,7 +890,7 @@ costs::record_potential_unexpected_spills (loop_vec_info loop_vinfo)
 {
   /* We only want to apply the heuristic if LOOP_VINFO is being
      vectorized for VLA and known NITERS VLS loop.  */
-  if (riscv_autovec_lmul == RVV_DYNAMIC
+  if (rvv_max_lmul == RVV_DYNAMIC
       && (m_cost_type == VLA_VECTOR_COST
          || (m_cost_type == VLS_VECTOR_COST
              && LOOP_VINFO_NITERS_KNOWN_P (loop_vinfo))))
@@ -998,7 +998,7 @@ costs::better_main_loop_than_p (const vector_costs *uncast_other) const
          return other_prefer_unrolled;
        }
     }
-  else if (riscv_autovec_lmul == RVV_DYNAMIC)
+  else if (rvv_max_lmul == RVV_DYNAMIC)
     {
       if (other->m_has_unexpected_spills_p)
        {

diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
index 710c0a41870b401a44012ad2295d72ce7b0ce772..7d625af02d52f86f03a4b30c627c9216451aac34 100644 (file)
--- a/gcc/config/riscv/riscv.opt
+++ b/gcc/config/riscv/riscv.opt
@@ -531,27 +531,27 @@ Target RejectNegative Joined UInteger Var(riscv_strcmp_inline_limit) Init(64)
 Max number of bytes to compare as part of inlined strcmp/strncmp routines (default: 64).
 
 Enum
-Name(riscv_autovec_lmul) Type(enum riscv_autovec_lmul_enum)
-The RVV possible LMUL (-param=riscv-autovec-lmul=):
+Name(rvv_max_lmul) Type(enum rvv_max_lmul_enum)
+The RVV possible LMUL (-mrvv-max-lmul=):
 
 EnumValue
-Enum(riscv_autovec_lmul) String(m1) Value(RVV_M1)
+Enum(rvv_max_lmul) String(m1) Value(RVV_M1)
 
 EnumValue
-Enum(riscv_autovec_lmul) String(m2) Value(RVV_M2)
+Enum(rvv_max_lmul) String(m2) Value(RVV_M2)
 
 EnumValue
-Enum(riscv_autovec_lmul) String(m4) Value(RVV_M4)
+Enum(rvv_max_lmul) String(m4) Value(RVV_M4)
 
 EnumValue
-Enum(riscv_autovec_lmul) String(m8) Value(RVV_M8)
+Enum(rvv_max_lmul) String(m8) Value(RVV_M8)
 
 EnumValue
-Enum(riscv_autovec_lmul) String(dynamic) Value(RVV_DYNAMIC)
+Enum(rvv_max_lmul) String(dynamic) Value(RVV_DYNAMIC)
 
--param=riscv-autovec-lmul=
-Target RejectNegative Joined Enum(riscv_autovec_lmul) Var(riscv_autovec_lmul) Init(RVV_M1)
--param=riscv-autovec-lmul=<string>     Set the RVV LMUL of auto-vectorization in the RISC-V port.
+mrvv-max-lmul=
+Target RejectNegative Joined Enum(rvv_max_lmul) Var(rvv_max_lmul) Init(RVV_M1)
+-mrvv-max-lmul=<string>        Set the RVV LMUL of auto-vectorization.
 
 madjust-lmul-cost
 Target Var(TARGET_ADJUST_LMUL_COST) Init(0)

diff --git a/gcc/testsuite/g++.target/riscv/rvv/autovec/bug-2.C b/gcc/testsuite/g++.target/riscv/rvv/autovec/bug-2.C
index 53bc4a3007251fa993524880c61ef914a6a0dd6e..1234ae47ce77f26a11de7295d7eeb722c996dd41 100644 (file)
--- a/gcc/testsuite/g++.target/riscv/rvv/autovec/bug-2.C
+++ b/gcc/testsuite/g++.target/riscv/rvv/autovec/bug-2.C
@@ -1,4 +1,4 @@
-/* { dg-options "-march=rv64gc_zve32f -mabi=lp64d -O3 --param=riscv-autovec-lmul=m4" } */
+/* { dg-options "-march=rv64gc_zve32f -mabi=lp64d -O3 -mrvv-max-lmul=m4" } */
 
 int max(int __b) {
   if (0 < __b)

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-ice-1.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-ice-1.c
index 4f019ccae6b34212d6e18d7bb100593399796a9f..9e83a24b416d926082fd1d6ee99d4f8b88804d5a 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-ice-1.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-ice-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic" } */
 
 int a, *b[9], c, d, e; 
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-ice-2.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-ice-2.c
index 6fc8062f23b08867c22fb3bec17c5a8df6314ef5..cd354d702ed6101a21a6fbe11aa1d6efce4f631b 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-ice-2.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-ice-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -Ofast -ftree-vectorize --param riscv-autovec-lmul=dynamic" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -Ofast -ftree-vectorize -mrvv-max-lmul=dynamic" } */
 
 typedef struct rtx_def *rtx;
 struct replacement {

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-ice-3.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-ice-3.c
index c1f698b9a68724c9c955e0c30d4b3d2c7e21ccf6..c0a7e1c35e6cbc3cbbb15390bb90779d55da7450 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-ice-3.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-ice-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O2 -ftree-vectorize -flto -fno-use-linker-plugin -flto-partition=none --param riscv-autovec-lmul=dynamic" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O2 -ftree-vectorize -flto -fno-use-linker-plugin -flto-partition=none -mrvv-max-lmul=dynamic" } */
 
 void (*foo[6][6]) (int);
 void bar (hdR)

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-mixed-1.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-mixed-1.c
index e654fc6bf846132a2bf966c2e7a7f4ddce79273e..8d0002805db723aefd51018c2215bae14753b44f 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-mixed-1.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-mixed-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-1.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-1.c
index f481c8094c9a52d149dd3dee96e3c612f1b93e88..d5fd0f2e32065e0dddf17362b4e7b3ac0d56086e 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-1.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-2.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-2.c
index e044c65e7f259a8cdcc781551d768cb34a1d2a6d..a0e61303e80f53f7b3d4e0acf08ee5f1b74746b5 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-2.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fno-schedule-insns -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fno-schedule-insns -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-3.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-3.c
index 212788a93c3fd7e0f491849d1403c817595b9d5d..2111c0bbc9a26a32166319eb01fd5d9ae1bb54fb 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-3.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-4.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-4.c
index 2e2ff9dc74ac33334cc475bb66ffa4126d880433..c47a4c4ceb175ffd8c0c41308da4e3bd2aeb35b4 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-4.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-5.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-5.c
index 80eb38c9986f4363cb32bd3715c82e7825e9b8ec..e4b74f037e3b492d116798ce7a65d9fc7b3cd076 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-5.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-6.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-6.c
index 3dd594e3f6eab8f117a27f318ebb0300d6f9b623..73d16dab7324d4ed38fec6fe6fa988e62f09a93f 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-6.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-6.c
@@ -1,6 +1,6 @@
 
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-7.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-7.c
index a8c98c40d6e92352752addba9744e5f03876a00a..b76bb4b06b4bc1d400a9d41acec443ec3f38098c 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-7.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -Wno-psabi -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -Wno-psabi -fdump-tree-vect-details" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-1.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-1.c
index 0079aa02a85383224b9a79488d010b97e04afd46..6637f3c3e3f4c5332db7c68896650edbe3fef5ac 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-1.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-2.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-2.c
index d8a0e66a65e7fc223d36434baabec2bb9f277dc9..554512245c023df2a012bf30457fa489c123761d 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-2.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-3.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-3.c
index 0079aa02a85383224b9a79488d010b97e04afd46..6637f3c3e3f4c5332db7c68896650edbe3fef5ac 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-3.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-4.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-4.c
index 23269196b85621508f812bbad856ff33ec3ff34d..a8e603f90f36f1c5f22e1bf67710e941a67bcb49 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-4.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-5.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-5.c
index 2ef88a307bce817d934bb700973d699e35ca2183..dcb20a302c83883056b324c44018e3f37c251eea 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-5.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 typedef int8_t v128qi __attribute__ ((vector_size (128)));

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-6.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-6.c
index 5eec2b0c4dab7a5373587000d84f1a401f24d5bd..f5d1a02736a78ee022a996b7dee4300b3803e9af 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-6.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 typedef int8_t v128qi __attribute__ ((vector_size (128)));

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-7.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-7.c
index 38cbefbe6255e83b43a681d0b9726dc0d91e9a9f..49ea3c2cf7251b185660f6a4762f97db5b6c0e7c 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-7.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic" } */
 
 int
 x264_pixel_8x8 (unsigned char *pix1, unsigned char *pix2, int i_stride_pix2)

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-1.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-1.c
index 08dc7ca92dd575ec2ce8e01cb004011a4611d602..650821391825916bd35e9dde535d19015642d945 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-1.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-10.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-10.c
index e47af25aa9b92a9243bc5ba8dedf186e9d24f093..4a372edea5a4d3d215907fb8a6d2ed41f0763456 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-10.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 int
 bar (int *x, int a, int b, int n)

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-11.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-11.c
index 48b24279b553b4acc214195325755f25d7e62e96..0f0cd595a951858cbb91cdbad327be8865a5a0ac 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-11.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 void
 foo (int *__restrict a, int *__restrict b, int *__restrict c, int *__restrict d,

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-12.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-12.c
index 0cb492e611c925cb8b9ab432482e5f6139a8efcd..29e6dfc223e4211d807bd86fa3affd3b56d6c75d 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-12.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 void
 f (int *restrict a, int *restrict b, int *restrict c, int *restrict d,

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-2.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-2.c
index b9a9229ed9f82e9feb5d36b0622752a0ad2dd5ce..95742e2a7a15c5df6eb4bf94d6fb0bea4ca39688 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-2.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-3.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-3.c
index 9af91b0b8639ecc963b4a9910d39dcba60640b5a..85e3021f1c2b671aa4b026bd5dc6646c8d792357 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-3.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-5.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-5.c
index 2a881da0b0178bc27f8f5ec8f78bdf65e91053a0..c4cb2081f93093f786bda90dcb674326b993f1c1 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-5.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-6.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-6.c
index b23acebc916029748f6ffcf89b3077d92289025c..3734b5c18a745df3ae933541e29bcefe0bffe621 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-6.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -mrvv-vector-bits=scalable -fselective-scheduling -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -mrvv-vector-bits=scalable -fselective-scheduling -fdump-tree-vect-details" } */
 /* { dg-additional-options "-fno-schedule-insns -fno-schedule-insns2" } */
 
 #include <stdint-gcc.h>

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-7.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-7.c
index 45bceaac0eb8348b3a2405f0b8a39c4550296459..1d37a516a76f19d76f17f2f6121570418e884cab 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-7.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-8.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-8.c
index ef719ee8445c57fb3e025d59d0725417dacfeb15..756176d421265c9c74df9d18c6faecf24a7c81c1 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-8.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -mrvv-vector-bits=scalable -fselective-scheduling -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -mrvv-vector-bits=scalable -fselective-scheduling -fdump-tree-vect-details" } */
 /* { dg-additional-options "-fno-schedule-insns -fno-schedule-insns2" } */
 
 #include <stdint-gcc.h>

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-9.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-9.c
index 7fda83ab978063e2d8a3226da9df716df0b0fe61..46450f4313318a514fbf55fccefea70466d9a780 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-9.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fselective-scheduling -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fselective-scheduling -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-1.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-1.c
index 702a3b74f9a32776b5d568e1817137777ff392f5..87e6b099069d9cb7525ee1b785fe3c3bd24937e1 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-1.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-10.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-10.c
index 95b0600a9d7f7141b12d544576bdd186d3c7bb71..bd5aa80f0ba1f1356bf29ef45bad560373bc3910 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-10.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-11.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-11.c
index 83df2bc46e580fc87f1e0fdfcce20bd558ac86bc..c9e282512250247d66bc7cf809208cf7fdf146f8 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-11.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-12.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-12.c
index 8a2ebf56144fde6a8dc3f7d7b250ed73dc6869c8..9fa6b69a7c9da5940d61631400b670512125e0f7 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-12.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -mrvv-vector-bits=scalable -fselective-scheduling -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -mrvv-vector-bits=scalable -fselective-scheduling -fdump-tree-vect-details" } */
 
 void
 foo (int *restrict a, int *restrict b, int n)

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-13.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-13.c
index baef4e390143c372b65dd6c37421d77a4cbd6ee6..40a3acd408873839189d301b3aa4f50a1708dc3e 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-13.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-13.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 void
 f (int *restrict a, int *restrict b, int *restrict c, int *restrict d, int n)

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-14.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-14.c
index 0d42c3b27cbe308b17b0ed536e906e0fdebdbd52..9a9bb487504992a3e3693c364ee4cacab05614e7 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-14.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-14.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 void
 f (int *restrict a, int *restrict b, int *restrict c, int *restrict d, int x,

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-2.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-2.c
index c3d0d5d574c2352764131a4a464b61654c527f96..15c615fa1cf1a4d7a1e4b347f67be49d2061d8c2 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-2.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-3.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-3.c
index a575427f8cd107749da502b2e6a603ff1250c480..c0f55a49a79e34a7e981403da8588c9c5966b620 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-3.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-4.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-4.c
index b55bcad6a2754fee7771bf366efffbb7eb798db3..91af60d717a74a9bec8a32ad135607ae8526ec2c 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-4.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 #include <stddef.h>

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-5.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-5.c
index 307dd69e2c48808a880b8884c6922540ee355ce4..ba2822f2e53995e7d791ecbf1defcb587ee2d5e9 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-5.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-6.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-6.c
index 9a7eb421d8816e1a2c6e3616df16751b12a876a0..d8c365330b483c3e83d4d8c4fb20c491d4a8deaa 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-6.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-7.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-7.c
index 103d22b23afd8c566e3b2e15475b4d4b037e6057..33012ec11d43a1c4ad101980bf255f75a5f1e98c 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-7.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-8.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-8.c
index 0255bdf8cc6d76b538853ce204725b4348d30d08..aad04c48b67910f8339bfdf052da585abffc81cc 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-8.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-9.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-9.c
index e6cc1ad83e615441720ec35ca9217672bd032065..f045f857cc3fe8de16ebec8c593455efeb4a2a07 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-9.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/no-dynamic-lmul-1.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/no-dynamic-lmul-1.c
index 6752f254fee316267b6161d62c5cc15dd10d332b..2e7baa3b8afc4cf83dcd43fc133d136640e4c5f1 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/no-dynamic-lmul-1.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/no-dynamic-lmul-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr111317.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr111317.c
index d4bea242a9a0ff0bd1d5f6c515f051fb73441939..8b4d9724102680f03dec6f2a4109733532856efd 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr111317.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr111317.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param=riscv-autovec-lmul=m1" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=m1" } */
 
 void
 foo (char *__restrict a, short *__restrict b, int n)

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr111848.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr111848.c
index 5a673f509f4f711595357b3a9183cae96145e03d..339c80f8805a0ed23915e1f7cb14be8c19281c31 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr111848.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr111848.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -fdump-tree-vect-details" } */
 
 #include <stdint-gcc.h>
 void

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-1.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-1.c
index 6d8a1d42492cd240f286be8f7dce33fef8412d5c..7f97c42853485af2d4eda8928a80079054df5fea 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-1.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -mrvv-vector-bits=zvl -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -mrvv-vector-bits=zvl -fdump-tree-vect-details" } */
 
 #define N 40
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-2.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-2.c
index 9401e395c4068a9a585c67b0967764a8afa0fb5d..fd27b2964b500d7a4cd993c962af7edd2b51909b 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-2.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -mrvv-vector-bits=zvl -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -mrvv-vector-bits=zvl -fdump-tree-vect-details" } */
 
 #define TYPE double
 #define N 200

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-3.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-3.c
index 07e0cdfbc85a3d1adc2c7bde6d6d63b63cfd18e8..86241e705767776ca997254a5bb635537b230ab1 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-3.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -mrvv-vector-bits=zvl" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -mrvv-vector-bits=zvl" } */
 
 int f[12][100];
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-4.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-4.c
index 215f6de6572aa7be6630bfce1d18cb9eb2f8e51f..a7ee7b0b6132135c9feb32dd3454df15147ca4e4 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-4.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -Ofast -ftree-vectorize --param riscv-autovec-lmul=dynamic -mrvv-vector-bits=zvl -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -Ofast -ftree-vectorize -mrvv-max-lmul=dynamic -mrvv-vector-bits=zvl -fno-schedule-insns -fno-schedule-insns2" } */
 
 typedef struct rtx_def *rtx;
 struct replacement {

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-5.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-5.c
index 9ab2ab94c7949005fe185f08cb6af836daa3cee6..263d41b5a0710adfe0169c12a3e03f63b58ed03c 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-5.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param riscv-autovec-lmul=dynamic -mrvv-vector-bits=zvl -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -mrvv-vector-bits=zvl -fno-schedule-insns -fno-schedule-insns2" } */
 
 typedef struct {
   int iatom[3];

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113247-1.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113247-1.c
index 0d09a624a005348733b6f5d69bc11b3210b25811..0c76bcc904a44bc1bbb533b20e9b7e3329a0e198 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113247-1.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113247-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param=riscv-autovec-lmul=dynamic" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113247-2.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113247-2.c
index af3712c55e4d557032b0c8cb1ea1ac4ab817c861..309dcf7f79e5c2a5370d8fb0eb8d9ddeed8f0141 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113247-2.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113247-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param=riscv-autovec-lmul=dynamic -mrvv-vector-bits=zvl" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic -mrvv-vector-bits=zvl" } */
 
 #include "pr113247-1.c"
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113281-3.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113281-3.c
index 706e19116c94cb7b6b07b14d6c221af669174ec4..d8402dc411897171979b4d4d5b884ac4d8cfd198 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113281-3.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113281-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -ftree-vectorize --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=m8" } */
 
 unsigned char a;
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113281-4.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113281-4.c
index 3947a9ae671ad846c7994229386ed43281ec0491..a5319e9b7d21ba0fc4be25a1c5cca2e4aec22119 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113281-4.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113281-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -ftree-vectorize --param=riscv-autovec-lmul=m8 -mrvv-vector-bits=zvl" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=m8 -mrvv-vector-bits=zvl" } */
 
 unsigned char a;
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113281-5.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113281-5.c
index d3f5717b87402b54145024cb0acd6979fbc9a387..0163129be1877fbacc24f80ed5aaa5df6cc502dd 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113281-5.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113281-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -ftree-vectorize --param=riscv-autovec-lmul=dynamic" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic" } */
 
 unsigned char a;
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr114264.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr114264.c
index 7853f292af760245e910b7a3e31d7ea7e466abcd..e51d80e56820873642b22157a0368f813e0f7d26 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr114264.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr114264.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param=riscv-autovec-lmul=dynamic" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -mrvv-max-lmul=dynamic" } */
 
 char *jpeg_difference7_input_buf;
 void

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-10.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-10.c
index 89a6c6789603f7d73d5fd12d5df5fc44a04c784b..144479324d7578127d50d736c4b45e227c442358 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-10.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 --param=riscv-autovec-lmul=m4 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -mrvv-max-lmul=m4 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-11.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-11.c
index 86732ef2ce50f27875272c0276f53a0bd594fe3b..13ae8bd3bcfac28e70ca833335ef88bb386aa998 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-11.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-12.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-12.c
index a1fcb3f344362c35bb93c81f2fd88f80615b8b7e..1f9fa48264e1720090749d87679bb3bd145c3027 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-12.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 --param=riscv-autovec-lmul=dynamic -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -mrvv-max-lmul=dynamic -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-2.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-2.c
index ca203f5084718d8524308a8335591f5804e09079..4a979df012676793a7530e56a931ac8f9bfd895c 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-2.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 --param=riscv-autovec-lmul=m2" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -mrvv-max-lmul=m2" } */
 
 void
 foo (int *__restrict a, int *__restrict b, int *__restrict c)

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-3.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-3.c
index f8e533507856863e975243b7fa2c0caca6991749..d48375b3349a29395b7e596aa52c5fd74b12e174 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-3.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 --param=riscv-autovec-lmul=m4" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -mrvv-max-lmul=m4" } */
 
 void
 foo (int *__restrict a, int *__restrict b, int *__restrict c)

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-4.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-4.c
index 4859d570c0c0c8b9fd3d44eb20256ec2ddfb8ac6..36dc0ad2263fb5ca2cb40691e6ae5e113d6ae33a 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-4.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 void
 foo (int *__restrict a, int *__restrict b, int *__restrict c)

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-5.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-5.c
index 8a568028bcf901c5d4078f8891045e3c047cd594..993fae0f02a12679e1dd4441e0efff217a6f8d93 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-5.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 --param=riscv-autovec-lmul=dynamic" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -mrvv-max-lmul=dynamic" } */
 
 void
 foo (int *__restrict a, int *__restrict b, int *__restrict c)

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-6.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-6.c
index 46ebd5fd49b6db831d7a3db5c14221a21d6e87bd..7fd8397fed03d2de052e9ed7be734dbc4aefc857 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-6.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 void
 foo (int *__restrict a, int *__restrict b, int *__restrict c)

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-7.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-7.c
index f5aceca32d7ce8f2aded6dff5d68d6d7dd456920..1519a0dfdb7b5eb033e2237779684acb46d8e20b 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-7.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 --param=riscv-autovec-lmul=dynamic" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -mrvv-max-lmul=dynamic" } */
 
 void
 foo (int *__restrict a, int *__restrict b, int *__restrict c)

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-9.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-9.c
index 7f03cb9ecbe04863a1106b2d3793852231b37c62..cb4abeca98989f25f2eaac706e4065f64bab6d31 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-9.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 --param=riscv-autovec-lmul=m2" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -mrvv-max-lmul=m2" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-1.c
index 86ad19cb17b3210262061556adce6119bef4636d..5222b1cd0f053f5493950267a200498c9d60d0cc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl256b -mabi=lp64d --param=riscv-autovec-lmul=m8 -mrvv-vector-bits=zvl  -fno-vect-cost-model -O3 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl256b -mabi=lp64d -mrvv-max-lmul=m8 -mrvv-vector-bits=zvl  -fno-vect-cost-model -O3 -fdump-tree-optimized" } */
 
 #include <assert.h>
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-2.c
index 07f9d91dfd3be98dacfcb8ca6fbe0d111b0f1ab6..a6dbbaafc75b4d193be6a6cc075a1a2dc3d31b29 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-2.c
@@ -1,6 +1,6 @@
 /* { dg-do run } */
 /* { dg-require-effective-target riscv_v } */
-/* { dg-options "--param=riscv-autovec-lmul=m8 -mrvv-vector-bits=scalable -ftree-vectorize -fno-tree-loop-distribute-patterns -fno-vect-cost-model -fno-common -O2" } */
+/* { dg-options "-mrvv-max-lmul=m8 -mrvv-vector-bits=scalable -ftree-vectorize -fno-tree-loop-distribute-patterns -fno-vect-cost-model -fno-common -O2" } */
 
 #define N 128 
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-3.c
index 9af5add3ff9d9f2f2dd8f3c86634a7cff6907688..05ac2e54cbed2ba43949289bee0fa46b22546753 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl512b -mabi=lp64d --param=riscv-autovec-lmul=m8 -mrvv-vector-bits=scalable -fno-vect-cost-model -O2 -ffast-math" } */
+/* { dg-options "-march=rv64gcv_zvl512b -mabi=lp64d -mrvv-max-lmul=m8 -mrvv-vector-bits=scalable -fno-vect-cost-model -O2 -ffast-math" } */
 
 #define N 16
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-4.c
index 1b6ad2654fc671e2e28465e3f5232f7feb01c6ab..a2e353bdf32c8c4eeebc0987c6407bbc018ad8c8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc_zve32f -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -mrvv-vector-bits=zvl" } */
+/* { dg-options "-march=rv64gc_zve32f -mabi=lp64d -O3 -mrvv-max-lmul=m8 -mrvv-vector-bits=zvl" } */
 
 typedef struct {
   short a;

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-5.c
index 1a3fc1690e69c82cf6b218c90b5274bf69fd9f3b..cff18b14d33be98471be5ac4b95fb8689a9fb6bf 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc_zve32f -mabi=lp64d -O2 --param=riscv-autovec-lmul=m4 -mrvv-vector-bits=zvl" } */
+/* { dg-options "-march=rv64gc_zve32f -mabi=lp64d -O2 -mrvv-max-lmul=m4 -mrvv-vector-bits=zvl" } */
 
 typedef unsigned char u8;
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-8.c
index 91fc5dd9f4d829eb46fa8f1f8634bf67b7dbde1f..6009a512a51927223d518fca62e4df4fb8d59870 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gc_zve32f -mabi=ilp32d -O3 --param=riscv-autovec-lmul=m2 -mrvv-vector-bits=zvl" } */
+/* { dg-options "-march=rv32gc_zve32f -mabi=ilp32d -O3 -mrvv-max-lmul=m2 -mrvv-vector-bits=zvl" } */
 
 union U
 {

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cmp/cmp_vi-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cmp/cmp_vi-3.c
index c9003279b0c887f8561c755c3017facf43960831..54ad8c5970265b6c5aac40a1d7dc50ca172fc956 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cmp/cmp_vi-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cmp/cmp_vi-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 --param=riscv-autovec-lmul=dynamic -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -mrvv-max-lmul=dynamic -fdump-tree-optimized-details" } */
 
 #include "macro.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cmp/cmp_vi-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cmp/cmp_vi-4.c
index 544ff751522186e2b96f42360542cac238f55636..033ed1044358bc8ef6f934cf57ce590c28dcba9b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cmp/cmp_vi-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cmp/cmp_vi-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 --param=riscv-autovec-lmul=dynamic -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -mrvv-max-lmul=dynamic -fdump-tree-optimized-details" } */
 
 #include "macro.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cmp/cmp_vi-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cmp/cmp_vi-7.c
index 63ded00947dce42dabf72d5948cee1d9c8967ce2..b38afaf80cfb6d13275636eecf9d7c5501df3f96 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cmp/cmp_vi-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cmp/cmp_vi-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 --param=riscv-autovec-lmul=dynamic -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -mrvv-max-lmul=dynamic -fdump-tree-optimized-details" } */
 
 #include "macro.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cmp/cmp_vi-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cmp/cmp_vi-8.c
index f29b5f12c513e7b13aebfb783a08ad20c06ea915..54ebcdf6385d020b395c47b7bdc33e231f525755 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cmp/cmp_vi-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cmp/cmp_vi-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 --param=riscv-autovec-lmul=dynamic -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -mrvv-max-lmul=dynamic -fdump-tree-optimized-details" } */
 
 #include "macro.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc-1.c
index a80c3b9eded04fcfcf56bfc15663c1d648e07ad3..034b1216a7eed5ddaa29ab7435a750baa721c198 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-additional-options "-march=rv64gcv_zvfh_zvl128b -mabi=lp64d -mrvv-vector-bits=zvl --param riscv-autovec-lmul=m2 -fno-vect-cost-model -ffast-math" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh_zvl128b -mabi=lp64d -mrvv-vector-bits=zvl -mrvv-max-lmul=m2 -fno-vect-cost-model -ffast-math" } */
 #include <stdint-gcc.h>
 
 #define TEST_TYPE(TYPE1, TYPE2, N)                                             \

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc-2.c
index c2a207db0e4d8be1df89a3f65c56b3007899c755..ac3e4394068992272669264ed7ecdfe01e3f1677 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-additional-options "-march=rv64gcv_zvfh_zvl128b -mabi=lp64d -mrvv-vector-bits=scalable --param riscv-autovec-lmul=m2 -fno-vect-cost-model -ffast-math" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh_zvl128b -mabi=lp64d -mrvv-vector-bits=scalable -mrvv-max-lmul=m2 -fno-vect-cost-model -ffast-math" } */
 
 #include "cond_widen_reduc-1.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc_run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc_run-1.c
index 9dbecee49d30e4e685a6d3ba45f364928d53d969..610b6efd14d2daaaf7348b96b158ea28f9a07368 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc_run-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc_run-1.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-additional-options "-mrvv-vector-bits=zvl --param riscv-autovec-lmul=m2 -fno-vect-cost-model -ffast-math" } */
+/* { dg-additional-options "-mrvv-vector-bits=zvl -mrvv-max-lmul=m2 -fno-vect-cost-model -ffast-math" } */
 
 #include "cond_widen_reduc-1.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc_run-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc_run-2.c
index 7c319012156e11d41e46a3300e07ccb8600f8293..887c1c26304c53b61a136309d7c9dffad375ecd5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc_run-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc_run-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-additional-options "-mrvv-vector-bits=scalable --param riscv-autovec-lmul=m2 -fno-vect-cost-model -ffast-math" } */
+/* { dg-additional-options "-mrvv-vector-bits=scalable -mrvv-max-lmul=m2 -fno-vect-cost-model -ffast-math" } */
 
 #include "cond_widen_reduc-2.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/fold-min-poly.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/fold-min-poly.c
index 85917fe46bf3f6dbe50a4adfadcc016c05e85610..cd3b95facd5686b91811014e3f64a1e9ab264f29 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/fold-min-poly.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/fold-min-poly.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options " -march=rv64gcv_zvl128b -mabi=lp64d -O3 -mrvv-vector-bits=scalable --param riscv-autovec-lmul=m1" } */
+/* { dg-options " -march=rv64gcv_zvl128b -mabi=lp64d -O3 -mrvv-vector-bits=scalable -mrvv-max-lmul=m1" } */
 
 void foo1 (int* restrict a, int* restrict b, int n)
 {

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/gimple_fold-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/gimple_fold-1.c
index cf6d742f98fc453699088d57de3f3773072c12e2..297ffdbc456ad9b23c3e9eb965c770c5fcf7ee21 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/gimple_fold-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/gimple_fold-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32d -mrvv-vector-bits=zvl --param riscv-autovec-lmul=m8 -O3 -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32d -mrvv-vector-bits=zvl -mrvv-max-lmul=m8 -O3 -fdump-tree-optimized-details" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/select_vl-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/select_vl-2.c
index ce50d80e0bcb609df93ed5000d26db9353f9c43c..a96e6ffa3153a4fad3533e8f4bb9ee7602a55a2c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/select_vl-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/select_vl-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=scalable -fno-schedule-insns --param riscv-autovec-lmul=m1 -O3 -ftree-vectorize" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=scalable -fno-schedule-insns -mrvv-max-lmul=m1 -O3 -ftree-vectorize" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include <stdint-gcc.h>

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-1.c
index fae1ab590a30db02854692155d20036fee8f9a89..a4424f0bcadfaa1eccb3c9bbe279c71a1e8eb6be 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-1.c
@@ -20,7 +20,7 @@ f (int8_t *restrict a, int8_t *restrict b, int n)
 }
 
 /* FIXME: Since we don't have VECT cost model yet, LOAD_LANES/STORE_LANES are chosen
-   instead of SLP when riscv-autovec-lmul=m1.  */
-/* { dg-final { scan-tree-dump-times "\.VEC_PERM" 1 "optimized" { xfail { any-opts "--param riscv-autovec-lmul=m1" } } } } */
-/* { dg-final { scan-assembler {\tvid\.v} { xfail { any-opts "--param riscv-autovec-lmul=m1" } } } } */
-/* { dg-final { scan-assembler {\tvand} { xfail { any-opts "--param riscv-autovec-lmul=m1" } } } } */
+   instead of SLP when rvv-autotec-max-lmul=m1.  */
+/* { dg-final { scan-tree-dump-times "\.VEC_PERM" 1 "optimized" { xfail { any-opts "-mrvv-max-lmul=m1" } } } } */
+/* { dg-final { scan-assembler {\tvid\.v} { xfail { any-opts "-mrvv-max-lmul=m1" } } } } */
+/* { dg-final { scan-assembler {\tvand} { xfail { any-opts "-mrvv-max-lmul=m1" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-16.c
index 02fb365f528921a2450ca75fe5fe1821f3b8a121..1c7503b770eef9730d53b441fa6484ed4d113f3b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-16.c
@@ -20,7 +20,7 @@ f (uint8_t *restrict a, uint8_t *restrict b, int n)
 }
 
 /* FIXME: Since we don't have VECT cost model yet, LOAD_LANES/STORE_LANES are chosen
-   instead of SLP when riscv-autovec-lmul=m1.  */
-/* { dg-final { scan-tree-dump-times "\.VEC_PERM" 1 "optimized" { xfail { any-opts "--param riscv-autovec-lmul=m1" } } } } */
-/* { dg-final { scan-assembler {\tvid\.v} { xfail { any-opts "--param riscv-autovec-lmul=m1"} } } } */
+   instead of SLP when rvv-autotec-max-lmul=m1.  */
+/* { dg-final { scan-tree-dump-times "\.VEC_PERM" 1 "optimized" { xfail { any-opts "-mrvv-max-lmul=m1" } } } } */
+/* { dg-final { scan-assembler {\tvid\.v} { xfail { any-opts "-mrvv-max-lmul=m1"} } } } */
 /* { dg-final { scan-assembler-not {\tvmul} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-17.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-17.c
index 3adec12a60ca250b42d6de085cebe4967223b217..0da6658fcfa8ab1e9d040c8bf8ec071b05016220 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-17.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-17.c
@@ -30,7 +30,7 @@ f (uint8_t *restrict a, uint8_t *restrict b,
 }
 
 /* FIXME: Since we don't have VECT cost model yet, LOAD_LANES/STORE_LANES are chosen
-   instead of SLP when riscv-autovec-lmul=m1.  */
-/* { dg-final { scan-tree-dump-times "\.VEC_PERM" 2 "optimized" { xfail { any-opts "--param riscv-autovec-lmul=m1" } } } } */
-/* { dg-final { scan-assembler {\tvid\.v} { xfail { any-opts "--param riscv-autovec-lmul=m1" } } } } */
+   instead of SLP when rvv-autotec-max-lmul=m1.  */
+/* { dg-final { scan-tree-dump-times "\.VEC_PERM" 2 "optimized" { xfail { any-opts "-mrvv-max-lmul=m1" } } } } */
+/* { dg-final { scan-assembler {\tvid\.v} { xfail { any-opts "-mrvv-max-lmul=m1" } } } } */
 /* { dg-final { scan-assembler-not {\tvmul} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-18.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-18.c
index 8f1a7e12c1f9b99296f0097784e9b5e32e9f843e..cedd3f6e9843d2a972885f6094f4a4a5cafbd551 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-18.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-18.c
@@ -22,7 +22,7 @@ f (float *restrict a, float *restrict b,
 }
 
 /* FIXME: Since we don't have VECT cost model yet, LOAD_LANES/STORE_LANES are chosen
-   instead of SLP when riscv-autovec-lmul=m1 or m2.  */
-/* { dg-final { scan-tree-dump-times "\.VEC_PERM" 2 "optimized" { xfail { any-opts "--param riscv-autovec-lmul=m1" "--param riscv-autovec-lmul=m2" } } } } */
-/* { dg-final { scan-assembler {\tvid\.v} { xfail { any-opts "--param riscv-autovec-lmul=m1" "--param riscv-autovec-lmul=m2" } } } } */
+   instead of SLP when rvv-autotec-max-lmul=m1 or m2.  */
+/* { dg-final { scan-tree-dump-times "\.VEC_PERM" 2 "optimized" { xfail { any-opts "-mrvv-max-lmul=m1" "-mrvv-max-lmul=m2" } } } } */
+/* { dg-final { scan-assembler {\tvid\.v} { xfail { any-opts "-mrvv-max-lmul=m1" "-mrvv-max-lmul=m2" } } } } */
 /* { dg-final { scan-assembler-not {\tvmul} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-19.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-19.c
index 2fa6168ca9c09451421954b2a9b7498e6bb00409..d386c4ff8a87687e58fc0d9e80cffd37f9a1fbd6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-19.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-19.c
@@ -22,7 +22,7 @@ f (float *restrict a, float *restrict b,
 }
 
 /* FIXME: Since we don't have VECT cost model yet, LOAD_LANES/STORE_LANES are chosen
-   instead of SLP when riscv-autovec-lmul=m1 or m2.  */
-/* { dg-final { scan-tree-dump "\.VEC_PERM" "optimized" { xfail { any-opts "--param riscv-autovec-lmul=m1" "--param riscv-autovec-lmul=m2" } } } } */
-/* { dg-final { scan-assembler {\tvid\.v} { xfail { any-opts "--param riscv-autovec-lmul=m1" "--param riscv-autovec-lmul=m2" } } } } */
+   instead of SLP when rvv-autotec-max-lmul=m1 or m2.  */
+/* { dg-final { scan-tree-dump "\.VEC_PERM" "optimized" { xfail { any-opts "-mrvv-max-lmul=m1" "-mrvv-max-lmul=m2" } } } } */
+/* { dg-final { scan-assembler {\tvid\.v} { xfail { any-opts "-mrvv-max-lmul=m1" "-mrvv-max-lmul=m2" } } } } */
 /* { dg-final { scan-assembler-not {\tvmul} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-2.c
index 08ac776b4fe30bd5540e76d98dbe29e7b942c371..68991a1caebb21344e76e021f942e70a69c81761 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-2.c
@@ -20,5 +20,5 @@ f (int16_t *restrict a, int16_t *restrict b, int n)
 }
 
 /* FIXME: Since we don't have VECT cost model yet, LOAD_LANES/STORE_LANES are chosen
-   instead of SLP when riscv-autovec-lmul=m1.  */
-/* { dg-final { scan-tree-dump-times "\.VEC_PERM" 1 "optimized" { xfail { any-opts "--param riscv-autovec-lmul=m1" } } } } */
+   instead of SLP when rvv-autotec-max-lmul=m1.  */
+/* { dg-final { scan-tree-dump-times "\.VEC_PERM" 1 "optimized" { xfail { any-opts "-mrvv-max-lmul=m1" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-3.c
index 88598e67626a23c533849e5d9d38d5ab2d96fb84..35659d290767a4d28b4f9ed92bc272a9adb1f523 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-3.c
@@ -20,5 +20,5 @@ f (int8_t *restrict a, int8_t *restrict b, int n)
 }
 
 /* FIXME: Since we don't have VECT cost model yet, LOAD_LANES/STORE_LANES are chosen
-   instead of SLP when riscv-autovec-lmul=m1.  */
-/* { dg-final { scan-tree-dump-times "\.VEC_PERM" 1 "optimized" { xfail { any-opts "--param riscv-autovec-lmul=m1" } } } } */
+   instead of SLP when rvv-autotec-max-lmul=m1.  */
+/* { dg-final { scan-tree-dump-times "\.VEC_PERM" 1 "optimized" { xfail { any-opts "-mrvv-max-lmul=m1" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-4.c
index 7543ecad5237f406f22c2c844df8244617cbcc8d..2ab3846aa0976327b75dab41f058e200ffc5b75e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-4.c
@@ -20,5 +20,5 @@ f (int16_t *restrict a, int16_t *restrict b, int n)
 }
 
 /* FIXME: Since we don't have VECT cost model yet, LOAD_LANES/STORE_LANES are chosen
-   instead of SLP when riscv-autovec-lmul=m1.  */
-/* { dg-final { scan-tree-dump-times "\.VEC_PERM" 1 "optimized" { xfail { any-opts "--param riscv-autovec-lmul=m1" } } } } */
+   instead of SLP when rvv-autotec-max-lmul=m1.  */
+/* { dg-final { scan-tree-dump-times "\.VEC_PERM" 1 "optimized" { xfail { any-opts "-mrvv-max-lmul=m1" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-5.c
index eaa580f8bb64b7285d52203471b9405b664e881a..a10a7c831b1b5a9b5f021f10c1744148ced67f55 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-5.c
@@ -20,5 +20,5 @@ f (int8_t *restrict a, int8_t *restrict b, int n)
 }
 
 /* FIXME: Since we don't have VECT cost model yet, LOAD_LANES/STORE_LANES are chosen
-   instead of SLP when riscv-autovec-lmul=m1.  */
-/* { dg-final { scan-tree-dump-times "\.VEC_PERM" 1 "optimized" { xfail { any-opts "--param riscv-autovec-lmul=m1" } } } } */
+   instead of SLP when rvv-autotec-max-lmul=m1.  */
+/* { dg-final { scan-tree-dump-times "\.VEC_PERM" 1 "optimized" { xfail { any-opts "-mrvv-max-lmul=m1" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-6.c
index 324cae01069a3136941779b3a1a9157d5ac0bcc5..395f90287f0f2d0d9d96c639c2bf87dc76514e62 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-6.c
@@ -20,6 +20,6 @@ f (uint8_t *restrict a, uint8_t *restrict b, int n)
 }
 
 /* FIXME: Since we don't have VECT cost model yet, LOAD_LANES/STORE_LANES are chosen
-   instead of SLP when riscv-autovec-lmul=m1.  */
-/* { dg-final { scan-tree-dump-times "\.VEC_PERM" 1 "optimized" { xfail { any-opts "--param riscv-autovec-lmul=m1" } } } } */
+   instead of SLP when rvv-autotec-max-lmul=m1.  */
+/* { dg-final { scan-tree-dump-times "\.VEC_PERM" 1 "optimized" { xfail { any-opts "-mrvv-max-lmul=m1" } } } } */
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112450.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112450.c
index 964a4d34e3d513cb33a5d000121481d9a3998589..ec118b94f7ed60cebdfe7609a626e1e932ae34e8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112450.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112450.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O2 --param=riscv-autovec-lmul=m8 -fno-vect-cost-model" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O2 -mrvv-max-lmul=m8 -fno-vect-cost-model" } */
 
 int a, b, d, e;
 short c;

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112598-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112598-1.c
index a1d7e5bf17b109733eed1ae450d6b4830e1b3243..e962ca13fcf2f35ecef50f7c0371001b4de8ebef 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112598-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112598-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv_zvfh_zfh_zvl512b -mabi=ilp32d -O3 --param=riscv-autovec-lmul=m8 -O3 -fno-vect-cost-model -ffast-math" } */
+/* { dg-options "-march=rv32gcv_zvfh_zfh_zvl512b -mabi=ilp32d -O3 -mrvv-max-lmul=m8 -O3 -fno-vect-cost-model -ffast-math" } */
 
 #include <stdint-gcc.h>
 #define TEST_UNARY_CALL_CVT(TYPE_IN, TYPE_OUT, CALL) \

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112598-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112598-2.c
index d32e8bacb5a223c9640010f1385ac4dfb3420dd3..53abe0925de93f5b5677146b420f97cdf7a4e230 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112598-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112598-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zfh_zvl512b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zfh_zvl512b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112694-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112694-1.c
index 3743ac8251031f5c303fac88c3bc1d7f4b4fdc62..6b3b7a05c98d3922b92151d2e4ac07cf31d4788c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112694-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112694-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gc_zve64d_zvfh_zfh -mabi=ilp32d -mcmodel=medany -fdiagnostics-plain-output -ftree-vectorize -O2 --param riscv-autovec-lmul=m1 -std=c99 -fno-vect-cost-model -mrvv-vector-bits=zvl -ffast-math" } */
+/* { dg-options "-march=rv32gc_zve64d_zvfh_zfh -mabi=ilp32d -mcmodel=medany -fdiagnostics-plain-output -ftree-vectorize -O2 -mrvv-max-lmul=m1 -std=c99 -fno-vect-cost-model -mrvv-vector-bits=zvl -ffast-math" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112999.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112999.c
index a1244c1317ada9b525f3f08c2794550f46796879..2c63ee5e5fbb963ed400598a46cdd487306a783e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112999.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112999.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl512b -mabi=lp64d --param=riscv-autovec-lmul=m8 -mrvv-vector-bits=zvl -O3 -fno-vect-cost-model -fno-tree-loop-distribute-patterns" } */
+/* { dg-options "-march=rv64gcv_zvl512b -mabi=lp64d -mrvv-max-lmul=m8 -mrvv-vector-bits=zvl -O3 -fno-vect-cost-model -fno-tree-loop-distribute-patterns" } */
 
 int a[1024];
 int b[1024];

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113393-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113393-2.c
index 2d203ea95d44633926c2ba3f7e2a9ad140ecc0fc..8f25157f36b6e47606bf197f4c5bc10d530d1e7f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113393-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113393-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O3 -mrvv-vector-bits=zvl --param=riscv-autovec-lmul=m2" } */
+/* { dg-options "-O3 -mrvv-vector-bits=zvl -mrvv-max-lmul=m2" } */
 /* { dg-require-effective-target riscv_v } */
 
 __attribute__((noinline, noclone)) static int

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/series-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/series-1.c
index 43da34eb4e375877a476664bee71b8bf90bde935..a88f602b0ca999436cf23244e257e49aebdab941 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/series-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/series-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32d -mrvv-vector-bits=zvl --param riscv-autovec-lmul=m4" } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32d -mrvv-vector-bits=zvl -mrvv-max-lmul=m4" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/series_run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/series_run-1.c
index b318364fa35feef734681382f31d459c278b0fdc..8c50f851f02a968393f68616524a1e7a51f2be7e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/series_run-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/series_run-1.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-options "-mrvv-vector-bits=zvl --param riscv-autovec-lmul=m4" } */
+/* { dg-options "-mrvv-vector-bits=zvl -mrvv-max-lmul=m4" } */
 
 #include "series-1.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-interleave-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-interleave-1.c
index 9f371436fe17497ece2ca6f1d7fc8f3dd8671d02..296fd4a45c0bebfa7c0dcdb458369dac12785a08 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-interleave-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-interleave-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl1024b -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-lmul=m8 -O3 -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvl1024b -mabi=lp64d -fno-vect-cost-model -mrvv-max-lmul=m8 -O3 -fdump-tree-optimized-details" } */
 
 struct S { int a, b; } s[8];
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-interleave-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-interleave-2.c
index 6cc390c0b34877d6ff381987a7632d0f0ac07dd9..d992c4c087cc6a8e81b73f6359d4fd543329a491 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-interleave-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-interleave-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl1024b -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-lmul=m8 -O3 -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvl1024b -mabi=lp64d -fno-vect-cost-model -mrvv-max-lmul=m8 -O3 -fdump-tree-optimized-details" } */
 
 struct S { int a, b; } s[8];
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-interleave-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-interleave-3.c
index 326d66e25594565be99ec704d32902e38fe4af72..96bd8ec34f4538fb398b63469433706af8b878cb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-interleave-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-interleave-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl1024b -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-lmul=m8 -O3 -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvl1024b -mabi=lp64d -fno-vect-cost-model -mrvv-max-lmul=m8 -O3 -fdump-tree-optimized-details" } */
 
 struct S { int a, b; } s[8];
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-interleave-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-interleave-4.c
index 2bb73ebcfd10dd620f7f9961c942cd1c929e31b9..64483c58ea29e6358090605f4d055fd2d7d7e623 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-interleave-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-interleave-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc_zve32f_zvl1024b -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-lmul=m8 -O3 -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gc_zve32f_zvl1024b -mabi=lp64d -fno-vect-cost-model -mrvv-max-lmul=m8 -O3 -fdump-tree-optimized-details" } */
 
 struct S { int a, b; } s[8];
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lroundf16-rv64-ice-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lroundf16-rv64-ice-1.c
index 5fb61c7b44c53fb1631a38e745614759410722e0..080c02cb2fba848351a1177accf42b6e1ee509a6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lroundf16-rv64-ice-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lroundf16-rv64-ice-1.c
@@ -1,6 +1,6 @@
 /* Test that we do not have ice when compile */
 /* { dg-do compile } */
-/* { dg-options "--param=riscv-autovec-lmul=m4 -march=rv64gcv_zvfh_zfh -mabi=lp64d -O3 -ftree-vectorize -fno-vect-cost-model -ffast-math -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-mrvv-max-lmul=m4 -march=rv64gcv_zvfh_zfh -mabi=lp64d -O3 -ftree-vectorize -fno-vect-cost-model -ffast-math -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "test-math.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-10.c
index f1600e0a7d66503c74609d204388c348d1697a08..36ca75e870e6ce546c110030c2cc60866f012cdf 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-10.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-options "-mrvv-vector-bits=zvl -O3 --param riscv-autovec-lmul=m2" } */
+/* { dg-options "-mrvv-vector-bits=zvl -O3 -mrvv-max-lmul=m2" } */
 #include <stdint-gcc.h>
 #include <assert.h>
 #define N 16

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-12.c
index c41f11bfa85dd6e99f910f172fb10113825c4700..ddad6f34c1cfd100a8a27074657fb0e9dfdc3fa8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-12.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-options "-mrvv-vector-bits=zvl -O3 --param riscv-autovec-lmul=m2" } */
+/* { dg-options "-mrvv-vector-bits=zvl -O3 -mrvv-max-lmul=m2" } */
 
 #include <stdint-gcc.h>
 #include <assert.h>

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-13.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-13.c
index 12174f73488c6632515457ecfdba3a9314b44f3d..85f044e070b2140a73b8a59f9da65cbcaa5ec686 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-13.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-options "-mrvv-vector-bits=zvl -O3 --param riscv-autovec-lmul=m4" } */
+/* { dg-options "-mrvv-vector-bits=zvl -O3 -mrvv-max-lmul=m4" } */
 
 #include <stdint-gcc.h>
 #include <assert.h>

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-14.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-14.c
index 7ecfc8025830792c8b2d36833be6236986c0b584..9ad5011d3072175e3eb31749b54df0f98a2849b1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-14.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-14.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-options "-mrvv-vector-bits=zvl -O3 --param riscv-autovec-lmul=m8" } */
+/* { dg-options "-mrvv-vector-bits=zvl -O3 -mrvv-max-lmul=m8" } */
 
 #include <stdint-gcc.h>
 #include <assert.h>

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-5.c
index 3554b6c16daca69d93a754ecd9e946bf550403b9..3424d9151fe6cc09037df5daa8e1fb37de85c4db 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-5.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-options "-mrvv-vector-bits=zvl --param riscv-autovec-lmul=m2 -O3" } */
+/* { dg-options "-mrvv-vector-bits=zvl -mrvv-max-lmul=m2 -O3" } */
 
 #include <stdint-gcc.h>
 #include <assert.h>

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-6.c
index 0957abd90b44947459f2f146b6372eef6989347e..2f64aaca3de465a55017745d3e11b4753cd8336a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-6.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-options "-mrvv-vector-bits=zvl --param riscv-autovec-lmul=m4 -O3" } */
+/* { dg-options "-mrvv-vector-bits=zvl -mrvv-max-lmul=m4 -O3" } */
 
 #include <stdint-gcc.h>
 #include <assert.h>

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-7.c
index 4f265d30e700f320827a29b339ef8960b4810de5..0162d8b49d4dbffe0177f48e4feca55cde86c1fc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-7.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-options "-mrvv-vector-bits=zvl --param riscv-autovec-lmul=m8 -O3" } */
+/* { dg-options "-mrvv-vector-bits=zvl -mrvv-max-lmul=m8 -O3" } */
 
 #include <stdint-gcc.h>
 #include <assert.h>

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-8.c
index 32bbea75db1008259e26e0faf2577a2c9e7a0ebd..4b27a574aa5e3b85003b1e0feb7fe9b86c44a455 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-8.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-options "-mrvv-vector-bits=zvl --param riscv-autovec-lmul=m8 -O3" } */
+/* { dg-options "-mrvv-vector-bits=zvl -mrvv-max-lmul=m8 -O3" } */
 
 #include <stdint-gcc.h>
 #include <assert.h>

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-9.c
index 85ab1eea65579a69a0a96cefe1202cb37ef977a0..51d0354dbe386502f1cfa855c28efaf872e249a6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-9.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-options "-mrvv-vector-bits=zvl --param riscv-autovec-lmul=m8 -O3" } */
+/* { dg-options "-mrvv-vector-bits=zvl -mrvv-max-lmul=m8 -O3" } */
 
 #include <stdint-gcc.h>
 #include <assert.h>

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/trailing-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/trailing-1.c
index 89c1af3f3cf4ddc2ddb5a7cb12d54e1fff1d8383..4bc6f76177b982a5b459996559ac431efb0f883c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/trailing-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/trailing-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-additional-options "-march=rv64gcv -mabi=lp64d --param=riscv-autovec-lmul=m8 -mrvv-vector-bits=zvl" } */
+/* { dg-additional-options "-march=rv64gcv -mabi=lp64d -mrvv-max-lmul=m8 -mrvv-vector-bits=zvl" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/trailing-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/trailing-2.c
index d84c21df334c46c25062649e6bfc3d80a4c7f4a8..e08a93c58e74a735dbc872e90055fa878b9d7516 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/trailing-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/trailing-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-additional-options "-march=rv64gcv -mabi=lp64d --param=riscv-autovec-lmul=m8 -mrvv-vector-bits=zvl" } */
+/* { dg-additional-options "-march=rv64gcv -mabi=lp64d -mrvv-max-lmul=m8 -mrvv-vector-bits=zvl" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/trailing_run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/trailing_run-1.c
index 0a0d9b2713ddd9f47969794d6cfbe352f3f7f201..92d1a0652b3e3e436f3fabf02acbbcff43c531df 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/trailing_run-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/trailing_run-1.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-options "-mrvv-vector-bits=zvl -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-mrvv-vector-bits=zvl -O3 -mrvv-max-lmul=m8" } */
 
 #include "trailing-1.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/trailing_run-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/trailing_run-2.c
index 194d18b06f1e4c9f9ac1880b0da848c2073dfc52..d25ed77e0c917dab33cf76088a7adecaa6733a17 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/trailing_run-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/trailing_run-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-options "-mrvv-vector-bits=zvl -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-mrvv-vector-bits=zvl -O3 -mrvv-max-lmul=m8" } */
 
 #include "trailing-2.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/abs-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/abs-1.c
index 7c7a5bd6ac7418516bff94a256297fc752aa65a6..6584030f5c7cfa3a398c19d6e9302f94bf56dd56 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/abs-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/abs-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/abs-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/abs-2.c
index e98f5c4bbf8aec676a7cd3c034ccaab29998a125..5389a55a97f1a9e5e3b7b586e5301081d217e6d4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/abs-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/abs-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/and-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/and-1.c
index 15ffdf68de7bd7d8156cd4573aaa7654dd5b83d8..2cfef6d20d470f53d0caa4b89a0f02d73b29cd34 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/and-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/and-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/and-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/and-2.c
index d0e68b1b47c331f20826cd3aae6a2fca341bd7ae..ad8c8f6909d2a27d488b09be697097f2fc61596c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/and-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/and-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/and-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/and-3.c
index 5b697dd881855dac727a1a4af445bb04fb8fba64..ceb806f64abc021dc04e66a91e778c2f51f4babd 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/and-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/and-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-1.c
index 2327a3d018e151f5eee5828ba24f81ba0f6f8cc8..30e60d520d6837246690fca452cbbf1e4ea6ee1d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-2.c
index 8030810fdbd136fa2dffcbc01ca0428af56d19b5..33df429a634e4d355d9aa54a78514a600d5a8985 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-3.c
index dce0ffa346e6c395a3e84e1e19ba8d51afbd2bbf..9058905e3f5bf2c65668ae8bd0c96ee0690af66e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-4.c
index 65912fb39f2f88738579f545258c51963454b77c..8d106aaeed093623ac1729c37f99411ed7a7e06f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-5.c
index a197b24c234ba02abe1cd65875904a29cdd1bbc7..981abd5158884a356e0439e9b86bc45f6bcd746f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-6.c
index a53de71a01b09f8e10e25e7b6cd3fd86dc2164a8..bfe4ba3c4bdad2b9cfc1565d3f0508248f215914 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/bswap16-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/bswap16-0.c
index 11880bae1f8bc178a1aba28500cb0b5103003790..07072777791bd1c57a07d8893992e9f20d7c5c36 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/bswap16-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/bswap16-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-1.c
index 05742b90fd5cca9c73fc7961b2624124dd4ac0d8..965cb1db78034ba42195e7d1a52c177a7e4bfa64 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-2.c
index 39a56025818ed7238f017a06a7b964e99f238830..eda6070ebb87d6af3f8be5485df2acab28de28a9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-3.c
index 387157d9be6b007b70a508b4a879da0cd0fce48f..fba10568585ee21de46c48883062f376a45682ed 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-4.c
index 40b8871ea3acabaa80e94a41855a944dbc9480c8..773107066b942708496444b0fc9a807f38a5927b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-5.c
index 378b704d360122d4642b4cfd1939ce4ba3ecc61a..d01153daa981d003cb4aa58599f048b139dadfc2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-6.c
index f0351e0baf857ab98f25a4d1f5715eb65043835c..264520fab17c5bc17b6bc26165dab176318e3a9f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-1.c
index 7afb1940500466a6787f5a6f726b26e5e478765e..edabcde39a606e1c54e26697177efdebfc9cd925 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-2.c
index cbb59959af0987e93f168b2d10676930e0c68359..f9560f680a1774357ec9ce4819f6bcb34ec200f6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-3.c
index abd49c003e01e3e5612b4a4969ebc1f07035a496..8cf237f1f79e321a499ed6aac50d13920c53e3b1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-4.c
index 6fa9b13a9ae978a02b3c200b369158d736f2317a..996bb7433c84eda13e3210892cfc1865cf1171e4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-5.c
index 2a8793266bba0799890c25aa2e1ab26d086bde72..34df94c400851c9317c80637c160d1ccb2f0d7c8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-6.c
index 88bfe589aa7ce79d46070aed122243137156abc6..e0240014c8e2b783e1a20d63312b16bc2ea96d67 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-7.c
index eeb96901087c450fcb29158db9800ea815239f99..6f4292282cdff0f455c593c64cd2e4599f872768 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-1.c
index 4622a5b58ade8a2bfa49885de21e983ee9f9e730..b05eb122e8d5dbc58739035042ad636bd71d0607 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-10.c
index 0d4776cac80fd4ab808bce73f5a45f9634fcc0f5..c06c8ee878ece21ba3ad06464545b54053e02787 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-11.c
index 4af45cc0783637518ebaf49cd72ca67ab6d9d9a2..02f0a5f6d5e9283138e3601f116c58bd710afc76 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-12.c
index d2f18521d5ac45fb0ee75766b848c0cc23c6ef6e..9393836c749c5760de8954ed8473c97a53aa6c21 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-13.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-13.c
index ae6e712b9a5acbd3a7a556b4c3d6f475cc3e8eb1..7d7221d5df4fc2aeeaf4a4fb0e396d8e94960013 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-13.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-14.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-14.c
index f8d5e40c5772e828968ed2510c55b0d47beb7e40..9920d0fff59341eb4c13dc68beb33bd46d8603a3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-14.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-14.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-2.c
index 3eaf8bb948d8887af1902c6c4579a4d029f86690..b2e52b877b82633f146dc6057e4326113b6fd875 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-3.c
index 52fd64deaa871a23286f37c6817df5bfa424a615..e3f31b2a3ee221513f998a6052ff5f88dfabde1c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-4.c
index af6aaf369b750bd1de2b7ce7641c99148272c395..394a2634dc31578007ee563b0a32eab0b0f4bdbc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-5.c
index a1dacaca20bf1debd16d2687365f8d54208ef557..29e020b7c7e1b90850a8700a5742aac54578a1ac 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-6.c
index 99d4019710b8e1d73df4b24f0a36161b3cfc1e47..7de13fa691a6d7c163fa2635403db654903a75b5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-7.c
index 5165d4743c612a668998d14d0efdf7f06cf96633..e84e5b5395fbb45799dafdef1cb972527c238884 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-8.c
index d270dd9eebe0c06cfcdddbb6b457151ec13452f3..1cc01006bfb23dd3d348ab54efdac1798c8304f1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-9.c
index ea77cb0c3f6cf6ec8fd4b29e1ae040a1d453cf6f..f2e3941fa68515a035d9501ebf5c799016dd142d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/combine-merge-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-1.c
index 537a032947e3cc103b398432e57b2f5a704ad369..0a3a0b2522fdf237f0204649ea15f6e757408537 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "../vls-vlmax/compress-1.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-2.c
index e643147105f70aa3e1a11d947deb74115f96368d..fee8428f087b36ede34b9f3ee55a3f463ca2991b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "../vls-vlmax/compress-2.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-3.c
index 5e872942c9da5cdb848d3ecab86a211844e89baa..fc883a1d17aa8dbcb8ba490c1be0d674d494e8bd 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "../vls-vlmax/compress-3.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-4.c
index a4ceb62912adac4379740b714284b7b0d98bc081..31bdd97d4575cda3a925e7c163a203ec307fbdd9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "../vls-vlmax/compress-4.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-5.c
index f407027ae40c98a31625a2861a59b5e76ebfaf9e..c1ab0fd12f2bd743168dc5d7866b90be75810221 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "../vls-vlmax/compress-5.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-6.c
index ffc0b8fa5b499b0e269fcade376c0d7b340f1d93..56e775859011671dd63839e327cd13382bd5bc83 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/compress-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "../vls-vlmax/compress-6.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_abs-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_abs-1.c
index 3eaabce961114a6bc151f47f4b6fd8275276ffd2..2f6de615179016ee842297ee1ed376d3e9051ba0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_abs-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_abs-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_add-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_add-1.c
index 61da94cbc41081153e2d1919929b703201663d2d..06a62e01f9af42115534f80d701382681450d8f4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_add-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_add-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_add-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_add-2.c
index cb730870211b0c9e1abec274bfef1df474f6da70..fb53738677c6ebd28247014ecc1c59aced2ce5b0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_add-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_add-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_and-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_and-1.c
index eb8d56a2a1df8e603ee8eeb89519e452f2802c8a..01ff61cee94296533880a8c4182bf73d851e283b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_and-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_and-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-1.c
index 3baf5cfff07748c9047d55d40f0e5d527aab4925..59c2f8cb42ba160b44302745bb7e7e8252574663 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-10.c
index e56dc33212d77041b13121e0f98fe02691b3917a..3eebcd01627cfd2999566b16184fa982e6a7c6a5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-11.c
index 41ec468bf3decb661499da028c3c6f4665f405b7..2a9a9ada0eb7fd99f7c92e8c4589138d9931fef3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-12.c
index c2cb8bfde1adfc72306f2ad1572c901eb7645d73..4444ad8dfb488d91ea63f4453495ab3ba0bdfb9f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-2.c
index beecdf439161782dd4083461de71c333549c9dff..79b8325af206078d17d531a56a09e292c0fb215f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-3.c
index f71236b03859c11fb10ae0c35b3df0d4dcfc8e9d..d2b629135c792193c54800ac02d6d56edd002db5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-4.c
index fa5780cc4da32b1202399223099bcb82954af42e..cdadf5c34315f359b243a5dcd2235a82260290bc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-5.c
index 696e17cb29d67bc4cf3da983962ff959b3f55893..d061aa74a47b84aada2eaf1d1d6d9cb6826ee702 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-6.c
index a830777b9ba331e290fc632e4b1137d4a14b0c02..4394233ae91f5a0473b0e90a731a865c88ebe141 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-7.c
index 6f56cb6c2fecee24fb932bd25e27de6419a41d75..881bd57b07c1824035b5ebb98579f92c0dc48d11 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-8.c
index 62cc7a3343e747afa7c7f5eb04fab307152767a5..f439806455aaac222d936473853c3531c2fcd3ca 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-9.c
index 14ae1a3fe684ca74dae5c453fdae8edb4d65afe0..47fd131440a797fac072d815f23a6e1ad15e6970 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_convert-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_copysign-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_copysign-1.c
index 55191582d08d180ef4da2938382d3d56c6730322..e99a70286ffdbd9be909519028c6e93ad7124a39 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_copysign-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_copysign-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_div-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_div-1.c
index 373ff00f95b36fd4427f269d2a1633e604e20198..4c6a21bb7efd61bf1ed2b59c78b6aca62ac88611 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_div-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_div-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_div-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_div-2.c
index fac75ef0775b3ca8f1493b30613dd9857bd7d6f0..894e83957ad089c9ffacb8b5de8bffbb67f574bd 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_div-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_div-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-1.c
index c356cf512b8b92ae0cd0f27a31c0bf550e6400c1..73f425ee2dd21d4a5d913ba29827c1b99e0a6d42 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-2.c
index 02bdf656cf8465de58846e28a20ded495e6d0933..d714f3f3710e90e2a2e1a2c35013c3a0b1594066 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-3.c
index 2db3ea2c8cefd98282327a8baa9cbbf8a6c3e57d..9c3790c6c001d86aadbee36625ca1dee7c0804df 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-4.c
index 192722c32893be825a4d8d1891ee5b5f2f5904f5..98a5eb1c03c953a80c0d44552293d768170b8c9b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-5.c
index 96ba993a24fb1a49dd22041ec41c630e1e3940e2..3f3882ad4b2fcc7bc69e4dacaac7f6984d17689e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ext-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fma-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fma-1.c
index 54d2f0721f4b370ed211f01940abc627bdfcb1b9..939c87d6711cf484db3073aeb764440e56f160bf 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fma-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fma-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fma-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fma-2.c
index 145f81fa5c34cf4f1a8512a646f937c4719262cc..5d6928519d31b8b26ba3cf3d0829fa9651ed5125 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fma-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fma-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fms-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fms-1.c
index bfed1dbec02358da4f306b5372f592a71829c342..5f00d51c6775148accd9a946589c38354c5418ce 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fms-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fms-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fnma-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fnma-1.c
index 5871c71fdbf84a15d1c9567e248124000cf326f7..12bcafb0f8eb85376bb807ae8f5763b2562fdffa 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fnma-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fnma-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fnma-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fnma-2.c
index f91039aa3661326981cc0fa4089be63baf389203..9375c84521e381500d6fd2fef594f0ef3e0f85bf 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fnma-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fnma-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fnms-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fnms-1.c
index 59fae9b47883c89c6b8e57e8891d59e8aa9bb4c5..a8f889032263a817eb70011bb9a7b03c69bb0e4c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fnms-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_fnms-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ior-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ior-1.c
index 2c30854033ec396b05a39caffd44fa716f0a1dcf..d8e535073d1e96e0267096607b26bed839726666 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ior-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_ior-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_max-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_max-1.c
index 60e0f9391d2c824968215cd65e7a7ceb967d831c..1b59686303e8166a088979f14e0ba6ada8d93bca 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_max-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_max-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_max-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_max-2.c
index f8db2925b52d67e4b5dc50e831b76add5f6e55ab..f46298c07972b701f2f959faf7f37d57f9b2bdfa 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_max-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_max-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_min-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_min-1.c
index 2a13c254e7f0f8271d55170fd387345086a86722..760c6f6f2d54dbc42220a57376482ee23940613f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_min-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_min-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_min-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_min-2.c
index 0ae82085b1bf08dbbeff2b7b05ee6bc3d6296bc8..95560068e8a8c17c62f1ea3a263ff67ec57d150e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_min-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_min-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_mod-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_mod-1.c
index 060c58bfe5c93221068e6e38a5d6d9e70492cd97..4d9862d5aec410e3e80f429464eff72fedf481d0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_mod-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_mod-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_mul-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_mul-1.c
index f6b58c101bad230e573e7edb7cdfcdd70b3388e7..8e8cf996e2960d430f39be9c8d653b3b547fff35 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_mul-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_mul-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_mul-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_mul-2.c
index 4df3d5579b375cbdddb61705a425fefec27622c3..36a726645b6f096aff60fa6acd34d66884f8d7e1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_mul-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_mul-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_mulh-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_mulh-1.c
index ffa6458a9e57ab891d906749e67e7568ba5d271b..f92ceccd94fa931ad85e69a104e953a336a64ff7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_mulh-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_mulh-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_narrow-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_narrow-1.c
index 08f2285083c92a8f002939b6aee8b6cd5c78c67b..a947a0862589a81253b2104cb43ceb797c844d67 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_narrow-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_narrow-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_narrow-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_narrow-2.c
index 41452e73f50b177163042710c37a0e0f426975d6..2f220c901b238c6df55cf86127f5b89f507aeb22 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_narrow-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_narrow-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_neg-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_neg-1.c
index ca944460ca78250810e8023c1f18c29bd63f84dc..1da9312fa69416466a3660987552007277f7d6d2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_neg-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_neg-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_neg-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_neg-2.c
index cf44c1805e5cd0889484923d9dfc29d31ad50b95..bbe734c2f28e5337d24974e413b180e4f0901f05 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_neg-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_neg-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_not-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_not-1.c
index 1a2a8f451087cfafc6072927c0583688b222624c..3096095ff259120d51f38793bc4bbd9196739e6a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_not-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_not-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_shift-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_shift-1.c
index 3ac6203630cdd19fb85d3eefdba9af8af278219e..3e94dbb447f3d332d8009b84724c554c822c89fa 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_shift-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_shift-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_shift-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_shift-2.c
index 8c2fa470dad573e9985b6ef80066bea4b95303da..e9d4e3730086af8f3015629b068f841a2e22e584 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_shift-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_shift-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_sqrt-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_sqrt-1.c
index 1c1c2ab280f0d14339b275c443b5a55f35fadeb0..283f2d5dcad6c6412ea1ffdec3b27b7e9793f014 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_sqrt-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_sqrt-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_sub-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_sub-1.c
index 629e66cd6309d3b98692ca33f165b157033cf1b1..8ef45752b994ed5c3b5ef920e7bbc36b8b113e43 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_sub-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_sub-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_sub-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_sub-2.c
index 385ab41d173c22e15f6cb67613801263d21df59a..a7c97601f42b67ac6068303f50403dcd495dc435 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_sub-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_sub-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-1.c
index f548856ac23c57282d3697337b1080f415b22f2b..dce94c587e43f0a69c29d9651d0010e2eb82266d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-2.c
index 5d38c77bceb887dc7525c6dce9385826f2329375..2a0d8bdf6c673a186c75715c45667ae58e467612 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-3.c
index 75967331f645e0a8523c1572198bc549d4411be4..510c656b7cccfeaefaaf47c3354540e8bbca3ed5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-4.c
index 867de13220452eb3fd6c1532e7eb1e026b8b6c88..d2b8ece1421a11da4807c623291405330e8bb101 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-5.c
index 12ca119b8fc171ceaf9eb8bbdd4aa65bb0e07d48..72a5147225c5eca91cc23919ccc0fd1cfbf15207 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_trunc-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wadd-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wadd-1.c
index ccaaf3192c74b5834dcd999c7e7f7b757d1f2204..218a4754cfa91fe64c7234509fe80c10a4e16ccf 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wadd-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wadd-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wadd-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wadd-2.c
index d2a67c85454a85db776cbcdfebe70153707b54ff..c7132e8bc834d634916f99ecb23e24f05624dab8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wadd-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wadd-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wadd-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wadd-3.c
index 6ae95f30241e88a5b1ad22160e26e27e109f37a9..9814e8df2375f045b99190d13896d16ba5a1d0b2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wadd-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wadd-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wadd-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wadd-4.c
index d9056e67c08d3fdfeb02a877ee5cd5e18c6a3ac6..d28242d2f7d5c6ef66702b585ad777f8867b7230 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wadd-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wadd-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wfma-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wfma-1.c
index fa4022bcc7a339f60dc566ff85bf056287e8c09c..4eece1c02bbeeb9be866260b41d8fb631a8c53ba 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wfma-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wfma-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wfma-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wfma-2.c
index 5a2bfed9bc902b918c9870636a4fdafb6f64987d..34b9f0254482019c93dc419001219f19f051f3d6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wfma-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wfma-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wfms-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wfms-1.c
index 86fbe0bde7356f8fe833d47536abaf27224ac6b7..ce7c1c0e16feee6f6de0ca0d92b668ae2957fa27 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wfms-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wfms-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wfnma-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wfnma-1.c
index fa0fc64367d027ebe521b3a6d50338f8bae770d0..79ec5af36881da7aa21ce68ad59cd99957bc7b67 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wfnma-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wfnma-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wmul-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wmul-1.c
index f18cd66489df321175e013532ac873e40c7e1f0b..ae5bddc921cac130ca7308f804955fe862ada1f2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wmul-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wmul-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wmul-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wmul-2.c
index b7a6d52931f495785396d87c814ad41a5e38648e..af9e20a1a087dcf453c302f06f2ba1f65e4baa65 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wmul-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wmul-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wmul-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wmul-3.c
index 64ca747f649d7f4866e8993ebb73f40ed693671e..17c9a58f9077761eafbac00872f98e67b03f4154 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wmul-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wmul-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wsub-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wsub-1.c
index 887aabd5c199eb4cae186af376458df9fbae9ef8..7dd2987a1174db26d843690057cebbe84d4ba53f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wsub-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wsub-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wsub-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wsub-2.c
index 4093450374eb73e8560de8a4c8bcaf7444f0e1c6..9fd3471e7223b8a2c71c12e20470623a0cbe8f82 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wsub-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wsub-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wsub-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wsub-3.c
index 20e3a8fb05a5ef1bcb4c46f9f2a0e774f0f288b2..d9eae4efdc34ed554dbbefbd2463307ff335fdbc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wsub-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wsub-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wsub-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wsub-4.c
index b97cd8a059224417b8f0b1ffd748e43b44c11b10..b0cb28777a7153d220a9a297a1b44b29058b0da7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wsub-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_wsub-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_xor-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_xor-1.c
index 1bb057017735d5e8962be5a72de0e4e83e58ddce..b6b0007e3fd9ca825ef3ca2588bfbbadb142df41 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_xor-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cond_xor-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/consecutive-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/consecutive-1.c
index b9bc15f7c8267129fdc1ac0eb34f3cf29e49ed08..f9a763a271fd036ff966f55877e723de5bfc216f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/consecutive-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/consecutive-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d --param=riscv-autovec-lmul=m8 -O3 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/consecutive-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/consecutive-2.c
index 8c0bc201425a37a42fde3e94540dc0e8606a3eb0..8f5103c50c73bdf4ea40373cb3853d5cf3d9ddd8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/consecutive-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/consecutive-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d --param=riscv-autovec-lmul=m8 -O3 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/const-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/const-1.c
index f3217e6063e898e92db5cab1ae33a5825047f6e9..2ff2cf6010b68d88fa5e4b2789e55b298d6c99a6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/const-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/const-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -fno-builtin" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -fno-builtin" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/const-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/const-2.c
index 99255ec5aa699f787538835176a353df3bf25c08..c827f3bfd3e0bc98197d1086961d97ffacc5198e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/const-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/const-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -fno-builtin" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -fno-builtin" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/const-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/const-3.c
index a9c8ae34ba7747bbc49b67725fe8a859e74f584d..a9f531c7031e42808848e4fce585027e019b3ec4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/const-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/const-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -fno-builtin" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -fno-builtin" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/const-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/const-4.c
index 50d1515aff6d7c6c19fecffe9837c8b19f4d6bcb..f95be047dd60dd4f013e3933ec83f873a03ce923 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/const-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/const-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -fno-builtin" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -fno-builtin" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/const-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/const-5.c
index afc2a87771856327299f6eae2b936702f3c49e6b..21ab91c37217577f421d0980ce78c09563290b46 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/const-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/const-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -fno-builtin" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -fno-builtin" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-1.c
index ca04f7f382e128f7b7a1444f8fb44aa8e279febf..99004c3852d12b78bf2c3e4e133b1924b8168ccc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-10.c
index 95d04cd814ca93d6ab88f43ec5e874378375652d..8abbe59a942aa4d1c1d34f95632c41a5f27018c1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-11.c
index 853acb3226b575fe25e4941c47eafd29388bf423..9f96da75cbd7288231c193a60d7db4cb3c08a05a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fno-trapping-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fno-trapping-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-12.c
index 8fdfa44758556cf5468cb689a539f883392974dd..858c915d44a917dcbfb828844b8d1f62f99d2c3b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fno-trapping-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fno-trapping-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-2.c
index 4b6a168625cee61412d40f488cca3bdbb1692d0b..3c0106d31ba22cb5be47a3451fa0ec77388bd441 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-3.c
index 6d74bdd35d48e7b3a59d74a55efff415e5f79c3e..e4237ba6c632e8b86692a499a7c652eb2171610c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-4.c
index 8ef991de44c353d13a10c34164ca75fa88281704..3fea034793d2b11d239aceb7b091e8bb106a72c6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fno-trapping-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fno-trapping-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-5.c
index 09a44de616ae483337438b0e4861fada0a1a19c6..2381284e1f72c5cef1f17da2eaf8d11484ff80d5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-6.c
index 2948dde0d0b13333d92ea0be1981db66e596257f..6db44067fea9c95c5026b8f53637fbd354ea2c0f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fno-trapping-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fno-trapping-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-7.c
index ea39012b95a2d23891dcb548e0cf175d6f202034..f4863371f08e5022dd4910268c463143d8a4aa63 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-8.c
index 59f36f582f64e4df3404e9b5dce603c1fa51510b..d895d8cf816ebf51a2a4bae7191f9a1d5b68350a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-9.c
index 3546ddc4554cb511356734c1989f0cc5f99462a7..9f0da2c570bd60cfe28ffb38e83912bd1fd7e914 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/convert-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fno-trapping-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fno-trapping-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cvt-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cvt-0.c
index 5637b05ad6ee0f36e145972f0d80b8382cf80884..6083aff2c5c3098dd336d6fdc7249f7de56047b8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cvt-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cvt-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -ffast-math --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -ffast-math -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/div-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/div-1.c
index 7d8a3e2df705349177ccd6b93bc23bf78ca676c0..1b9e05875851795f161e8ba27e582098d6593c9e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/div-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/div-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-1.c
index 1f520f2b0a74007777c86ba83f21f43576ee8420..995286165f53ea5c8c870dfb61e644d7143f0894 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-builtin -fno-schedule-insns -fno-schedule-insns2 --param riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-builtin -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "def.h"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-2.c
index 1a930d059c8a4ceada79f82d8b42ad3604a77c98..fdd335f81ca1cc58bda82369b5421b34d970e60d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-builtin -fno-schedule-insns -fno-schedule-insns2 --param riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-builtin -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "def.h"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-3.c
index 46fb5a525a5684a74d1cf4bcea73f322fdffa1c4..f95e8b01aee3413a7676d4dad014f1a58831601a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-builtin -fno-schedule-insns -fno-schedule-insns2 --param riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-builtin -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "def.h"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-4.c
index 7e46dc425264148aef2416f46f217039b02b0c42..74625b784c7f3c41b134abcf5b4ec2cfe98a10fa 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-builtin -fno-schedule-insns -fno-schedule-insns2 --param riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-builtin -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "def.h"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-5.c
index 9b9327bdd4d8008ef756e82757a33399a4f15f1a..511f3ba8aa0237b3f617e3586bd646e794a30ce9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-builtin -fno-schedule-insns -fno-schedule-insns2 --param riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-builtin -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "def.h"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-6.c
index 52d5a65b44e07fe80bfceafa4375ab8ebf44b623..41616e65f17ee0df828b3f1930cdff46b6f0a42e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-builtin -fno-schedule-insns -fno-schedule-insns2 --param riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-builtin -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "def.h"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-7.c
index 39f27ece2e7972a95cbf7a4925b68e813547af70..6e18304c0174019f8b4d713d11f305eb46d272ec 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/dup-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-builtin -fno-schedule-insns -fno-schedule-insns2 --param riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-builtin -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "def.h"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ext-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ext-1.c
index e46990efa5652b7845aec5ee32f446b7906d837c..151d0e7d7ca34894ddf2505db502ee48177a3202 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ext-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ext-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ext-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ext-2.c
index 03968a6baf9e5655000559536e83f2dd2d249ed0..0879f5a3d2c80678d8412abe13322a222f20a3ae 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ext-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ext-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ext-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ext-3.c
index 4cc19302b0bf5b98ef878c640a192cb04ca139b4..f8c9cf44b6467667f228d82194fd7e6aba8e2a27 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ext-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ext-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ext-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ext-4.c
index 7593a35d666b7a17f1a513773e20271ba6d94623..23fa14bf68e13c3fef7a830ee423cf983e44de43 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ext-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ext-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ext-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ext-5.c
index 5dca5a7875db66e7b682f689ee9dca75736ca711..9dd20a2477aa56e84e59cc0f20392962ac0fb26a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ext-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ext-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/extract-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/extract-1.c
index 907a7080bf7a7058f5c1a4931cbb5b3d8ea13973..f593daf30599ae10643027a13e1d591459f0bb35 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/extract-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/extract-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/extract-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/extract-2.c
index 7daa074ad77305f0a068b530542bd58c3a6809a4..48ef9f381087e575442a666d1d4d191970c31b6c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/extract-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/extract-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-add-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-add-1.c
index 5c2da4df24e7b66a4663f95d4ec32f2f58109485..382860b03a1f8431f14dbadec76760ab6c6a4d2e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-add-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-add-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-add-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-add-2.c
index 73a355bc0859e8c18be8a537fd0266cb495e9287..042dd0d5ccc68ed04f625aa53b11250c8a5c8f84 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-add-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-add-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-add-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-add-3.c
index 42925e5143a7a263d53d5c90b83b9c5f7df8f455..fffaa12323e59f855e641cf496e8d36199957e3a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-add-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-add-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-div-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-div-1.c
index 93a9e39d00ca8772889f91272811c7ebd61b2168..89a9e56494d3e61e53e31089ff8d8801f14d8298 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-div-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-div-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-div-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-div-2.c
index a5bc2a0e970fee6f349a49fa66aad33d1092b38e..1a3aff74453dbb78b1e65a9af116203bb5b04435 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-div-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-div-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-div-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-div-3.c
index f1fb7ed2c9d191dfa1f9bda8dfb776f1ba499a49..19b5ba51c74bcf13483428b003a57263b85c8aa0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-div-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-div-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-1.c
index 8d3cd2aa538418c3f4745fd969299df9f46b3854..ef625d52bd14ecfc7ffe0776f2b98f129dfc6eb7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -ffast-math" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -ffast-math" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-2.c
index a13de042041fee350a3b2ba9908802f64eeaee23..8dc5a31de243062824947444c5317cef603488a9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -ffast-math" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -ffast-math" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-3.c
index 108a883bba55918ff11201acbd918e619d585534..6f31e275c18eb68047da0a2f77f2109d7361128d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -ffast-math" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -ffast-math" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-4.c
index d74801887b6cf53945b108dc41244b17c0f4de3e..db3bf8667bbaf1a0bd7616c8450adaa430c176b5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -ffast-math" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -ffast-math" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-5.c
index dd163682396b93ace7fa4596ddf8b98e60119f1d..231919ebf88bbb1d4662581a5448a1718c90cf05 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -ffast-math" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -ffast-math" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-1.c
index e082c47b0442c365820206985fb9ffc68f329683..47062683bca4ded7269e367b004c025c63cbaf66 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -ffast-math" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -ffast-math" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-2.c
index 1b900522750a2f120bef139ed5e13853c69d4bf4..101ad573aef01eb3db01ea0382279bd269d4fb33 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -ffast-math" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -ffast-math" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-3.c
index ad05800572f215e9ba487cd269a5e4e1f6ac171c..65afa96c940982bc1ebb2a9b66d97a5d828cae39 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -ffast-math" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -ffast-math" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-4.c
index 5d4109aa3c26eb26549280843ccfa171c2e8576d..004a95cd05d67e32844a68d71a5e318935c3eaa5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -ffast-math" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -ffast-math" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-5.c
index 0e3cbf2acec737211edac6922761c79e22c269fe..82a86965fb61603c3e8984f92b20b8b5ebd8b735 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -ffast-math" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -ffast-math" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-mul-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-mul-1.c
index 3beccb275ab5abf345e7dbd47e2daa7988bd336a..5464c80724c82f8439ce0d21744c1e4baa3827b6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-mul-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-mul-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-mul-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-mul-2.c
index b9616386177938039f07c48cb89c49ff4212796c..297f049795b16ab2ef3cf015aa07034abaae2794 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-mul-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-mul-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-mul-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-mul-3.c
index d8e4e26bc00d7bcda44eeae9e06cacd07d6e054b..f49bf28f0ff0520f1b8364c809489f6c112c2859 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-mul-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-mul-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-1.c
index 0cc18d9121529c3c76d1b3076dc997373dc8ced9..fa89c52f630ee10247a7b49bbdfc57c6a08f87e8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -ffast-math" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -ffast-math" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-2.c
index 3a66481070af3f95dc734234d9e2b84bae98b2d3..518bebbca3ec04bcf9b17c766967e985aab9dd3a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -ffast-math" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -ffast-math" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-1.c
index 86c23ef0436ca34be47a656f9d7563ddc3d32db3..9ca136561fab3deb9c3b9f928c66880ad27170ab 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -ffast-math" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -ffast-math" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-2.c
index ec9001f8ee459efe0391590314160987e13f5962..219031303153114bf0c1676a18238c3b7c89ee2b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -ffast-math" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -ffast-math" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sub-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sub-1.c
index 75fe340935cdb2cd80e7f3bbc5ae397b1b95e2e2..12bbbc6732566ec83cac97d9f47973d7a2aca36d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sub-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sub-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sub-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sub-2.c
index 96a6fe6df2c0d88c7aabbb7e0d0aaa675271d667..8ddefc69f2c4b32633c0e8ea6a4693829e19864d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sub-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sub-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sub-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sub-3.c
index 0094e2cbf4b3d98e01963db781beaa60df1ffe40..54a3adf3d1067e34de81e55837e0d6c10a14a84e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sub-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sub-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-1.c
index 7f9073a4dc18e09714c935eb3883403d0e749d45..ce8f351f892462f39cedf1ffa067992e8fe19031 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-2.c
index ddc4b552fc7b32925b310938f64e42d6ec523b75..94b2327763f554017495032c2656f9116141f71e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-3.c
index 3bb52ae59741d1fc012a2307ef64e9313cde1044..24842f324f101050198e32cea5c03a1a3de7b841 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-4.c
index 903a4f723e6a07ac49586793a2318e42956b675b..01ebc8fc3a8ea47182f8bf3ac823e9270cc2f544 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-5.c
index de565b76b0c9b2a0470864459e82484f8a797395..ad97a089287afe3eb7d0fb3733403d24db6034b4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-6.c
index 97fd9b8cd192ba80a0f61fc5a0102b0ebbe12a10..8a61d24bbc11895bb384f11d5cbfae6c3c53e568 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-7.c
index c6dc9f7ff810799999a56358017923e8af5f8d14..6f806b8d30615f895a97d65c51b6cabb803e3a8a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fma-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fms-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fms-1.c
index 491ed0025634fe19a33a1ad6ab6a54446639b4a7..37150e1c779efb2d5ebd03ce622c7e1b1fcba828 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fms-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fms-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fms-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fms-2.c
index ade6cb11cc5c6c685a2bf20bac77ed21f09d00f8..28dc7eaf255cbecafd39659cc6c85a9078e56587 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fms-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fms-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fms-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fms-3.c
index 1746f172ef68adf344cbb6bc12b0eb7d5f3900e0..203eebf71caf990e6e2132d5d1d0fc2bd0ae2d30 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fms-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fms-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-1.c
index 418c767a7bf3bb71e60c330b3705fab449a1474e..f10d1f9aa6cda5d7db5e63636f3e93110f84ba6a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-2.c
index c1b629a7b2229d3413103ea9b2a55f7a074cc804..ae96bacaf89d7cc4eb18ec4f63685fca3ed947a6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-3.c
index bab693eda0bf71a7dd21923c62c3511684d269ea..babe2967b6243ec73457fc82bfb24d59be2f1e62 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-4.c
index f0a7c5dee30daeffc717b07b0cd75ed2d68c65c4..3cdfff62da8256d0e683346405a59ca9309ac919 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-5.c
index 053f1eee62e1ea7510890c44cf0dab23f3e6d163..72ffdd107a18e63c7d349f101336960f66efa362 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-6.c
index 9053517346c72ca0dd0d51878316e82d128ad96f..b57d8422c1bb4d700800d03ff91dc14e4d1d9921 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-7.c
index 9952a498d934ee6a4333322c22f120d87bb5c4e3..0b3e195e6023ab1701ec2b5d745d33f28362ad2a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnma-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnms-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnms-1.c
index 7fb8884f58c95b7e9c233f349722940d12842e2d..162f3e32005fd7554dc86fff1210fde944716f52 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnms-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnms-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnms-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnms-2.c
index b044061c9d69069ec8a64c706323d2e46de0e1f1..13f1dfb399b4718628bc48801edde1b96aa55d5a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnms-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnms-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnms-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnms-3.c
index 5547bc4c130c59b8615a66ae343fd5c94850aa3d..bb4a40354c0bc65af5ae6a7d53c3115fb9a11b46 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnms-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/fnms-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-1.c
index 0f78ae0ebe266bd9545542a985d973d27c6faee1..f16f709fee79162bd2ec5c6a49e0e041f968fea8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-2.c
index ae31e227ad1d53be18a192f79652a7535882c460..fbe6ce808bc0b1f2a7ebca86e679bc21c1fe2ed2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl256b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl256b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-3.c
index df15bd7300f406cd4cff8158587a377bbe73f201..189423c0fe5496e7854859d616843a7fb1af8290 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl256b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl256b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-4.c
index 09bdbd19cc00c03ceca817b2492b7f86a25417b7..145e7d4323c5ec2fe062cf39fbb682ea998c431f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl512b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl512b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-5.c
index 65ca8cb41e364935166faa1165e273d5e03215fe..3081e16c808167cee0654b6acfc42411df34a771 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl512b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl512b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-6.c
index 9cd36ce2ec1170725de8c2a10ee8ceb1df52f9f0..6af57b7d230d15ead5f054351fc284ef492a75b7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl1024b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl1024b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-7.c
index ad337054f3ac3d5ffb51502068aa4345874e4f13..c11ce43ece0270cfe436bd771f37fe149d3bd1fe 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl1024b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl1024b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-0.c
index 9bb21d7ab18db91e48979f1094fb46811d148e97..5549f8731dd833414bfe7b7f7d3e35b29a15a8f5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-1.c
index e5934ac382cb2ca5323253e6d48f0b5b1b90d324..1b2d1decd1014a42bdeb9afb861c00ed71bde2eb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-2.c
index 7b30e2b5c75586a5ba041bfbc8c059e581372bfc..428bb4e292032ba605510b1bd7181f9171b013f7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-3.c
index d3efc9aca3d018487ac4279a29a556313946458d..38a878480da969262811d5444516cfa1aca8d0d3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-4.c
index a9d1e87965e887dca3bfc510427f55bd34f1948d..7f21a36ae8b25ea0affee68419181cea75904dc6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-5.c
index b528c8036b91c142c0ba0745a3a679011cb7595a..b92d55835b91cb69bafade8c66727a24668ab05c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-6.c
index 5c36d86e0cf183f911ee4435ab4a48bcf5ec89a5..85170781198fb76bf8b01596020deeb52df1ac70 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-7.c
index 1087b60ab29366ac08bb44965ddb07b6a6020aba..4fa651ae894e28688979a1eac3ba19e2f21aeab5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-8.c
index f0d40dfa700415d87d6070ca71b91b73fc150aeb..0b339d04e5a7abc3e407da4419d4438101cc4d85 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-repeat-sequence-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ior-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ior-1.c
index dcee81a9bc08ddeffaba0746fcf1223a6614d693..ce67471a98f7218eb96032e767630ae28da248ee 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ior-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ior-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ior-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ior-2.c
index adcba29197a8bc7038a46b138aa0b276dbbdf232..c07fd20c5c1cf5f8c4cf8d248fee8cdb51ef4ac9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ior-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ior-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ior-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ior-3.c
index ed142d58489c06bcd4c181caafdf1a41e48974c5..cc0c19ab336cd5496e39c89b49b49e23cfb7bbc9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ior-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/ior-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mask-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mask-1.c
index d5b65ff55005f0a6d6d32c32b3765968570181f9..bfa226b83d537276775c55531ab9a3310b98cbcb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mask-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mask-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mask-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mask-2.c
index 7fe4ec96dc8f287ca238400d000a33dfc2b7d338..4a78163d93b7d06b622ecc74007b0c0022af09ae 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mask-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mask-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mask-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mask-3.c
index 7d2254b326db10686488365b305864dfb93915f7..bb31a5ecf55429fc9d529a4f2020aa0c177e9cdc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mask-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mask-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-ceil-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-ceil-1.c
index b113df80c5f0f74737d9bfd83922a07d14dbc59d..c35c6f1369bec4c2c5240e1d6106cbead3fe35ea 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-ceil-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-ceil-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-floor-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-floor-1.c
index 076580e6a5869f8b54c77079f6d8da8afa75b45c..aa69d6904bfb8b18197af962cf50c5f125cf3a52 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-floor-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-floor-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iceil-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iceil-0.c
index f8877a1d564879db03609285ca1cb495a2a72b38..b14cc5db5a41071b3d2fc028deed94a19902f4ae 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iceil-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iceil-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iceil-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iceil-1.c
index a2a2e2458d905de8d0ade6e668369af3292abc32..8c0b4441b13b9e7f849e86d6a4681427dadeecb4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iceil-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iceil-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-ifloor-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-ifloor-0.c
index 69eaa11f6d23339ed19a69930ce294aabf06ec80..de145f39bc45fe18c9a9e029c2be110fbd07f1c2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-ifloor-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-ifloor-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-ifloor-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-ifloor-1.c
index b6a2122c0066e2d50a11d71cba78589fdc36d36c..1dbf472713b3fb7fa8bbccf6e16af0db9409f204 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-ifloor-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-ifloor-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-irint-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-irint-0.c
index 3297bc6ec65634ebf9500bfebb44ea3576d34e89..b2ce7006f5a77a36b9305433f6ae361c7e5bf09d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-irint-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-irint-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-irint-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-irint-1.c
index 5447326b9976987834c4aa412811353d6e2e3012..31436a89ce271e7fdd2d0423852a00ed007a0fd4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-irint-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-irint-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iround-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iround-0.c
index 12fe7a227724b27eede1564bd998b9b5ca47b7d2..8e8feebf97fd8f80580486b0d86d179828042908 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iround-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iround-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iround-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iround-1.c
index bad232d729d1faa2a85ce54b77c3876e19559d72..e5b95dbce5559ae22dddee1ea7c66c98acb0f92e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iround-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-iround-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lceil-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lceil-0.c
index f84357460af10a5b98b26d330a43c9ce82a7b677..ffef193d53b6a825997fb7a7bfd4a039a77d98b1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lceil-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lceil-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lceil-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lceil-1.c
index 2d4080868a90530315d86f9fad65bc226c9a7777..c29ae8860aab0e30cef20e4e9a322ffbab7e68fe 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lceil-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lceil-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv_zvl4096b -mabi=ilp32f -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv32gcv_zvl4096b -mabi=ilp32f -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lceil-rv32-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lceil-rv32-0.c
index 94168c1201eeaa0f38b7aa47c2fb34f3abd883cf..d9b0848bb7cf578b5fa1b9243140a79e4f82f56d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lceil-rv32-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lceil-rv32-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv_zvl4096b -mabi=ilp32d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv32gcv_zvl4096b -mabi=ilp32d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lceilf-rv64-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lceilf-rv64-0.c
index 12ac4e5ccd0e0dfce090f783944d8fd905e0d6d4..2ea751e676900f13c4843881038f46f04dddf330 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lceilf-rv64-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lceilf-rv64-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lfloor-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lfloor-0.c
index fe61e997de479176bb1bc367ee52499060a055f9..347cb0791a54850ae227d0e3a39d431a7c30885e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lfloor-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lfloor-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lfloor-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lfloor-1.c
index a64e5c4d252b8b8ecc6b5f8f476debcfaccf2ade..4d8caf60347e9bbab15acd47911d9088db06f413 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lfloor-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lfloor-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv_zvl4096b -mabi=ilp32f -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv32gcv_zvl4096b -mabi=ilp32f -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lfloor-rv32-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lfloor-rv32-0.c
index f5a8311a3e89a3c94c5b945eea6f325626a0274d..30aa13dcb9dabd995f3ef821f0f0020e32165ee0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lfloor-rv32-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lfloor-rv32-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv_zvl4096b -mabi=ilp32d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv32gcv_zvl4096b -mabi=ilp32d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lfloorf-rv64-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lfloorf-rv64-0.c
index 08b1b7f9137369c21a7240c6456af05838097159..c170a879656dbc52cf6643ff3ad89ac1e576477d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lfloorf-rv64-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lfloorf-rv64-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llceil-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llceil-0.c
index 204e3adefcad7586b95bbb4f26404f25c1762f63..919ce1e80b7b650c6b31400f5cfe8cd5cf14e8c0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llceil-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llceil-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llceilf-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llceilf-0.c
index 09842c0fc8e933ed5816491ae1b1e2aa6e67c815..710400fa99067c0c134ad7013514b69752511149 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llceilf-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llceilf-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llfloor-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llfloor-0.c
index 205a5d20d8a07cf35b1635c50228c223aa9c95f7..f3ffa0e0aa8f54a212c015130aa24e5400329b67 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llfloor-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llfloor-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llfloorf-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llfloorf-0.c
index b72eaf975c3e9356df51b2ea48742457b85edf4a..3dadab1a1d10981f96b1cd7e1c88232755410dd2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llfloorf-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llfloorf-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llrint-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llrint-0.c
index b0bf422f685069cbf2f11b7a37cdd4e61a2a1dd5..ada0b981246f68e4b7905253cd199c4336f56083 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llrint-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llrint-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llrintf-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llrintf-0.c
index 9445f5df60e6b3f53bb70d67f9ac0a1b48475619..07ead40a2c6b64f1d5c0ca3377504c06a6d5f50b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llrintf-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llrintf-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llrintf16-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llrintf16-0.c
index be2373d5b9d9fd3321585e1c54ee9d4525e07178..622b9bf3b025f9fa191f64078a266dda21a4adef 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llrintf16-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llrintf16-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llround-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llround-0.c
index 9bed7648b43c4e500ffc243b021d2b801195ba7d..c195e276f87d2e09d73ea4357ace06f56c8814f0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llround-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llround-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llroundf-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llroundf-0.c
index d3993fcfc4fbf80814addfcba154f6e096be2c56..60c670a0c840f3f0925ed996b7fb596f97294a29 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llroundf-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llroundf-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llroundf16-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llroundf16-0.c
index 0ca112dc96dddff96f7f20709b295bbabc300ea8..860af08ce7026241bcc78aeae04862db54fc312f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llroundf16-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-llroundf16-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrint-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrint-0.c
index 561edef7d3d55aea5104e5ece7b0ede069073f6f..d768dcecb79a719fc402e1905b587fccd672d439 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrint-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrint-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrint-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrint-1.c
index 5414352fbbeef686a132578dedc3f1f35d31349d..cfbd06349ab091cffd3de6790196f73255bd2d35 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrint-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrint-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv_zvfh_zvl4096b -mabi=ilp32f -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv32gcv_zvfh_zvl4096b -mabi=ilp32f -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrint-rv32-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrint-rv32-0.c
index 61563e47aa05cbf5e1011eb8b858970fa7fad3d7..012683169f1334b69d2d4efdc032bc0b226d2a7c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrint-rv32-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrint-rv32-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv_zvfh_zvl4096b -mabi=ilp32d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv32gcv_zvfh_zvl4096b -mabi=ilp32d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrintf-rv64-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrintf-rv64-0.c
index b095ff280ad3a143f99ce78d74502a57bbb94211..11c62f4a6936b308f2cc965eb69835e7daf6c9f9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrintf-rv64-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrintf-rv64-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrintf16-rv32-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrintf16-rv32-0.c
index f78c8e3fb619494f73bc81e8154c15cc01f63b64..78f5df4fbfe872ef8f020616db3807bbcf7fd079 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrintf16-rv32-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrintf16-rv32-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv_zvfh_zvl4096b -mabi=ilp32d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv32gcv_zvfh_zvl4096b -mabi=ilp32d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrintf16-rv64-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrintf16-rv64-0.c
index 21ef441131b22b5cd4acc68cb83cfa081eaff64d..37de3347a848f130b4e119192c0a118607f0ca2d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrintf16-rv64-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lrintf16-rv64-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lround-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lround-0.c
index c2a9f6b44947fdfa556dd53e37cad74958977a92..0ae48d249517eb05ab3dcd16946c78ce2ed1b7b5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lround-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lround-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lround-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lround-1.c
index 5a43133267178e6e07701045979bb5aee0f6585a..c9e29a6e782d96385f8766df7ffae0ec91877337 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lround-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lround-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv_zvfh_zvl4096b -mabi=ilp32f -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv32gcv_zvfh_zvl4096b -mabi=ilp32f -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lround-rv32-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lround-rv32-0.c
index f52685409c29d00703e3402d938e3b0cc04bc584..a915971e8a7786d2d345ecdc9a54db8f6aaa0523 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lround-rv32-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lround-rv32-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv_zvl4096b -mabi=ilp32d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv32gcv_zvl4096b -mabi=ilp32d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lroundf-rv64-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lroundf-rv64-0.c
index 2c6515aa96513e161e7478bd9c6b0c9e5c4edcaa..3942969e22ad1f91efd39938a645aaa082a1b613 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lroundf-rv64-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lroundf-rv64-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lroundf16-rv32-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lroundf16-rv32-0.c
index 4b660709c12a9dd4d5b09f2b7bc530a79ab1a55c..7080927f791ff00e60434cbc148c9fac2ca1ba8a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lroundf16-rv32-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lroundf16-rv32-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv_zvfh_zvl4096b -mabi=ilp32d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv32gcv_zvfh_zvl4096b -mabi=ilp32d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lroundf16-rv64-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lroundf16-rv64-0.c
index 9fa456372f3b973cca1854e22c79e5b61b54e69a..3d8967de7a58c3827969968ce33ebc5d7f42c67f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lroundf16-rv64-0.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-lroundf16-rv64-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-nearbyint-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-nearbyint-1.c
index 8c8498c5982ad78194d4a5b7ee92d4c741731d96..bb62ce2ef8a8f1cbe7b31f469cea0ce20f246f36 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-nearbyint-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-nearbyint-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-rint-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-rint-1.c
index cf10d61541a3335a2d92f76549e6990df1d8baef..9896e303974863b09fcb1b62be0466dcd08737f1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-rint-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-rint-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-round-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-round-1.c
index 97fd6975969fb567964d59ff1388aaccfdc3094e..33806f89c09678b1a3bc205bbe56e208560b4f0f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-round-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-round-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-roundeven-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-roundeven-1.c
index 8489d39481f78afba97dbc3af49b6878d02a9663..fe5b2891b92f3be771f4e2fc0c57894b545dd4d3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-roundeven-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-roundeven-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-trunc-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-trunc-1.c
index 51211bd653edd1a3cb6a0c08da727afb2c61ba28..d1c080ffa8cd9503e8a0a1b344f3f5ed958dd1ea 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-trunc-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-trunc-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/max-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/max-1.c
index e4400c20733ce120fadfb8be08706ee1946b63ba..c98357fab1959bd37bb1add66a7473072450413b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/max-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/max-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-1.c
index 9cbc845b38b70f2becbadfdc0dbff9d09dcd5d64..cd24922d0ad4c1f196f1b3e1af9e5542c4e1db24 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "../vls-vlmax/merge-1.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-2.c
index e270db947df91a669b62626bb62d7289d4f58910..52d91244f51b4c138dc66e6c5b7337325a9209d0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "../vls-vlmax/merge-2.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-3.c
index 033952ffbe4ffd32b9e104507d2995c27aac864c..4931d2a36047fb9ab9663ec30f43abb14705d1f4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "../vls-vlmax/merge-3.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-4.c
index 62ed1a5fd17aeb83922768e7699b0fbe2c68818f..f22a18f8ef3b269fcb14fdc9272024e60deecd3a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "../vls-vlmax/merge-4.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-5.c
index 42fa2ec7682b811ec0bcf44d595b20ded56ec1fd..cf8d04c4bce8e006ff49d2438fbae62bacd671c9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "../vls-vlmax/merge-5.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-6.c
index d5222f6cb2897df9d694dd227692065dc902ee46..3b6f9774d515b66216603035e79b19915162ebb6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "../vls-vlmax/merge-6.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-7.c
index bd097f033dd5875c301199b921a5d3c5eef6e284..b0257134438b451ad3e9abd0cef3410d8cfab09c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "../vls-vlmax/merge-7.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/min-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/min-1.c
index 41e2d26e1588e1a94798707e6a3ea690ffb16546..42b8d8c5dd0304b087318fb6b354613ad4e592a0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/min-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/min-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/minus-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/minus-1.c
index 4d698ba3c89060f00bdb8298d79ca9d335e47cea..10aacf3cbe234e563174e1c77ffaf416286afa5b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/minus-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/minus-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/minus-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/minus-2.c
index 2d9dd6290f5e6b9aea7c6ca49b924b5e71ddb6aa..10f9a7af6bc44f14602f402d24401ae4aa18f243 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/minus-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/minus-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/minus-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/minus-3.c
index 2625c164e41b47a495786bdd4d67511312e74afe..4dff0aa2402a87fd5ff3316c56694f211ba285bd 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/minus-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/minus-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/misalign-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/misalign-1.c
index 6e08f77921afd53769e3c4345d118896f6eacef3..1a076cbcd0f59a5a5d0bf95be353ce5174b51137 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/misalign-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/misalign-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m4 -fno-tree-loop-distribute-patterns" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m4 -fno-tree-loop-distribute-patterns" } */
 
 #include <stdlib.h>
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mod-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mod-1.c
index 17d2784b90dcb70b56df36fe59d0401a873ed167..4bb94beaf2fcd998a7388fa565f977001b45fc3d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mod-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mod-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-1.c
index 18dad346464b8db8e42b7b4d47047746b5c57afd..bd34f0289744f5f0eebe8ccafdb0cf86fde8cf70 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d --param=riscv-autovec-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "def.h"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-10.c
index c199c330ce549baba7b264e13da257f905cfc3ab..0de41d0c069be869c0dbbc25725ff26d109abe1f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d --param=riscv-autovec-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "def.h"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-11.c
index 4737008426f21f8e3a33c6f48e6422bfe74d9e3a..81720db35cce8b3be025869074c4e94f9a45182d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d --param=riscv-autovec-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "def.h"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-12.c
index f61c372162e08982dfd1c6343685a6028559b5c8..eae2bdc124dce7726acf0fe1793bd1a43dfca183 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d --param=riscv-autovec-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "def.h"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-13.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-13.c
index 56a7cf0b9f1d35159484a25191400dec3f0c6205..736f04f4ded6192c8870fb8246999fd1ddc8986f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-13.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d --param=riscv-autovec-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "def.h"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-14.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-14.c
index de49ed82dbbc046c63a603270c4d59b20b75a704..4606484f26cb6adb8a8af421239aadd3d79f3917 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-14.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-14.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d --param=riscv-autovec-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "def.h"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-15.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-15.c
index bed6a4784b06ede4f1043b391715d06fee69d27d..5c0795dd658bc176673f11173ebd072102711453 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-15.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-15.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d --param=riscv-autovec-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "def.h"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-16.c
index 06ab31b3094746de85774997824bda93ed868378..871225a8bc933f3f800dea3ca32d3efc7bf00318 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-16.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d --param=riscv-autovec-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "def.h"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-17.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-17.c
index c2f0e3c2fc613eb98453919b5b2aa56177a7bf74..c0d0ae51a627e10e6333939969257d943490a2af 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-17.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-17.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d --param=riscv-autovec-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "def.h"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-3.c
index 77d3fed58864d4dba9820d48de59494a42abebac..ca332240e469f1f841b49cedf8c650818ecbed4d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d --param=riscv-autovec-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "def.h"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-5.c
index 5fae343ed49c70c5a753c4850953c0a601db4f48..0f331e89f67d303d01317fb6c6a58943cddb3b3d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d --param=riscv-autovec-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "def.h"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-7.c
index c515f0225184a7122eae0f78633543a5884db70f..175bbb5f8c12757f9ed28148761251b8a64bc800 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d --param=riscv-autovec-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "def.h"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-8.c
index 1164ab5de9fcff93571a41bf1717e6f62b187d2c..76b81ad715a405141207d9af3ee6b1356d224f5e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d --param=riscv-autovec-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "def.h"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-9.c
index 404ef5d0e86e6f0a6fab80bec2b3a2de5899b509..73be9d633c2954e0bbe4e88d0d94c12531d02dc6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d --param=riscv-autovec-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "def.h"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mulh-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mulh-1.c
index 47bb40f9828732a300fa8872ad96f22bb47b30d5..fe1dd7c142b8ea37737e50c863192c0ee4a2f1e5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mulh-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mulh-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mult-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mult-1.c
index 0d1b5a45e9c94c7093b8f4068fb3035bdfaad730..58bb4287ec53b596ebf7bbc3d9add5b445373248 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mult-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mult-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/narrow-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/narrow-1.c
index ca6b856aca448c9da6472a1da7e0cd8d3ec7e236..a419de6f5305f7e2667a07a593bdf79902bb90a5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/narrow-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/narrow-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/narrow-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/narrow-2.c
index 3838ee5fd683e96b4720975cc9068da720f9b036..f87f5baaf76eb39d9650bd3b35fb80233677b502 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/narrow-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/narrow-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/narrow-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/narrow-3.c
index 03d03dc9c0c762073e997c57c052c10387e51313..26ea11875650d3854f15fd0899eb10cde7b1eea2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/narrow-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/narrow-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/neg-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/neg-1.c
index 0d723d70e8c245060f81726b6135e4f4d9cb42a7..fb58d2e6d7d9ab4204616c9a4b113aaa3c9df853 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/neg-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/neg-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/neg-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/neg-2.c
index c2ab0098afae84f9f447a0a3a4ae0993f47f4ce3..a980364c23240fde0c13d3152942cf0ce556c1a8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/neg-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/neg-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/not-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/not-1.c
index 316bac88fed3302c4cce588e223c220cb9a5c1d8..3cdeed08f1ac9b59e01b3186d91f1f5df198d06f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/not-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/not-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-1.c
index 327913ba5e5c347ad8c493cebc158039891ce388..35a648b97240691f72c415f429577c9b844e0970 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "../vls-vlmax/perm-1.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-2.c
index d56231268fd48f9cdec0ee62e9924c3a60550b5e..237997646b8f1fb7a1d79e9da1379187025afab6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "../vls-vlmax/perm-2.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-3.c
index 87319e373da10909d03017c86d34dde3b261e891..0d407efc285b4293967d4376459ff41492223629 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "../vls-vlmax/perm-3.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-4.c
index 4d6862cf1c04ab8a8e76acc234400b3a4c50b31e..a9706313367a5d93fb8f5c9d3708db773634c21a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "../vls-vlmax/perm-4.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-5.c
index 3460315bac373014b8b676c8f18b516984141da7..b465d559faea8302c46254ca78eba6fdf6fb51f1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "../vls-vlmax/perm-5.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-6.c
index a2a722f48972231bbca3f158c0aac67921fdf306..e20964b81cd9f8000085e7a9dcdde4354ded5990 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "../vls-vlmax/perm-6.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-7.c
index b474ccfd7ca97d0d262eb9115a80e73c044643ea..6cc753f72e91ce778fdf92fc0e351ff651c37053 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/perm-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "../vls-vlmax/perm-7.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/plus-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/plus-1.c
index 146b4dd2caceba4e1c70bef7ec73c79d9d676d7e..6b19f2d01c98b49e55a26eaf5124c95e4a72ed4d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/plus-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/plus-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/plus-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/plus-2.c
index 6ce07194d144960eddff18d11dd21c7f8338011e..797e7b98b920c3d6df37646d096ffc91f2a99a6c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/plus-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/plus-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/plus-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/plus-3.c
index c68b2bc7755daa4302f2eedfc58429f27b007ad7..d32d9d9a91d37d9b43976dc7acd1b536fe7dd830 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/plus-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/plus-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-1.c
index b6d8e6a51eddb8168f9abfa3affb22b4e43cdaa1..fb7dfb8def039ce776d725056d9b64f1651f67cf 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-10.c
index 22aace423cf5817ebf2c89a776c8c87f59a10e35..b5187e04a296049e284eeb5ff14f8e56c8a9e19d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-11.c
index 0e8518a473f7f5e9253d0935843572d5b65e34ff..6ad0207f5007e58dbb4724ea6374c5191b21c019 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-12.c
index aabbe71f8a358ea95e553d6773bfbd51443fbaaa..3fc84c146a2f1357a0a04ceb9576b2942cdc0ffd 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized-details" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-13.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-13.c
index c3f5f2c7c6dc302550cb84e5f889f1871b0fbbae..ab548f98517e80fb4b4f826046f30ea4873865ba 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-13.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized-details" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-14.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-14.c
index 61eea795ab96bb6c32acd6b4e49e9b5c06979ce3..12baca08f6887dbd6fff8f169de2319ee486d71f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-14.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-14.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized-details" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-15.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-15.c
index a368e5576d185b935aac237a4c4df44fafae0064..0db6e67e0ddc6d7a629b904b6e231c2d6e406fc1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-15.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-15.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-16.c
index c528d69ad8e7dc09bbbe57e8847afb9c15633dd2..d856bf8e84ed0b4c6fd7cffa86bbcc73a8622087 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-16.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-17.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-17.c
index d0f00e66dfc570d154333c1992d473949f848782..e208a4d36e06cec79104797e7fe9de169e879839 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-17.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-17.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-18.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-18.c
index ba8fb520364dc323297ba3ca0f4b60aee2233726..24a9a6bf9756c2b63cea04d097aadf706b8f7f4f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-18.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-18.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-19.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-19.c
index 5130fe5f2e33d386787e2b72712386be80d7f931..5a4df4824240e4bcda93865f2c9d41a29fee5a61 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-19.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-19.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-2.c
index 158aaf3c006f1ccfbbfe42551c2c8b27d5471f8a..3d845921c22839ef592cc45d448540eddb1db362 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-20.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-20.c
index 819104a8cdf9e4b535df745e2da1b8a4c01ac00c..daf9c8a32a947359c34bf7578eb22d618dd9eeac 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-20.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-20.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-21.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-21.c
index 2b61e0ac71a0952e46902e3e685198dbffb3de6d..d1b8c2535ccab31659bd9946d6130d1de3024777 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-21.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-21.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-3.c
index d24f2ef5b1edc5991a2b6f20efec2fb21867a138..18436aadcf758cd7664ef9102199bd2779fdf07c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-4.c
index 1143bdec46d7a23e4c25fc5566e5e4e3ddaa6fa3..f34ee84be982dadbc8991c27fd3909723a7259ea 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-5.c
index 0370b4dff7c5c7a40b39e90908727ac6b8345bdb..bcfc53697324b3f49e263cadb339e6a4e836f62b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized-details" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-6.c
index 954e39d76a4d35f559903669e9db96133b7147e1..52f7284268c6a0e0dfd8ff35cc876c4dc00dd979 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized-details" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-7.c
index 6762db8011a44aa46bc09d969109d51c87cfe661..faae666f7cc6f48d1cd2eba526ab81df09c36085 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized-details" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-8.c
index 905c9d0a833a7c7e9c924dcca5f562f782c6c4b3..a7e02d3f9889aa1815fa8de88fe632d40a4eedde 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-9.c
index be7c32358ceb9eb12b1fbb53ba3b1210482443c4..7d63738fdaab6eeedc5d0b46b4a64e7528a6dad9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-1.c
index 2c831f9f22868983a9996d5c26919f1d0837007f..3fe720d4a8b328c714f815674df8d6b6982a992b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-2.c
index a465bb6ea64c4457b0c4bc142e3a0fc134546704..e9102d173c10c82fb4fc485ff1b7c1f4df272737 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-3.c
index 9c9899b31dd060540f752f45eab028b94ce505f5..e02f6fc84f505ccf620a4adaa9c70337d7528979 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-4.c
index 17bc31367d63cdbd4ac6ce119d2b1d138ac0c450..f552439c2c0ed837a7662ec08e2866c59effa244 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-5.c
index 6398f2476adcf58bd044505afe13e9cfdbec03f9..1de2d43e0d160cf03be3e4bd9bc013f6754af4a3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-6.c
index 960a164112fb5b2e28bf9234eba5b9f9db7d827b..11b14862dadd455f9c05391f791b8ec3e10c7816 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-7.c
index 98be878daedc530b8e7ef84426116b7e7888c024..4ba0f8522e2b526123210675faf5c9c727792967 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-8.c
index b8d952ef6ad0aa74c15979b3fa9faa48adf82ba3..441d801e4fdd90209a00a1069e4734bc1d1897b8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-9.c
index 1db68fcf3fe360d6b9d413b44a7ac8832cfa5453..7331ad06928654a2ebb01c47625614e85771c8a8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/repeat-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/series-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/series-1.c
index b575bb9e60bfb0187d234b59c3a28f2c36db8948..d515887bda85be3b77957141a98117bbc2e7c20c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/series-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/series-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -fno-builtin" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -fno-builtin" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/series-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/series-2.c
index c84eed158e5592d00311b7ae4499ab7dd5dc978e..9c4381d88c77db38a8f47b271a8df8713f4a9a0b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/series-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/series-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -fno-builtin" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -fno-builtin" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/series-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/series-3.c
index 16cce76dcf46ac83bb6a1bf5e2945e3be6506a24..6d56974d3b924a5ba88d6565247a95dbb26ccb29 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/series-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/series-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -fno-builtin" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -fno-builtin" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/series-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/series-4.c
index 966391e1f5c3ff6e678588d3f439fa6094a2e43f..1a07f8d70f26fa65093b96a1a312e8383dca85e0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/series-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/series-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -fno-builtin" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8 -fno-builtin" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-1.c
index ee8da2573c706b11de05d1cdaae3220b55f953c6..eb3f32c1fc92aa4411bc35038986ed6840171786 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-2.c
index ebd5575f26727f7d267166a76f068ceeeca4ea56..8caed20a18b0eb84b390baec567c15a252a614cd 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-3.c
index 244bee02e55227440af3ce0da71ef9cdd43eff97..f54cb09a9cbe05d0895710ba742d1c3335c10746 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-4.c
index 56b6ef92c83608d5f9d0d4945f40d632fe641f99..ee80ffdc4dadded24e6a0c4c49d39fd00a8d13f1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-5.c
index c909cb1a75a88e6e9491997d65ae30c5f499f367..ee097806c909fa9547c50bc20460470bbb2a0d2c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-6.c
index fdea84c39d8dd1d1cacc91309a845aa484d596a7..07cfcffd5ae07f7aae76bb5c28c64cb6bf532f39 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-1.c
index 842bb630be5681fa4a75777fba64536354d7f6c7..b64c73f34f13c7204c3ca08bb72071ac2d6daef3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d --param=riscv-autovec-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-2.c
index 8f6ee81b98f274591e9f45238ec20c0234fb4b68..8fcdca705384aa4f458fe6b8e69df343e0799111 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d --param=riscv-autovec-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-3.c
index 0f317d6cce5cb61d8db4adfcc191c643e4646aca..ca296ce02d6644e9bcd3667b5c3148edde2bf869 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d --param=riscv-autovec-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-5.c
index b366a4649d875b4334deea54be265fd731fb15a2..150135a91103bf425d00d4adbac833b2f6190cc4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d --param=riscv-autovec-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-6.c
index d35e2a44f79b83684f75f075a0c385446416a780..c5d2d019434856640089e14cc0cdee50c5edabd6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d --param=riscv-autovec-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/sqrt-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/sqrt-1.c
index 60dbfd77c2af1803f05a90c4c26b8379e78f9711..1d94d57c72937d6a667a9245f5e4c03c14ccf5d3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/sqrt-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/sqrt-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-1.c
index ed15a12ecfb23ad03bf214292d6cfb01541e91ce..675ce8512a5feb01029a36b0e36364f311f39c15 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-2.c
index 5deb097bf544582cf5f644004c5e7799c8b2221c..475dcf2ee3d0a371e655e1cfb552a70616b7b163 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-3.c
index e503d6c4dff01a3c4eb9a9caa3dd05eea15081b1..974d566ffd6d60e6fa7c15e1a6cf188737d1c0a2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-4.c
index c7945643d57c63945c5792c9e41380459d71d20c..19170a5a9a4651410fb098de648f5110f1b87894 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-5.c
index 43e179229500d74a484987953d412d2da0b50389..a4797450476a87601c09839e22858e4d525a8b5e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-6.c
index bb91c6a185542e05bbc914e4f4005255d8869f2d..17ec6d0030a796efd03d47f2040c5aee9f2545b5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-7.c
index b12f08d280e19faedb982789d5be2d3b044d311b..21e2c10e71f1f3613d4e0a32f79207ed20d66934 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trailing-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trunc-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trunc-1.c
index ae129d094dac9df001193916e4e41bb88d2c7e1c..c197db32114e27e3ea61dec22cd636ad4b070333 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trunc-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trunc-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trunc-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trunc-2.c
index 0631dad5321cae0986c2fb77f3a51ac8fd87e9e7..25bb2a246623ce3df1cca926b196ede5139ec212 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trunc-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trunc-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trunc-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trunc-3.c
index 3c5f045632f451dfcac8e480902c66d3c3e586e2..1993c63ae2daa29e2975f3bcf1139c5b5f020b0f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trunc-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trunc-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trunc-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trunc-4.c
index d9a5eeb212ed96c7a832c0f498928c101d19e0e9..bd931e8861bb786ca5f086a689c1bc46f39066ba 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trunc-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trunc-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trunc-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trunc-5.c
index b87a5c4dfadbcbcd6a5ad6a3b0f9044d27d2e946..41d2ce4712513931089b2e2f4cc081e13d38ec2f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trunc-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/trunc-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-1.c
index d53fdc221628abad68c6ef5a617d69fa8acc9c36..3640b6cc6c7413b0ec1565f56c8ca7c19a2752a5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-10.c
index c9242362372c57a9b2081a718fb4c82cf32b55ee..a0f02c1dce0d9f734c7e3cea5be901950c7b33be 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-11.c
index 4ec86789d80ad052e41408771db785c9e3381c9e..c3b20c4f30dff3ba6ca73422044cf0840c3a4434 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-12.c
index 4436830307b7955c554d93d72f8adece23fcd066..3da7fa1fe760dd4276fc19b5e1a15cc2da06265b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-13.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-13.c
index 037a4a6f71a4c2fd8274aa0755483522f944c4a3..230d431089475b0e1266af12eda61f51ce1548c6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-13.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-14.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-14.c
index 4dd58884d79b0c058d38be668f19096c1b773e0f..0379fa32442adc681eaefc25b65b647652348bb5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-14.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-14.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-15.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-15.c
index 77eeed49a992343e53d7754677c61e5137a3d726..fcc80cfd26908cd6adf9debae9036561d4e2c96d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-15.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-15.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-16.c
index 4f2bb2c75084b195b3802e4ad824003e1c2c30ab..105cb9681cac358b3a1999d45effe6c46085386d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-16.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-17.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-17.c
index 9376aee2ac2201ed3a02bd694ae9fbb9b5c8d7fb..3a75926c3e2428201e87543dcfb17a006527a902 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-17.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-17.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-18.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-18.c
index ade887ea3befff18873a6b447d73a2668fd4ad00..aa7aea873c106759e43b815ba5232079aaabbb54 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-18.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-18.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-19.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-19.c
index 7106bd936ad0fd32510ddbf7e6ea063e59664e30..efbe874581aa5ce9f1d73bd6ec2bdb35ace97285 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-19.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-19.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-2.c
index 6132bb4945a5a6a126ddcbdd0f0e90667eb6d55e..68e3c9debecd9abc9db45887f9a996b7998253ae 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-20.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-20.c
index 2da3e3c18a4c211d88f111dd045ac3bd8e18e49d..88f2769043bc98dec580c63935916a9d91b70b76 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-20.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-20.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-21.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-21.c
index db2682ad3fd5bca642c2cc3ffbe320c8d0976b6e..a483304715b27f778ea3afc26c239ad4f655e7a3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-21.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-21.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-22.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-22.c
index 3bb3936c006f2fc177751825838ae7e9080880a4..f100e5f12d36605e5720ff70a0997595c77aba85 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-22.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-22.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-3.c
index 6080060b60df20d0412703d0a2e489b586b6fd01..42080e69cfa7680929e11666dd6d46d4362e014f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-4.c
index 09852f7ca1d1e976132eb349e944f5fd171b3286..474057eb2ba6695aae098a658c0757b35a66f36e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-5.c
index b6a4d1a2c8bcde4ed2dd9660e513ae345eaff969..6864d7fe4ac8a9f8e83d9b7d914ee403c0123a27 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-6.c
index 11e22db53f4956422b9081c10521e3b0bcd6eb0f..b8cdc0829a365b219cf2ebfa295ee123fa65cbd5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-7.c
index d4ce093f20167eeed44bd6a0078287a897dfd234..58e3e7d6fb01a47ee50494fee7103ceb91686aec 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-8.c
index 4beb2b0b9be46e8da1acdac67d09f422ca750277..8292ee9351cdc4b7b07627d4771971a142025652 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-9.c
index b59f3f3d1215494d30a6ced3d3237af144661d2f..ae45b71974f6ac638f7e3b84999c118b0c0d45c4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/vec-set-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 -mrvv-max-lmul=m8" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wadd-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wadd-1.c
index bce56b77fd12ec36dd7948d0df2d222cfd1f1931..2269a4cd243a787d54613981828e652c2f39dd1b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wadd-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wadd-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wadd-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wadd-2.c
index d0b55c0a1d7814ef15cdbc92b18dce36fc9c0750..b4ab497ab9e7d6538f54e00748d94a2c79f2c811 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wadd-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wadd-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wadd-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wadd-3.c
index b6067c8da4f0f71920a8a4cfc6df595ed60fc141..dbae1f13eb07c5dcc9aa6ff2ffd07546e0c9dfc6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wadd-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wadd-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wadd-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wadd-4.c
index 253750ad5e01507adfa6b0e0a24eb30c04121b09..21c29bc62636a6b3a6cf09e93d1b46c7e1737a17 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wadd-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wadd-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfma-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfma-1.c
index a92b1c97140866c202b1b9df1f8891cc62c4fa93..2aab1e00a722f63b8ca566e9af4b9293f96b9c1e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfma-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfma-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfma-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfma-2.c
index 145ffd94ba99561139996e91e92e7c89b42825ba..bff13c184be843cc969bffa28d19d77914e09a32 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfma-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfma-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfma-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfma-3.c
index 4461a28dbcddf0756bacf197332204686e131730..537ed0a8563c7f1fdbb9a85e83658906fd4a73d3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfma-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfma-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfms-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfms-1.c
index 804cfa003eddf96e5c0ea9b5ac466edef53d1ab8..7710aa7090b7f6594fed4d4b3cb08429b313d304 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfms-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfms-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfnma-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfnma-1.c
index 7c555866792a872ca826b8a0e49647c4632eada7..479d45eb88c70a279d8f0480d6799a6cb57a1032 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfnma-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfnma-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfnms-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfnms-1.c
index ce11509189421d2fe8764e7cc0350fc6451669a5..1eeb6a1d663a2a4576143f2d6a0d269f9b300700 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfnms-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wfnms-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wmul-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wmul-1.c
index 8269dfa3fada3a682829cc7012d1402116d2c6d6..46e67408e7991181dbc5f09f9e81acd18afcd1e9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wmul-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wmul-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wmul-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wmul-2.c
index 3675388b77d2668754b46270f70af272d4d1d239..4f4aaa89255aa3a50ea1dddb2dc29370d86b7df5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wmul-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wmul-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wmul-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wmul-3.c
index 813a9a633f574fabee66e59c914cf9df62d917a8..73bc45bad8b8c2539c28bd2bc3b94bc5f542e120 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wmul-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wmul-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wred-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wred-1.c
index 7ce910cbfce9b775c08c86d7457dd3dba6e7df41..7cdd2d8cf45488133a7837d20a007a91ea223fae 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wred-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wred-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wred-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wred-2.c
index 75d49bc25281e3b462f658ddc4043675623fe052..d7895666560dc0d8d986b77aaf15e147e9fc6744 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wred-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wred-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wred-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wred-3.c
index f49acc14d7afcb81911e1943bb7e8b63014d92eb..6e9456b23209bb2128fd479a87b5f62c62f2b3ee 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wred-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wred-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "wred-2.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wsub-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wsub-1.c
index eea95400b63f4ed0b7a01f563dc5fe03b9e2fa67..6d95914ad5f574155f2b9093f2b03cff177369d5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wsub-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wsub-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wsub-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wsub-2.c
index 1048d29789659c1cd442e9177374403c18aebacd..9e67ad1c039c6daeb7cd81f9a667f441dc4d8a2d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wsub-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wsub-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wsub-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wsub-3.c
index ac4bfe2e87a367ac167644b85e737e8719ca792c..f92ffd76965e5de6ba8256f39b1384cf00dac920 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wsub-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wsub-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wsub-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wsub-4.c
index 619c0c77aaf15cd6378c7a24be54ef035f75775b..69883e415911696b1c9b9913235f30af65427031 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wsub-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/wsub-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -fdump-tree-optimized" } */
 
 #include "def.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_reduc-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_reduc-1.c
index 213c4d0cb1f8521ab1b53420a66e92f9a74725ed..be1e4cd32245eb58157d1fe2127c9e9bac7e4124 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_reduc-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_reduc-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-additional-options "-march=rv64gcv_zvfh_zvl128b -mabi=lp64d -mrvv-vector-bits=zvl --param riscv-autovec-lmul=m2 -fno-vect-cost-model -ffast-math" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh_zvl128b -mabi=lp64d -mrvv-vector-bits=zvl -mrvv-max-lmul=m2 -fno-vect-cost-model -ffast-math" } */
 #include <stdint-gcc.h>
 
 #define TEST_TYPE(TYPE1, TYPE2, N)                                             \

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_reduc_order-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_reduc_order-2.c
index fd99a5dac1f0ee5ac1960c4f03fe67d95ae990a3..c97bde0b9d1f47ad769ae5266ac5df03c469d2e2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_reduc_order-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_reduc_order-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -mrvv-vector-bits=scalable --param riscv-autovec-lmul=m2 -fno-vect-cost-model" } */
+/* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d -mrvv-vector-bits=scalable -mrvv-max-lmul=m2 -fno-vect-cost-model" } */
 #include <stdint-gcc.h>
 
 #define TEST_TYPE(TYPE1, TYPE2, N)                                             \

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-3.c
index a2d38a85264dcae1faf14d8306d61bd4bb6ad8ed..4a34f8a7d3d98c663e5620de03196c4d3c80d5df 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gc_zve32f -mabi=ilp32d -fno-vect-cost-model -mrvv-vector-bits=zvl --param riscv-autovec-lmul=m2 -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gc_zve32f -mabi=ilp32d -fno-vect-cost-model -mrvv-vector-bits=zvl -mrvv-max-lmul=m2 -fdump-tree-vect-details" } */
 
 #include "template-1.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-3.c
index 8b054b7890ddaca9054822f60e990a96838a7795..e72a5c1080c78a6150466b3735da24b2d4c1a2ec 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gc_zve32x -mabi=ilp32d -fno-vect-cost-model -mrvv-vector-bits=zvl --param riscv-autovec-lmul=m2 -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gc_zve32x -mabi=ilp32d -fno-vect-cost-model -mrvv-vector-bits=zvl -mrvv-max-lmul=m2 -fdump-tree-vect-details" } */
 
 #include "template-1.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-3.c
index 34d34e756b1e64cb10847bfbedb8a440597b29b2..0fe15ec69e9ca336a1d13b97db9c5dd04fdcf0cc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gc_zve64d -mabi=ilp32d -fno-vect-cost-model -mrvv-vector-bits=zvl --param riscv-autovec-lmul=m2 -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gc_zve64d -mabi=ilp32d -fno-vect-cost-model -mrvv-vector-bits=zvl -mrvv-max-lmul=m2 -fdump-tree-vect-details" } */
 
 #include "template-1.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-3.c
index 2dfcc6d2a73d42ccc4590559243af91558eb354b..8f47df61632fefe19148eb2df4ea6ae26da6008b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gc_zve64f -mabi=ilp32d -fno-vect-cost-model -mrvv-vector-bits=zvl --param riscv-autovec-lmul=m2 -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gc_zve64f -mabi=ilp32d -fno-vect-cost-model -mrvv-vector-bits=zvl -mrvv-max-lmul=m2 -fdump-tree-vect-details" } */
 
 #include "template-1.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-3.c
index d7ee31f0af41f793fc1a5d4cadf340f2e0286789..a02cbd42c44fc97132b999323ed38aa807917aea 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gc_zve64x -mabi=ilp32d -fno-vect-cost-model -mrvv-vector-bits=zvl --param riscv-autovec-lmul=m2 -fdump-tree-vect-details" } */
+/* { dg-options "-march=rv32gc_zve64x -mabi=ilp32d -fno-vect-cost-model -mrvv-vector-bits=zvl -mrvv-max-lmul=m2 -fdump-tree-vect-details" } */
 
 #include "template-1.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-1.c
index 25b34ee2331c44068873ee91850c2dbbf8c1d32b..0699cb78dd5125e651c5ede0463cdbf05865bc7a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-1.c
@@ -50,7 +50,7 @@ void f2 (__INT32_TYPE__* a, __INT32_TYPE__* b, int l)
    Use extern here so that we get a known alignment, lest
    DATA_ALIGNMENT force us to make the scan pattern accomodate
    code for different alignments depending on word size.
-** f3: { target { { any-opts "-mcmodel=medlow" } && { no-opts "-march=rv64gcv_zvl512b" "-march=rv64gcv_zvl1024b" "--param=riscv-autovec-lmul=dynamic" "--param=riscv-autovec-lmul=m2" "--param=riscv-autovec-lmul=m4" "--param=riscv-autovec-lmul=m8" "-mrvv-vector-bits=zvl" } } }
+** f3: { target { { any-opts "-mcmodel=medlow" } && { no-opts "-march=rv64gcv_zvl512b" "-march=rv64gcv_zvl1024b" "-mrvv-max-lmul=dynamic" "-mrvv-max-lmul=m2" "-mrvv-max-lmul=m4" "-mrvv-max-lmul=m8" "-mrvv-vector-bits=zvl" } } }
 **        lui\s+[ta][0-7],%hi\(a_a\)
 **        addi\s+[ta][0-7],[ta][0-7],%lo\(a_a\)
 **        lui\s+[ta][0-7],%hi\(a_b\)
@@ -85,7 +85,7 @@ void f2 (__INT32_TYPE__* a, __INT32_TYPE__* b, int l)
 */
 
 /*
-** f3: { target { { any-opts "-mcmodel=medany" } && { no-opts "-march=rv64gcv_zvl512b" "-march=rv64gcv_zvl256b" "-march=rv64gcv_zvl1024b" "--param=riscv-autovec-lmul=dynamic" "--param=riscv-autovec-lmul=m8" "--param=riscv-autovec-lmul=m4" "-mrvv-vector-bits=zvl" } } }
+** f3: { target { { any-opts "-mcmodel=medany" } && { no-opts "-march=rv64gcv_zvl512b" "-march=rv64gcv_zvl256b" "-march=rv64gcv_zvl1024b" "-mrvv-max-lmul=dynamic" "-mrvv-max-lmul=m8" "-mrvv-max-lmul=m4" "-mrvv-vector-bits=zvl" } } }
 **        lla\s+[ta][0-7],a_a
 **        lla\s+[ta][0-7],a_b
 **        vsetivli\s+zero,16,e32,m8,ta,ma

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-2.c b/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-2.c
index 1161ccb95cb81dfe3dc0b6eb567715363e2f2a00..6a854c87cd061ed40fd3b10346c4662ccbff2811 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-2.c
@@ -16,7 +16,7 @@ typedef struct { short s; char c[30]; } s16;
 */
 
 /*
-** f1: { target {  { any-opts "-mrvv-vector-bits=zvl" } && { no-opts "-march=rv64gcv_zvl1024b" "-march=rv64gcv_zvl256b" "-march=rv64gcv_zvl512b --param=riscv-autovec-lmul=dynamic" } } }
+** f1: { target {  { any-opts "-mrvv-vector-bits=zvl" } && { no-opts "-march=rv64gcv_zvl1024b" "-march=rv64gcv_zvl256b" "-march=rv64gcv_zvl512b -mrvv-max-lmul=dynamic" } } }
 **     vl1re8.v\s+v1,0\(a1\)
 **     vs1r.v\s+v1,0\(a0\)
 **     ret
@@ -37,7 +37,7 @@ void f1 (c16 *a, c16* b)
 */
 
 /*
-** f2: { target {  { any-opts "-mrvv-vector-bits=zvl" } && { no-opts "-march=rv64gcv_zvl1024b" "-march=rv64gcv_zvl256b" "-march=rv64gcv_zvl512b --param=riscv-autovec-lmul=dynamic" } } }
+** f2: { target {  { any-opts "-mrvv-vector-bits=zvl" } && { no-opts "-march=rv64gcv_zvl1024b" "-march=rv64gcv_zvl256b" "-march=rv64gcv_zvl512b -mrvv-max-lmul=dynamic" } } }
 **     vl2re8.v\s+v2,0\(a1\)
 **     vs2r.v\s+v2,0\(a0\)
 **     ret
@@ -57,7 +57,7 @@ void f2 (c32 *a, c32* b)
 */
 
 /*
-** f3: { target {  { any-opts "-mrvv-vector-bits=zvl" } && { no-opts "-march=rv64gcv_zvl1024b" "-march=rv64gcv_zvl256b" "-march=rv64gcv_zvl512b --param=riscv-autovec-lmul=dynamic" } } }
+** f3: { target {  { any-opts "-mrvv-vector-bits=zvl" } && { no-opts "-march=rv64gcv_zvl1024b" "-march=rv64gcv_zvl256b" "-march=rv64gcv_zvl512b -mrvv-max-lmul=dynamic" } } }
 **     vl2re16.v\s+v2,0\(a1\)
 **     vs2r.v\s+v2,0\(a0\)
 **     ret

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
index fe404c604dd0b9e34b47c419473723b0aa3b25e2..8c4e916d5b1f385b4a358d7912a999984eba0aff 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
+++ b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
@@ -47,16 +47,16 @@ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/autovec/struct/*.\[cS\]]] \
        "" "-O3 -ftree-vectorize"
 
 set AUTOVEC_TEST_OPTS [list \
-  {-ftree-vectorize -O3 --param riscv-autovec-lmul=m1} \
-  {-ftree-vectorize -O3 --param riscv-autovec-lmul=m2} \
-  {-ftree-vectorize -O3 --param riscv-autovec-lmul=m4} \
-  {-ftree-vectorize -O3 --param riscv-autovec-lmul=m8} \
-  {-ftree-vectorize -O3 --param riscv-autovec-lmul=dynamic} \
-  {-ftree-vectorize -O2 --param riscv-autovec-lmul=m1} \
-  {-ftree-vectorize -O2 --param riscv-autovec-lmul=m2} \
-  {-ftree-vectorize -O2 --param riscv-autovec-lmul=m4} \
-  {-ftree-vectorize -O2 --param riscv-autovec-lmul=m8} \
-  {-ftree-vectorize -O2 --param riscv-autovec-lmul=dynamic} ]
+  {-ftree-vectorize -O3 -mrvv-max-lmul=m1} \
+  {-ftree-vectorize -O3 -mrvv-max-lmul=m2} \
+  {-ftree-vectorize -O3 -mrvv-max-lmul=m4} \
+  {-ftree-vectorize -O3 -mrvv-max-lmul=m8} \
+  {-ftree-vectorize -O3 -mrvv-max-lmul=dynamic} \
+  {-ftree-vectorize -O2 -mrvv-max-lmul=m1} \
+  {-ftree-vectorize -O2 -mrvv-max-lmul=m2} \
+  {-ftree-vectorize -O2 -mrvv-max-lmul=m4} \
+  {-ftree-vectorize -O2 -mrvv-max-lmul=m8} \
+  {-ftree-vectorize -O2 -mrvv-max-lmul=dynamic} ]
 foreach op $AUTOVEC_TEST_OPTS {
   dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/autovec/partial/*.\[cS\]]] \
     "" "$op"
@@ -80,12 +80,12 @@ foreach op $AUTOVEC_TEST_OPTS {
 
 # widening operation only test on LMUL < 8
 set AUTOVEC_TEST_OPTS [list \
-  {-ftree-vectorize -O3 --param riscv-autovec-lmul=m1} \
-  {-ftree-vectorize -O3 --param riscv-autovec-lmul=m2} \
-  {-ftree-vectorize -O3 --param riscv-autovec-lmul=m4} \
-  {-ftree-vectorize -O2 --param riscv-autovec-lmul=m1} \
-  {-ftree-vectorize -O2 --param riscv-autovec-lmul=m2} \
-  {-ftree-vectorize -O2 --param riscv-autovec-lmul=m4} ]
+  {-ftree-vectorize -O3 -mrvv-max-lmul=m1} \
+  {-ftree-vectorize -O3 -mrvv-max-lmul=m2} \
+  {-ftree-vectorize -O3 -mrvv-max-lmul=m4} \
+  {-ftree-vectorize -O2 -mrvv-max-lmul=m1} \
+  {-ftree-vectorize -O2 -mrvv-max-lmul=m2} \
+  {-ftree-vectorize -O2 -mrvv-max-lmul=m4} ]
 foreach op $AUTOVEC_TEST_OPTS {
   dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/autovec/widen/*.\[cS\]]] \
     "" "$op"
@@ -97,26 +97,26 @@ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/autovec/vls-vlmax/*.\[cS\]]]
 
 # gather-scatter tests
 set AUTOVEC_TEST_OPTS [list \
-  {-ftree-vectorize -O3 -mrvv-vector-bits=zvl --param riscv-autovec-lmul=m1 -fno-vect-cost-model -ffast-math} \
-  {-ftree-vectorize -O3 -mrvv-vector-bits=zvl --param riscv-autovec-lmul=m2 -fno-vect-cost-model -ffast-math} \
-  {-ftree-vectorize -O3 -mrvv-vector-bits=zvl --param riscv-autovec-lmul=m4 -fno-vect-cost-model -ffast-math} \
-  {-ftree-vectorize -O3 -mrvv-vector-bits=zvl --param riscv-autovec-lmul=m8 -fno-vect-cost-model -ffast-math} \
-  {-ftree-vectorize -O3 -mrvv-vector-bits=zvl --param riscv-autovec-lmul=dynamic -ffast-math} \
-  {-ftree-vectorize -O2 -mrvv-vector-bits=zvl --param riscv-autovec-lmul=m1 -fno-vect-cost-model -ffast-math} \
-  {-ftree-vectorize -O2 -mrvv-vector-bits=zvl --param riscv-autovec-lmul=m2 -fno-vect-cost-model -ffast-math} \
-  {-ftree-vectorize -O2 -mrvv-vector-bits=zvl --param riscv-autovec-lmul=m4 -fno-vect-cost-model -ffast-math} \
-  {-ftree-vectorize -O2 -mrvv-vector-bits=zvl --param riscv-autovec-lmul=m8 -fno-vect-cost-model -ffast-math} \
-  {-ftree-vectorize -O2 -mrvv-vector-bits=zvl --param riscv-autovec-lmul=dynamic -ffast-math} \
-  {-ftree-vectorize -O3 -mrvv-vector-bits=scalable --param riscv-autovec-lmul=m1 -fno-vect-cost-model -ffast-math} \
-  {-ftree-vectorize -O3 -mrvv-vector-bits=scalable --param riscv-autovec-lmul=m2 -fno-vect-cost-model -ffast-math} \
-  {-ftree-vectorize -O3 -mrvv-vector-bits=scalable --param riscv-autovec-lmul=m4 -fno-vect-cost-model -ffast-math} \
-  {-ftree-vectorize -O3 -mrvv-vector-bits=scalable --param riscv-autovec-lmul=m8 -fno-vect-cost-model -ffast-math} \
-  {-ftree-vectorize -O3 -mrvv-vector-bits=scalable --param riscv-autovec-lmul=dynamic -ffast-math} \
-  {-ftree-vectorize -O2 -mrvv-vector-bits=scalable --param riscv-autovec-lmul=m1 -fno-vect-cost-model -ffast-math} \
-  {-ftree-vectorize -O2 -mrvv-vector-bits=scalable --param riscv-autovec-lmul=m2 -fno-vect-cost-model -ffast-math} \
-  {-ftree-vectorize -O2 -mrvv-vector-bits=scalable --param riscv-autovec-lmul=m4 -fno-vect-cost-model -ffast-math} \
-  {-ftree-vectorize -O2 -mrvv-vector-bits=scalable --param riscv-autovec-lmul=m8 -fno-vect-cost-model -ffast-math} \
-  {-ftree-vectorize -O2 -mrvv-vector-bits=scalable --param riscv-autovec-lmul=dynamic -ffast-math} ]
+  {-ftree-vectorize -O3 -mrvv-vector-bits=zvl -mrvv-max-lmul=m1 -fno-vect-cost-model -ffast-math} \
+  {-ftree-vectorize -O3 -mrvv-vector-bits=zvl -mrvv-max-lmul=m2 -fno-vect-cost-model -ffast-math} \
+  {-ftree-vectorize -O3 -mrvv-vector-bits=zvl -mrvv-max-lmul=m4 -fno-vect-cost-model -ffast-math} \
+  {-ftree-vectorize -O3 -mrvv-vector-bits=zvl -mrvv-max-lmul=m8 -fno-vect-cost-model -ffast-math} \
+  {-ftree-vectorize -O3 -mrvv-vector-bits=zvl -mrvv-max-lmul=dynamic -ffast-math} \
+  {-ftree-vectorize -O2 -mrvv-vector-bits=zvl -mrvv-max-lmul=m1 -fno-vect-cost-model -ffast-math} \
+  {-ftree-vectorize -O2 -mrvv-vector-bits=zvl -mrvv-max-lmul=m2 -fno-vect-cost-model -ffast-math} \
+  {-ftree-vectorize -O2 -mrvv-vector-bits=zvl -mrvv-max-lmul=m4 -fno-vect-cost-model -ffast-math} \
+  {-ftree-vectorize -O2 -mrvv-vector-bits=zvl -mrvv-max-lmul=m8 -fno-vect-cost-model -ffast-math} \
+  {-ftree-vectorize -O2 -mrvv-vector-bits=zvl -mrvv-max-lmul=dynamic -ffast-math} \
+  {-ftree-vectorize -O3 -mrvv-vector-bits=scalable -mrvv-max-lmul=m1 -fno-vect-cost-model -ffast-math} \
+  {-ftree-vectorize -O3 -mrvv-vector-bits=scalable -mrvv-max-lmul=m2 -fno-vect-cost-model -ffast-math} \
+  {-ftree-vectorize -O3 -mrvv-vector-bits=scalable -mrvv-max-lmul=m4 -fno-vect-cost-model -ffast-math} \
+  {-ftree-vectorize -O3 -mrvv-vector-bits=scalable -mrvv-max-lmul=m8 -fno-vect-cost-model -ffast-math} \
+  {-ftree-vectorize -O3 -mrvv-vector-bits=scalable -mrvv-max-lmul=dynamic -ffast-math} \
+  {-ftree-vectorize -O2 -mrvv-vector-bits=scalable -mrvv-max-lmul=m1 -fno-vect-cost-model -ffast-math} \
+  {-ftree-vectorize -O2 -mrvv-vector-bits=scalable -mrvv-max-lmul=m2 -fno-vect-cost-model -ffast-math} \
+  {-ftree-vectorize -O2 -mrvv-vector-bits=scalable -mrvv-max-lmul=m4 -fno-vect-cost-model -ffast-math} \
+  {-ftree-vectorize -O2 -mrvv-vector-bits=scalable -mrvv-max-lmul=m8 -fno-vect-cost-model -ffast-math} \
+  {-ftree-vectorize -O2 -mrvv-vector-bits=scalable -mrvv-max-lmul=dynamic -ffast-math} ]
 foreach op $AUTOVEC_TEST_OPTS {
   dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/autovec/gather-scatter/*.\[cS\]]] \
     "" "$op"

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111255.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111255.c
index 91bd4ca730e9ba41460d0c718d88fe4b095c4eca..4e5a4b469355da1260da3ca64bfcc6fc28252111 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111255.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111255.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mrvv-vector-bits=scalable -march=rv64gcv -mabi=lp64d -O3 --param riscv-autovec-lmul=m2 -fno-vect-cost-model" } */
+/* { dg-options "-mrvv-vector-bits=scalable -march=rv64gcv -mabi=lp64d -O3 -mrvv-max-lmul=m2 -fno-vect-cost-model" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-1.c
index 703e47e9172f93f6e70bf9fd623ab48cfe87082d..96bea3a7dc22482dd416f8b9b88e058cbd82bc56 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mrvv-vector-bits=scalable -march=rv64gcv_zvl256b -mabi=lp64 --param=riscv-autovec-lmul=m8 -mrvv-vector-bits=zvl -O2" } */
+/* { dg-options "-mrvv-vector-bits=scalable -march=rv64gcv_zvl256b -mabi=lp64 -mrvv-max-lmul=m8 -mrvv-vector-bits=zvl -O2" } */
 
 struct a_struct
 {

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-2.c
index 5665a237c8a59b4360db713e2790de3cc9d28c2d..489dae832166d546984021d8756a873ae659eebb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mrvv-vector-bits=scalable -march=rv64gcv_zvl256b -mabi=lp64d --param=riscv-autovec-lmul=m4 -O3 -fomit-frame-pointer -funroll-loops" } */
+/* { dg-options "-mrvv-vector-bits=scalable -march=rv64gcv_zvl256b -mabi=lp64d -mrvv-max-lmul=m4 -O3 -fomit-frame-pointer -funroll-loops" } */
 
 int safe_lshift_func_int32_t_s_s_left, safe_lshift_func_int32_t_s_s_right,
     safe_sub_func_uint64_t_u_u_ui2, safe_mul_func_uint64_t_u_u_ui2, g_79_2,