drm/i915/dsi: unify naming and simplify checks for dphy params

Unify the naming of the data and clock lane timing parameters, and
simplify their bounds checks. Drop the debug messages on out of bounds
parameters as excessive.

Clarify the comment while at it.

Cc: William Tseng <william.tseng@intel.com>
Reviewed-by: William Tseng <william.tseng@intel.com>
Tested-by: William Tseng <william.tseng@intel.com>
Link: https://lore.kernel.org/r/d1a75ae7b9d93a0b50976b5de45ba2ca798991ad.1743682608.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index bb09b0220c1a1e36a249c24d92fe29d0d6037c81..ca7033251e916b48e6926edd708483c93b915d8f 100644 (file)
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1827,94 +1827,56 @@ static const struct mipi_dsi_host_ops gen11_dsi_host_ops = {
        .transfer = gen11_dsi_host_transfer,
 };
 
-#define ICL_PREPARE_CNT_MAX    0x7
-#define ICL_CLK_ZERO_CNT_MAX   0xf
-#define ICL_TRAIL_CNT_MAX      0x7
-#define ICL_TCLK_PRE_CNT_MAX   0x3
-#define ICL_TCLK_POST_CNT_MAX  0x7
-#define ICL_HS_ZERO_CNT_MAX    0xf
-#define ICL_EXIT_ZERO_CNT_MAX  0x7
-
 static void icl_dphy_param_init(struct intel_dsi *intel_dsi)
 {
-       struct intel_display *display = to_intel_display(&intel_dsi->base);
        struct intel_connector *connector = intel_dsi->attached_connector;
        struct mipi_config *mipi_config = connector->panel.vbt.dsi.config;
        u32 tlpx_ns;
-       u32 prepare_cnt, exit_zero_cnt, clk_zero_cnt;
-       u32 ths_prepare_esc_clk;
-       u32 hs_zero_cnt;
-       u32 tclk_pre_cnt;
+       u32 tclk_prepare_esc_clk, tclk_zero_esc_clk, tclk_pre_esc_clk;
+       u32 ths_prepare_esc_clk, ths_zero_esc_clk, ths_exit_esc_clk;
 
        tlpx_ns = intel_dsi_tlpx_ns(intel_dsi);
 
        /*
-        * prepare cnt in escape clocks
-        * this field represents a hexadecimal value with a precision
-        * of 1.2 – i.e. the most significant bit is the integer
-        * and the least significant 2 bits are fraction bits.
-        * so, the field can represent a range of 0.25 to 1.75
+        * The clock and data lane prepare timing parameters are in expressed in
+        * units of 1/4 escape clocks, and all the other timings parameters in
+        * escape clocks.
         */
-       prepare_cnt = DIV_ROUND_UP(mipi_config->tclk_prepare * 4, tlpx_ns);
-       if (prepare_cnt > ICL_PREPARE_CNT_MAX) {
-               drm_dbg_kms(display->drm, "prepare_cnt out of range (%d)\n",
-                           prepare_cnt);
-               prepare_cnt = ICL_PREPARE_CNT_MAX;
-       }
+       tclk_prepare_esc_clk = DIV_ROUND_UP(mipi_config->tclk_prepare * 4, tlpx_ns);
+       tclk_prepare_esc_clk = min(tclk_prepare_esc_clk, 7);
 
-       /* clk zero count in escape clocks */
-       clk_zero_cnt = DIV_ROUND_UP(mipi_config->tclk_prepare_clkzero -
-                                   mipi_config->tclk_prepare, tlpx_ns);
-       if (clk_zero_cnt > ICL_CLK_ZERO_CNT_MAX) {
-               drm_dbg_kms(display->drm,
-                           "clk_zero_cnt out of range (%d)\n", clk_zero_cnt);
-               clk_zero_cnt = ICL_CLK_ZERO_CNT_MAX;
-       }
+       tclk_zero_esc_clk = DIV_ROUND_UP(mipi_config->tclk_prepare_clkzero -
+                                        mipi_config->tclk_prepare, tlpx_ns);
+       tclk_zero_esc_clk = min(tclk_zero_esc_clk, 15);
 
-       /* tclk pre count in escape clocks */
-       tclk_pre_cnt = DIV_ROUND_UP(mipi_config->tclk_pre, tlpx_ns);
-       if (tclk_pre_cnt > ICL_TCLK_PRE_CNT_MAX) {
-               drm_dbg_kms(display->drm,
-                           "tclk_pre_cnt out of range (%d)\n", tclk_pre_cnt);
-               tclk_pre_cnt = ICL_TCLK_PRE_CNT_MAX;
-       }
+       tclk_pre_esc_clk = DIV_ROUND_UP(mipi_config->tclk_pre, tlpx_ns);
+       tclk_pre_esc_clk = min(tclk_pre_esc_clk, 3);
 
        ths_prepare_esc_clk = DIV_ROUND_UP(mipi_config->ths_prepare * 4, tlpx_ns);
        ths_prepare_esc_clk = min(ths_prepare_esc_clk, 7);
 
-       /* hs zero cnt in escape clocks */
-       hs_zero_cnt = DIV_ROUND_UP(mipi_config->ths_prepare_hszero -
-                                  mipi_config->ths_prepare, tlpx_ns);
-       if (hs_zero_cnt > ICL_HS_ZERO_CNT_MAX) {
-               drm_dbg_kms(display->drm, "hs_zero_cnt out of range (%d)\n",
-                           hs_zero_cnt);
-               hs_zero_cnt = ICL_HS_ZERO_CNT_MAX;
-       }
+       ths_zero_esc_clk = DIV_ROUND_UP(mipi_config->ths_prepare_hszero -
+                                       mipi_config->ths_prepare, tlpx_ns);
+       ths_zero_esc_clk = min(ths_zero_esc_clk, 15);
 
-       /* hs exit zero cnt in escape clocks */
-       exit_zero_cnt = DIV_ROUND_UP(mipi_config->ths_exit, tlpx_ns);
-       if (exit_zero_cnt > ICL_EXIT_ZERO_CNT_MAX) {
-               drm_dbg_kms(display->drm,
-                           "exit_zero_cnt out of range (%d)\n",
-                           exit_zero_cnt);
-               exit_zero_cnt = ICL_EXIT_ZERO_CNT_MAX;
-       }
+       ths_exit_esc_clk = DIV_ROUND_UP(mipi_config->ths_exit, tlpx_ns);
+       ths_exit_esc_clk = min(ths_exit_esc_clk, 7);
 
        /* clock lane dphy timings */
        intel_dsi->dphy_reg = (CLK_PREPARE_OVERRIDE |
-                              CLK_PREPARE(prepare_cnt) |
+                              CLK_PREPARE(tclk_prepare_esc_clk) |
                               CLK_ZERO_OVERRIDE |
-                              CLK_ZERO(clk_zero_cnt) |
+                              CLK_ZERO(tclk_zero_esc_clk) |
                               CLK_PRE_OVERRIDE |
-                              CLK_PRE(tclk_pre_cnt));
+                              CLK_PRE(tclk_pre_esc_clk));
 
        /* data lanes dphy timings */
        intel_dsi->dphy_data_lane_reg = (HS_PREPARE_OVERRIDE |
                                         HS_PREPARE(ths_prepare_esc_clk) |
                                         HS_ZERO_OVERRIDE |
-                                        HS_ZERO(hs_zero_cnt) |
+                                        HS_ZERO(ths_zero_esc_clk) |
                                         HS_EXIT_OVERRIDE |
-                                        HS_EXIT(exit_zero_cnt));
+                                        HS_EXIT(ths_exit_esc_clk));
 
        intel_dsi_log_params(intel_dsi);
 }