Fix PR 40482 2009-06-19 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>

Fix PR 40482
2009-06-19  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	    PR target/40482
	    * config/arm/arm.c (thumb_shiftable_const): Truncate val to
	    32 bits.
	    * config/arm/arm.md: Likewise.

2009-06-19  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	    PR target/40482
	    * gcc.target/arm/pr40482.c: New test.

From-SVN: r148728

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6b76ed3452bbb815112ed2e70bfdd80b624c547a..8de4e56bf4b1426045e5f4e9c8bd5605074ef4d0 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2009-06-19  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+       PR target/40482
+       * config/arm/arm.c (thumb_shiftable_const): Truncate val to 
+       32 bits.
+       * config/arm/arm.md: Likewise.
+
 2009-06-19  Ian Lance Taylor  <ian@airs.com>
 
        * tree-cfg.c (gimple_redirect_edge_and_branch): Change ERROR_MARK

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index a51cbb115a794779a7717ac63f3b614e106ac682..b62979470f7f14ca5b8052a787601e4075d3d1bd 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -17515,6 +17515,7 @@ thumb_shiftable_const (unsigned HOST_WIDE_INT val)
   unsigned HOST_WIDE_INT mask = 0xff;
   int i;
 
+  val = val & (unsigned HOST_WIDE_INT)0xffffffffu;
   if (val == 0) /* XXX */
     return 0;
 

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index fc2ce3c9c984ae1fc0eac6ad8170bd380a429b1d..0f04e463587ac9d07c76f4db2f56fc365c9c1714 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -5166,7 +5166,7 @@
    (set (match_dup 0) (ashift:SI (match_dup 0) (match_dup 2)))]
   "
   {
-    unsigned HOST_WIDE_INT val = INTVAL (operands[1]);
+    unsigned HOST_WIDE_INT val = INTVAL (operands[1]) & 0xffffffffu;
     unsigned HOST_WIDE_INT mask = 0xff;
     int i;
     

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 4a1a8d3d11503582779cf1fa3e98b922cccc5193..e7621a71c60065698de7702275560dc9576c71bc 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2009-06-19  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+       PR target/40482
+       * gcc.target/arm/pr40482.c: New test.
+       
 2009-06-19  Ian Lance Taylor  <iant@google.com>
 
        * gcc.dg/Wcxx-compat-18.c: New testcase.

diff --git a/gcc/testsuite/gcc.target/arm/pr40482.c b/gcc/testsuite/gcc.target/arm/pr40482.c
new file mode 100644 (file)
index 0000000..4303a4f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr40482.c
@@ -0,0 +1,7 @@
+/* { dg-options "-mthumb -Os" }  */
+/* { dg-final { scan-assembler-not "ldr" } } */
+
+unsigned int foo (unsigned int i )
+{
+  return i | 0xff000000;
+}