]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
pinctrl: renesas: rzg2l: Fix PMC restore
authorBiju Das <biju.das.jz@bp.renesas.com>
Sun, 21 Sep 2025 11:15:52 +0000 (12:15 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 14 Oct 2025 08:32:51 +0000 (10:32 +0200)
PMC restore needs unlocking the register using the PWPR register.

Fixes: ede014cd1ea6422d ("pinctrl: renesas: rzg2l: Add function pointer for PMC register write")
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20250921111557.103069-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/pinctrl/renesas/pinctrl-rzg2l.c

index efb406046f1a62baebfa90496471fe5be0aaa961..6c97df26bff44bd716cd3c088baf693d5c00adbb 100644 (file)
@@ -3016,7 +3016,11 @@ static void rzg2l_pinctrl_pm_setup_regs(struct rzg2l_pinctrl *pctrl, bool suspen
                 * Now cache the registers or set them in the order suggested by
                 * HW manual (section "Operation for GPIO Function").
                 */
-               RZG2L_PCTRL_REG_ACCESS8(suspend, pctrl->base + PMC(off), cache->pmc[port]);
+               if (suspend)
+                       RZG2L_PCTRL_REG_ACCESS8(suspend, pctrl->base + PMC(off), cache->pmc[port]);
+               else
+                       pctrl->data->pmc_writeb(pctrl, cache->pmc[port], PMC(off));
+
                if (has_iolh) {
                        RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + IOLH(off),
                                                 cache->iolh[0][port]);