resets = <&rcc I2C1_R>;
#address-cells = <1>;
#size-cells = <0>;
+ dmas = <&hpdma 27 0x20 0x3012>,
+ <&hpdma 28 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 41>;
status = "disabled";
};
resets = <&rcc I2C2_R>;
#address-cells = <1>;
#size-cells = <0>;
+ dmas = <&hpdma 30 0x20 0x3012>,
+ <&hpdma 31 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 42>;
status = "disabled";
};
resets = <&rcc I2C3_R>;
#address-cells = <1>;
#size-cells = <0>;
+ dmas = <&hpdma 33 0x20 0x3012>,
+ <&hpdma 34 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 43>;
status = "disabled";
};
resets = <&rcc I2C4_R>;
#address-cells = <1>;
#size-cells = <0>;
+ dmas = <&hpdma 36 0x20 0x3012>,
+ <&hpdma 37 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 44>;
status = "disabled";
};
resets = <&rcc I2C5_R>;
#address-cells = <1>;
#size-cells = <0>;
+ dmas = <&hpdma 39 0x20 0x3012>,
+ <&hpdma 40 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 45>;
status = "disabled";
};
resets = <&rcc I2C6_R>;
#address-cells = <1>;
#size-cells = <0>;
+ dmas = <&hpdma 42 0x20 0x3012>,
+ <&hpdma 43 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 46>;
status = "disabled";
};
resets = <&rcc I2C7_R>;
#address-cells = <1>;
#size-cells = <0>;
+ dmas = <&hpdma 45 0x20 0x3012>,
+ <&hpdma 46 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 47>;
status = "disabled";
};
resets = <&rcc I2C8_R>;
#address-cells = <1>;
#size-cells = <0>;
+ dmas = <&hpdma 168 0x20 0x3012>,
+ <&hpdma 169 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 48>;
status = "disabled";
};