--- /dev/null
+From foo@baz Mon Jun 20 02:04:28 PM CEST 2022
+From: Alexey Kardashevskiy <aik@ozlabs.ru>
+Date: Tue, 21 Dec 2021 16:59:03 +1100
+Subject: powerpc/mm: Switch obsolete dssall to .long
+
+From: Alexey Kardashevskiy <aik@ozlabs.ru>
+
+commit d51f86cfd8e378d4907958db77da3074f6dce3ba upstream.
+
+The dssall ("Data Stream Stop All") instruction is obsolete altogether
+with other Data Cache Instructions since ISA 2.03 (year 2006).
+
+LLVM IAS does not support it but PPC970 seems to be using it.
+This switches dssall to .long as there is no much point in fixing LLVM.
+
+Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
+Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
+Link: https://lore.kernel.org/r/20211221055904.555763-6-aik@ozlabs.ru
+[sudip: adjust context]
+Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/powerpc/include/asm/ppc-opcode.h | 2 ++
+ arch/powerpc/kernel/idle_6xx.S | 2 +-
+ arch/powerpc/kernel/l2cr_6xx.S | 6 +++---
+ arch/powerpc/kernel/swsusp_32.S | 2 +-
+ arch/powerpc/kernel/swsusp_asm64.S | 2 +-
+ arch/powerpc/mm/mmu_context.c | 2 +-
+ arch/powerpc/platforms/powermac/cache.S | 4 ++--
+ 7 files changed, 11 insertions(+), 9 deletions(-)
+
+--- a/arch/powerpc/include/asm/ppc-opcode.h
++++ b/arch/powerpc/include/asm/ppc-opcode.h
+@@ -204,6 +204,7 @@
+ #define PPC_INST_ICBT 0x7c00002c
+ #define PPC_INST_ICSWX 0x7c00032d
+ #define PPC_INST_ICSWEPX 0x7c00076d
++#define PPC_INST_DSSALL 0x7e00066c
+ #define PPC_INST_ISEL 0x7c00001e
+ #define PPC_INST_ISEL_MASK 0xfc00003e
+ #define PPC_INST_LDARX 0x7c0000a8
+@@ -439,6 +440,7 @@
+ __PPC_RA(a) | __PPC_RB(b))
+ #define PPC_DCBZL(a, b) stringify_in_c(.long PPC_INST_DCBZL | \
+ __PPC_RA(a) | __PPC_RB(b))
++#define PPC_DSSALL stringify_in_c(.long PPC_INST_DSSALL)
+ #define PPC_LQARX(t, a, b, eh) stringify_in_c(.long PPC_INST_LQARX | \
+ ___PPC_RT(t) | ___PPC_RA(a) | \
+ ___PPC_RB(b) | __PPC_EH(eh))
+--- a/arch/powerpc/kernel/idle_6xx.S
++++ b/arch/powerpc/kernel/idle_6xx.S
+@@ -129,7 +129,7 @@ BEGIN_FTR_SECTION
+ END_FTR_SECTION_IFCLR(CPU_FTR_NO_DPM)
+ mtspr SPRN_HID0,r4
+ BEGIN_FTR_SECTION
+- DSSALL
++ PPC_DSSALL
+ sync
+ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
+ lwz r8,TI_LOCAL_FLAGS(r2) /* set napping bit */
+--- a/arch/powerpc/kernel/l2cr_6xx.S
++++ b/arch/powerpc/kernel/l2cr_6xx.S
+@@ -96,7 +96,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_L2CR)
+
+ /* Stop DST streams */
+ BEGIN_FTR_SECTION
+- DSSALL
++ PPC_DSSALL
+ sync
+ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
+
+@@ -293,7 +293,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_L3CR)
+ isync
+
+ /* Stop DST streams */
+- DSSALL
++ PPC_DSSALL
+ sync
+
+ /* Get the current enable bit of the L3CR into r4 */
+@@ -402,7 +402,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
+ _GLOBAL(__flush_disable_L1)
+ /* Stop pending alitvec streams and memory accesses */
+ BEGIN_FTR_SECTION
+- DSSALL
++ PPC_DSSALL
+ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
+ sync
+
+--- a/arch/powerpc/kernel/swsusp_32.S
++++ b/arch/powerpc/kernel/swsusp_32.S
+@@ -181,7 +181,7 @@ _GLOBAL(swsusp_arch_resume)
+ #ifdef CONFIG_ALTIVEC
+ /* Stop pending alitvec streams and memory accesses */
+ BEGIN_FTR_SECTION
+- DSSALL
++ PPC_DSSALL
+ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
+ #endif
+ sync
+--- a/arch/powerpc/kernel/swsusp_asm64.S
++++ b/arch/powerpc/kernel/swsusp_asm64.S
+@@ -142,7 +142,7 @@ END_FW_FTR_SECTION_IFCLR(FW_FEATURE_LPAR
+ _GLOBAL(swsusp_arch_resume)
+ /* Stop pending alitvec streams and memory accesses */
+ BEGIN_FTR_SECTION
+- DSSALL
++ PPC_DSSALL
+ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
+ sync
+
+--- a/arch/powerpc/mm/mmu_context.c
++++ b/arch/powerpc/mm/mmu_context.c
+@@ -79,7 +79,7 @@ void switch_mm_irqs_off(struct mm_struct
+ * context
+ */
+ if (cpu_has_feature(CPU_FTR_ALTIVEC))
+- asm volatile ("dssall");
++ asm volatile (PPC_DSSALL);
+
+ if (new_on_cpu)
+ radix_kvm_prefetch_workaround(next);
+--- a/arch/powerpc/platforms/powermac/cache.S
++++ b/arch/powerpc/platforms/powermac/cache.S
+@@ -48,7 +48,7 @@ flush_disable_75x:
+
+ /* Stop DST streams */
+ BEGIN_FTR_SECTION
+- DSSALL
++ PPC_DSSALL
+ sync
+ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
+
+@@ -196,7 +196,7 @@ flush_disable_745x:
+ isync
+
+ /* Stop prefetch streams */
+- DSSALL
++ PPC_DSSALL
+ sync
+
+ /* Disable L2 prefetching */
--- /dev/null
+From foo@baz Mon Jun 20 01:58:09 PM CEST 2022
+From: Randy Dunlap <rdunlap@infradead.org>
+Date: Mon, 16 Nov 2020 17:39:51 -0800
+Subject: RISC-V: fix barrier() use in <vdso/processor.h>
+
+From: Randy Dunlap <rdunlap@infradead.org>
+
+commit 30aca1bacb398dec6c1ed5eeca33f355bd7b6203 upstream.
+
+riscv's <vdso/processor.h> uses barrier() so it should include
+<asm/barrier.h>
+
+Fixes this build error:
+ CC [M] drivers/net/ethernet/emulex/benet/be_main.o
+In file included from ./include/vdso/processor.h:10,
+ from ./arch/riscv/include/asm/processor.h:11,
+ from ./include/linux/prefetch.h:15,
+ from drivers/net/ethernet/emulex/benet/be_main.c:14:
+./arch/riscv/include/asm/vdso/processor.h: In function 'cpu_relax':
+./arch/riscv/include/asm/vdso/processor.h:14:2: error: implicit declaration of function 'barrier' [-Werror=implicit-function-declaration]
+ 14 | barrier();
+
+This happens with a total of 5 networking drivers -- they all use
+<linux/prefetch.h>.
+
+rv64 allmodconfig now builds cleanly after this patch.
+
+Fixes fallout from:
+815f0ddb346c ("include/linux/compiler*.h: make compiler-*.h mutually exclusive")
+
+Fixes: ad5d1122b82f ("riscv: use vDSO common flow to reduce the latency of the time-related functions")
+Reported-by: Andreas Schwab <schwab@linux-m68k.org>
+Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
+Acked-by: Arvind Sankar <nivedita@alum.mit.edu>
+Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
+Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
+Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
+[sudip: change in old path]
+Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/riscv/include/asm/processor.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/riscv/include/asm/processor.h
++++ b/arch/riscv/include/asm/processor.h
+@@ -22,6 +22,8 @@
+
+ #ifndef __ASSEMBLY__
+
++#include <asm/barrier.h>
++
+ struct task_struct;
+ struct pt_regs;
+
--- /dev/null
+From foo@baz Mon Jun 20 01:58:09 PM CEST 2022
+From: Olof Johansson <olof@lixom.net>
+Date: Mon, 16 Dec 2019 20:06:31 -0800
+Subject: riscv: Less inefficient gcc tishift helpers (and export their symbols)
+
+From: Olof Johansson <olof@lixom.net>
+
+commit fc585d4a5cf614727f64d86550b794bcad29d5c3 upstream.
+
+The existing __lshrti3 was really inefficient, and the other two helpers
+are also needed to compile some modules.
+
+Add the missing versions, and export all of the symbols like arm64
+already does.
+
+This code is based on the assembly generated by libgcc builds.
+
+This fixes a build break triggered by ubsan:
+
+riscv64-unknown-linux-gnu-ld: lib/ubsan.o: in function `.L2':
+ubsan.c:(.text.unlikely+0x38): undefined reference to `__ashlti3'
+riscv64-unknown-linux-gnu-ld: ubsan.c:(.text.unlikely+0x42): undefined reference to `__ashrti3'
+
+Signed-off-by: Olof Johansson <olof@lixom.net>
+[paul.walmsley@sifive.com: use SYM_FUNC_{START,END} instead of
+ ENTRY/ENDPROC; note libgcc origin]
+Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
+Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/riscv/include/asm/asm-prototypes.h | 4 +
+ arch/riscv/lib/tishift.S | 75 ++++++++++++++++++++++++--------
+ 2 files changed, 61 insertions(+), 18 deletions(-)
+
+--- a/arch/riscv/include/asm/asm-prototypes.h
++++ b/arch/riscv/include/asm/asm-prototypes.h
+@@ -4,4 +4,8 @@
+ #include <linux/ftrace.h>
+ #include <asm-generic/asm-prototypes.h>
+
++long long __lshrti3(long long a, int b);
++long long __ashrti3(long long a, int b);
++long long __ashlti3(long long a, int b);
++
+ #endif /* _ASM_RISCV_PROTOTYPES_H */
+--- a/arch/riscv/lib/tishift.S
++++ b/arch/riscv/lib/tishift.S
+@@ -4,34 +4,73 @@
+ */
+
+ #include <linux/linkage.h>
++#include <asm-generic/export.h>
+
+-ENTRY(__lshrti3)
++SYM_FUNC_START(__lshrti3)
+ beqz a2, .L1
+ li a5,64
+ sub a5,a5,a2
+- addi sp,sp,-16
+ sext.w a4,a5
+ blez a5, .L2
+ sext.w a2,a2
+- sll a4,a1,a4
+ srl a0,a0,a2
+- srl a1,a1,a2
++ sll a4,a1,a4
++ srl a2,a1,a2
+ or a0,a0,a4
+- sd a1,8(sp)
+- sd a0,0(sp)
+- ld a0,0(sp)
+- ld a1,8(sp)
+- addi sp,sp,16
+- ret
++ mv a1,a2
+ .L1:
+ ret
+ .L2:
+- negw a4,a4
+- srl a1,a1,a4
+- sd a1,0(sp)
+- sd zero,8(sp)
+- ld a0,0(sp)
+- ld a1,8(sp)
+- addi sp,sp,16
++ negw a0,a4
++ li a2,0
++ srl a0,a1,a0
++ mv a1,a2
++ ret
++SYM_FUNC_END(__lshrti3)
++EXPORT_SYMBOL(__lshrti3)
++
++SYM_FUNC_START(__ashrti3)
++ beqz a2, .L3
++ li a5,64
++ sub a5,a5,a2
++ sext.w a4,a5
++ blez a5, .L4
++ sext.w a2,a2
++ srl a0,a0,a2
++ sll a4,a1,a4
++ sra a2,a1,a2
++ or a0,a0,a4
++ mv a1,a2
++.L3:
++ ret
++.L4:
++ negw a0,a4
++ srai a2,a1,0x3f
++ sra a0,a1,a0
++ mv a1,a2
++ ret
++SYM_FUNC_END(__ashrti3)
++EXPORT_SYMBOL(__ashrti3)
++
++SYM_FUNC_START(__ashlti3)
++ beqz a2, .L5
++ li a5,64
++ sub a5,a5,a2
++ sext.w a4,a5
++ blez a5, .L6
++ sext.w a2,a2
++ sll a1,a1,a2
++ srl a4,a0,a4
++ sll a2,a0,a2
++ or a1,a1,a4
++ mv a0,a2
++.L5:
++ ret
++.L6:
++ negw a1,a4
++ li a2,0
++ sll a1,a0,a1
++ mv a0,a2
+ ret
+-ENDPROC(__lshrti3)
++SYM_FUNC_END(__ashlti3)
++EXPORT_SYMBOL(__ashlti3)